KR102661922B1 - Display device - Google Patents

Abstract

The present invention relates to a display device. The display device according to an embodiment of the present invention includes a substrate, an active layer including a channel region, a gate electrode, a source electrode, and a drain electrode on the active layer. The thin film transistor includes a first conductive pattern simultaneously overlapping the active layer and the source electrode under the active layer, and a second conductive pattern simultaneously overlapping the active layer and the drain electrode under the active layer. Therefore, as the first conductive pattern and the second conductive pattern are disposed, the thickness of the photoresist to form the contact hole where the active layer and the source electrode and drain electrode are respectively connected is reduced, and the exposure effect is improved by reflecting the exposure energy again. You can do it. Accordingly, the display device according to an embodiment of the present invention can facilitate the formation of fine contact holes by improving the exposure effect, the margin area required for contact hole formation can also be reduced by reducing the contact hole size, and the aperture ratio can be improved. You can.

Description

Display device {DISPLAY DEVICE}

The present invention relates to a display device, and more specifically, to a display device in which contact hole size can be easily adjusted and the aperture ratio is improved by reducing the margin for forming a contact hole.

Flat panel display devices such as liquid crystal display devices and organic light emitting diode display devices are receiving attention as next-generation display devices due to their thinness and low power consumption. there is.

Such display devices include a plurality of thin film transistors for driving. A thin film transistor consists of a gate electrode, an active layer, a source electrode, and a drain electrode.

The active layer can be electrically connected to the source electrode and the drain electrode, and when the active layer and the source electrode and drain electrode are disposed in different layers, a contact hole must be formed for electrical connection. Also, an extra area, that is, a margin area, must be secured to form a contact hole.

However, as the display device becomes higher resolution, the area allocated to one thin film transistor decreases, and the margin area given for forming a contact hole also decreases, so the contact hole must be formed in a finer size. The size of a fine contact hole can be determined by the resolution of the exposure machine. The higher the resolution of the exposure machine, the easier it is to form a fine contact hole. However, the resolution of the exposure machine is limited, and it may be difficult to form fine contact holes of a certain size or less. Therefore, when forming a fine contact hole, a residual film, etc. may remain within the contact hole, and it may be difficult to adjust the size of the contact hole. Additionally, even when the photoresist is thick, it is difficult to adjust the size of the contact hole, and a residual film may remain within the contact hole.

The problem to be solved by the present invention is to provide a display device in which the size of the contact hole can be easily adjusted by reducing the thickness of the photoresist used when forming the contact hole where the active layer, source electrode, and drain electrode are respectively connected.

Another problem that the present invention aims to solve is to improve the exposure effect by reflecting the exposure energy that is irradiated on the active layer and transmitted through the active layer when forming a contact hole where the active layer is connected to the source electrode and the drain electrode, respectively, to the upper part of the active layer. The purpose is to provide a display device as requested.

Another problem to be solved by the present invention is to provide a display device that can reduce the margin area required to form a contact hole and improve the aperture ratio.

Another problem to be solved by the present invention is to provide a display device that minimizes the remaining film of the contact hole by maximizing the exposure effect when forming the contact hole.

The problems of the present invention are not limited to the problems mentioned above, and other problems not mentioned will be clearly understood by those skilled in the art from the description below.

A display device according to an embodiment of the present invention includes a substrate, a thin film transistor disposed on the substrate, an active layer including a channel region, a gate electrode on the active layer, a source electrode, and a drain electrode, and below the active layer, It includes a first conductive pattern simultaneously overlapping the active layer and the source electrode, and a second conductive pattern simultaneously overlapping the active layer and the drain electrode under the active layer. Therefore, as the first conductive pattern and the second conductive pattern are disposed, the thickness of the photoresist for forming the contact hole where the active layer, the source electrode, and the drain electrode are respectively connected is reduced, and the exposure energy is reflected back to provide an exposure effect. can be improved.

A display device according to another embodiment of the present invention includes a substrate on which a plurality of thin film transistors including an active layer, a gate electrode on the active layer, a source electrode, and a drain electrode are disposed, and an active layer of the plurality of thin film transistors, It includes an insulating layer having a plurality of contact holes exposing the active layer, a plurality of reflective patterns disposed between the substrate and the active layer, and overlapping the plurality of contact holes. Therefore, a reflection pattern is placed below the contact hole where the active layer, the source electrode, and the drain electrode are respectively connected, so that the exposure energy irradiated on the active layer and transmitted through the active layer when forming the contact hole is reflected back to the upper part of the active layer to expose the light. The effect can be improved and the remaining film on the contact hole can be minimized.

Specific details of other embodiments are included in the detailed description and drawings.

The present invention can easily adjust the size of the contact hole by reducing the thickness of the photoresist used when forming the contact hole.

The present invention can improve the exposure effect by reflecting the exposure energy that is irradiated on the active layer and transmitted through the active layer when forming a contact hole back to the upper part of the active layer.

The present invention can improve the aperture ratio of a display device by reducing the margin area when forming a contact hole.

The present invention can improve the exposure effect when forming a contact hole and minimize the remaining film of the contact hole.

The effects according to the present invention are not limited to the details exemplified above, and further various effects are included within the present invention.

1 is a plan view of a display device according to an embodiment of the present invention.
FIG. 2A is a circuit diagram of the sub-pixel of FIG. 1.
FIG. 2B is an enlarged view of the sub-pixel of FIG. 1.
Figure 3 is a cross-sectional view taken along line III-III' of Figure 2b.
Figure 4 is a cross-sectional view taken along line IV-IV' of Figure 2b.
Figure 5 is a cross-sectional view taken along line V-V' of Figure 2b.
6A and 6B are diagrams to explain the principle of improving the resolution of fine contact holes in a display device according to an embodiment of the present invention.
Figure 7 is an enlarged view of a sub-pixel of a display device according to another embodiment of the present invention.

The advantages and features of the present invention and methods for achieving them will become clear by referring to the embodiments described in detail below along with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below and will be implemented in various different forms, but the present embodiments only serve to ensure that the disclosure of the present invention is complete, and are known to those skilled in the art in the technical field to which the present invention pertains. It is provided to fully inform those who have the scope of the invention, and the present invention is only defined by the scope of the claims.

The shape, size, ratio, angle, number, etc. disclosed in the drawings for explaining embodiments of the present invention are illustrative and the present invention is not limited to the matters shown. Like reference numerals refer to like elements throughout the specification. Additionally, in describing the present invention, if it is determined that a detailed description of related known technologies may unnecessarily obscure the gist of the present invention, the detailed description will be omitted. When 'comprises', 'has', 'consists of', etc. mentioned in the present invention are used, other parts may be added unless 'only' is used. In cases where a component is expressed in the singular, the plural is included unless specifically stated otherwise.

When interpreting a component, it is interpreted to include the margin of error even if there is no separate explicit description.

In the case of a description of a positional relationship, for example, if the positional relationship of two parts is described as 'on top', 'on the top', 'on the bottom', 'next to', etc., 'immediately' Alternatively, there may be one or more other parts placed between the two parts, unless 'directly' is used.

When an element or layer is referred to as “on” another element or layer, it includes instances where the other layer or other element is directly on top of or interposed between the other elements.

Additionally, first, second, etc. are used to describe various components, but these components are not limited by these terms. These terms are merely used to distinguish one component from another. Accordingly, the first component mentioned below may also be the second component within the technical spirit of the present invention.

Like reference numerals refer to like elements throughout the specification.

The size and thickness of each component shown in the drawings are shown for convenience of explanation, and the present invention is not necessarily limited to the size and thickness of the components shown.

Each feature of the various embodiments of the present invention can be combined or combined with each other partially or entirely, and various technical interconnections and operations are possible, and each embodiment can be implemented independently of each other or together in a related relationship. It may be possible.

Hereinafter, the present invention will be described with reference to the drawings.

1 is a plan view of a display device according to an embodiment of the present invention. In FIG. 1 , for convenience of explanation, only the substrate 110 and the plurality of sub-pixels (SP) are shown among the various components of the display device 100.

The substrate 110 is configured to support various components included in the display device 100 and may be made of an insulating material. For example, the substrate 110 may be made of a plastic material such as glass or polyimide.

The substrate 110 includes a display area (AA) and a non-display area (NA).

The display area AA is an area where a plurality of sub-pixels SP are arranged and an image is displayed. In the display area AA, a sub-pixel SP including a light-emitting area for displaying an image and a circuit for driving the sub-pixel SP may be disposed.

The non-display area (NA) is an area where images are not displayed, and is an area where various wiring and driving circuits for driving the sub-pixels (SP) and driving circuits arranged in the display area (AA) are arranged. Various ICs, such as gate driver ICs and data driver ICs, may be placed in the non-display area (NA).

A plurality of sub-pixels SP are disposed on the substrate 110. The plurality of sub-pixels (SP) are the minimum units constituting the display area (AA), and each of the plurality of sub-pixels (SP) includes a light-emitting area. At this time, a display element for emitting light in the light emitting area may be disposed in each of the plurality of sub-pixels SP. The display element may be defined differently depending on the type of the display device 100, and may be, for example, a liquid crystal display element or an organic light emitting element, but is not limited thereto. Hereinafter, the display device 100 according to an embodiment of the present invention will be described assuming that it is an organic light emitting display device.

Hereinafter, the sub-pixel SP will be described in more detail with reference to FIGS. 2 and 5.

FIG. 2A is a circuit diagram of the sub-pixel of FIG. 1. FIG. 2B is an enlarged view of the sub-pixel of FIG. 1. Figure 3 is a cross-sectional view taken along line III-III' of Figure 2b. Figure 4 is a cross-sectional view taken along line IV-IV' of Figure 2b. Figure 5 is a cross-sectional view taken along line V-V' of Figure 2b. 2A to 5, the display device 100 according to an embodiment of the present invention includes a substrate 110, a reference voltage line (RL), a data line (DL), a power line (PL), and a gate line ( GL), a first thin film transistor 120, a second thin film transistor 130, a third thin film transistor 140, a storage capacitor 150, and an organic light emitting device 160.

2A and 2B, the sub-pixel SP includes an organic light-emitting device 160, a first thin-film transistor 120, a second thin-film transistor 130, a third thin-film transistor 140, and a storage capacitor 150. ) is placed.

First, referring to FIGS. 2A and 2B and FIG. 3 together, the first thin film transistor 120 is a switching thin film transistor. Specifically, when a gate voltage is applied to the first thin film transistor 120 from the gate line GL, the data voltage is transmitted from the data line DL to the second gate electrode 132 of the second thin film transistor 130 and the storage capacitor. It can be delivered to (150). Therefore, the first thin film transistor 120 is controlled by the gate voltage and may be a switching thin film transistor that can control turn on and turn off of the second thin film transistor 130.

The first thin film transistor 120 includes a first gate electrode 122, a first active layer 121, a first source electrode 123, and a first drain electrode 124. Specifically, the first active layer 121 is disposed on the substrate 110, and the gate is insulated on the first active layer 121 to insulate the first active layer 121 and the first gate electrode 122. A layer 112 is disposed, and a first gate electrode 122 is disposed on the gate insulating layer 112. An interlayer insulating layer 113 is disposed on the first gate electrode 122, and a first source electrode 123 and a first drain electrode 124 electrically connected to the active layer are disposed on the interlayer insulating layer 113. .

First, the first active layer 121 includes a first channel region 121C, a first source region 121S, and a first drain region 121D. The first channel region 121C is a region overlapping the first gate electrode 122. When a voltage is applied to the first gate electrode 122, a channel is formed to form the first source region 121S and the first drain. The area 121D can be electrically connected. The first source region 121S and the first drain region 121D are regions electrically connected to the first source electrode 123 and the first drain electrode 124, respectively.

The first active layer 121 may be made of an oxide semiconductor. At this time, the first source region 121S and the first drain region 121D may be regions in which the oxide semiconductor is conductive. However, the first active layer is not limited thereto, and may be formed of amorphous silicon, polycrystalline silicon, or an organic semiconductor.

A gate insulating layer 112 is disposed on the first active layer 121. The gate insulating layer 112 is a layer for insulating the first gate electrode 122 and the first active layer 121, and may be made of an insulating material. For example, the gate insulating layer 112 may be composed of a single layer or a multiple layer of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.

The first gate electrode 122 is disposed on the first active layer 121 and the gate insulating layer 112 to overlap the first channel region 121C of the first active layer 121. The first gate electrode 122 is made of a conductive material, for example, copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof. It may be, but is not limited to this.

The first gate electrode 122 extends from the gate wire GL. Accordingly, the first gate electrode 122 and the gate wire GL may be formed of the same material. The gate wiring (GL) may be made of a conductive material, such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof. However, it is not limited to this.

The gate wiring (GL) transfers the gate voltage to the sub-pixel (SP). Specifically, the gate wiring GL supplies the gate voltage to the first gate electrode 122 of the first thin film transistor 120 and the third gate electrode 142 of the third thin film transistor 140 of the sub-pixel SP. Deliver.

An interlayer insulating layer 113 is disposed on the first gate electrode 122. The interlayer insulating layer 113 is a layer for insulating the first gate electrode 122, the first source electrode 123, and the first drain electrode 124, and may be made of an insulating material. For example, the gate insulating layer 112 may be composed of a single layer or a multiple layer of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto.

The first source electrode 123 and the first drain electrode 124 are disposed on the first gate electrode 122 and the interlayer insulating layer 113. The first source electrode 123 is electrically connected to the first source region 121S of the first active layer 121 through a contact hole formed in the interlayer insulating layer 113. Additionally, the first drain electrode 124 is electrically connected to the first drain region 121D through a contact hole formed in the interlayer insulating layer 113. The first source electrode 123 and the first drain electrode 124 are made of a conductive material, for example, copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium ( Cr) or an alloy thereof, but is not limited thereto.

The first source electrode 123 is electrically connected to the data line DL. At this time, the first source electrode 123 and the data line DL may be formed of the same material or may be formed of different materials. The data wire (DL) may be made of a conductive material, such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof. However, it is not limited to this.

The data line DL transmits the data voltage to the sub-pixel SP. Specifically, the data line DL may transmit the data voltage to the first source electrode 123 of the first thin film transistor 120 of the sub-pixel SP.

The first drain electrode 124 is electrically connected to the second gate electrode 132 of the second thin film transistor 130 and one electrode among a plurality of electrodes of the storage capacitor 150. The first drain electrode 124 may transmit the data voltage from the data line DL and the first source electrode 123 to the second thin film transistor 130.

Referring to FIGS. 2A and 2B and FIG. 4 together, the second thin film transistor 130 is a driving thin film transistor. Specifically, the second thin film transistor 130 may be turned on by the data voltage transmitted to the second gate electrode 132 through the first thin film transistor 120, and the second thin film transistor 130 may be turned on. When turned on, the power voltage can be transmitted from the power line PL to the anode 161 of the organic light emitting device 160. Accordingly, the second thin film transistor 130 may be a driving thin film transistor capable of driving the organic light emitting device 160 by supplying power voltage to the organic light emitting device 160.

The second thin film transistor 130 includes a second gate electrode 132, a second active layer 131, a second source electrode 133, and a second drain electrode 134. Specifically, the second active layer 131 is disposed on the substrate 110, and a gate insulator is formed on the second active layer 131 to insulate the second active layer 131 and the second gate electrode 132. A layer 112 is disposed, and a second gate electrode 132 is disposed on the gate insulating layer 112. An interlayer insulating layer 113 is disposed on the second gate electrode 132, and a second source electrode 133 and a second drain electrode electrically connected to the second active layer 131 on the interlayer insulating layer 113 ( 134) is placed

First, the second active layer 131 includes a second channel region 131C, a second source region 131S, and a second drain region 131D. The second channel region 131C is a region overlapping the second gate electrode 132. When a voltage is applied to the second gate electrode 132, a channel is formed to form the second source region 131S and the second drain. The area 131D can be electrically connected. The second source region 131S and the second drain region 131D are regions electrically connected to the second source electrode 133 and the second drain electrode 134, respectively. 2 The drain region 131D may be a conductive region. The second active layer 131 may be formed of, for example, amorphous silicon, polycrystalline silicon, an oxide semiconductor, or an organic semiconductor, but is not limited thereto.

The second gate electrode 132 is disposed on the second active layer 131 and the gate insulating layer 112 to overlap the second channel region 131C of the second active layer 131. The second gate electrode 132 is made of a conductive material, for example, copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof. It may be, but is not limited to this.

The second gate electrode 132 is electrically connected to the first drain electrode 124 of the first thin film transistor 120. The first thin film transistor 120 transfers a data voltage to the second thin film transistor 130, which is electrically connected through the first drain electrode 124, to control the second thin film transistor 130 to turn on or off. You can.

The second source electrode 133 and the second drain electrode 134 are disposed on the second gate electrode 132 and the interlayer insulating layer 113, and are connected to the second source electrode through a contact hole formed in the interlayer insulating layer 113. The electrode 133 may be electrically connected to the second source region 131S of the second active layer 131, and the second drain electrode 134 may be electrically connected to the second drain region 131D. The second source electrode 133 and the second drain electrode 134 are made of a conductive material, for example, copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium ( Cr) or an alloy thereof, but is not limited thereto.

The second source electrode 133 is electrically connected to the power line PL. At this time, the second source electrode 133 and the power wiring PL may be formed of the same material or may be formed of different materials. The power wiring (PL) may be made of a conductive material, such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof. However, it is not limited to this.

The power wiring (PL) transmits the power voltage to the sub-pixel (SP). Specifically, the power line PL transmits the power voltage to the second source electrode 133 of the second thin film transistor 130 of the sub-pixel SP. At this time, the power wiring PL may be a wiring that transmits a high-potential power supply voltage. Additionally, the power line PL may be disposed on the same layer as the data line DL and may be made of the same material as the data line DL.

The second drain electrode 134 is electrically connected to the anode 161 of the organic light emitting device 160 and another one of the plurality of electrodes of the storage capacitor 150. The second drain electrode 134 may transmit the power voltage from the power line PL and the second source electrode 133 to the anode 161 of the organic light emitting device 160.

Referring to FIGS. 2A and 2B and FIG. 5 together, the third thin film transistor 140 is a sensing thin film transistor. Specifically, the third thin film transistor 140 may be turned on by the gate voltage transmitted to the third gate electrode 142 through the gate wiring GL, and the third thin film transistor 140 may be turned on. In this case, the reference voltage may be transmitted from the reference voltage line RL to the storage capacitor 150. The storage capacitor 150 may be charged based on the data voltage supplied from the first thin film transistor 120 and the reference voltage supplied from the third thin film transistor 140. Accordingly, the third thin film transistor 140 may be a sensing thin film transistor that can compensate for the deterioration of the second thin film transistor 130 by the reference voltage by supplying the reference voltage to the storage capacitor 150.

The third thin film transistor 140 includes a third gate electrode 142, a third active layer 141, a third source electrode 143, and a third drain electrode 144. Specifically, the third active layer 141 is disposed on the substrate 110, and a gate insulator is formed on the third active layer 141 to insulate the third active layer 141 and the third gate electrode 142. A layer 112 is disposed, and a third gate electrode 142 is disposed on the gate insulating layer 112. An interlayer insulating layer 113 is disposed on the third gate electrode 142, and a third source electrode 143 and a third drain electrode 144 electrically connected to the active layer are disposed on the interlayer insulating layer 113.

First, the third active layer 141 includes a third channel region 141C, a third source region 141S, and a third drain region 141D. The third channel region 141C is a region overlapping the third gate electrode 142. When a voltage is applied to the third gate electrode 142, a channel is formed to form the third source region 141S and the third drain. The area 141D can be electrically connected. The third source region 141S and the third drain region 141D are regions electrically connected to the third source electrode 143 and the third drain electrode 144, respectively. 3 The drain region 141D may be a conductive region. The third active layer 141 may be formed of, for example, amorphous silicon, polycrystalline silicon, an oxide semiconductor, or an organic semiconductor, but is not limited thereto.

The third gate electrode 142 is disposed on the third active layer 141 and the gate insulating layer 112 to overlap the third channel region 141C of the third active layer 141. The third gate electrode 142 is made of a conductive material, for example, copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof. It may be, but is not limited to this.

The third gate electrode 142 extends from the gate wire GL and is electrically connected to the gate wire GL. Accordingly, the third gate electrode 142 and the gate wire GL may be formed of the same material.

However, in the display device 100 according to an embodiment of the present invention, the third gate electrode 142 of the third thin film transistor 140 is shown as being electrically connected to the gate wire GL, but the gate wire GL is In addition, a sensing wire that transmits a sensing voltage may be additionally disposed to electrically connect the sensing wire and the third gate electrode 142, but is not limited thereto.

The third source electrode 143 and the third drain electrode 144 are disposed on the third gate electrode 142 and the interlayer insulating layer 113, and are connected to the third source electrode through a contact hole formed in the interlayer insulating layer 113. The electrode 143 may be electrically connected to the third source region 141S of the third active layer 141, and the third drain electrode 144 may be electrically connected to the third drain region 141D. The third source electrode 143 and the third drain electrode 144 are made of a conductive material, such as copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium ( Cr) or an alloy thereof, but is not limited thereto.

The third source electrode 143 is electrically connected to the reference voltage line RL. At this time, the third source electrode 143 and the reference voltage line RL may be formed of the same material or may be formed of different materials. The reference voltage wire (RL) may be made of a conductive material, for example, copper (Cu), aluminum (Al), molybdenum (Mo), nickel (Ni), titanium (Ti), chromium (Cr), or an alloy thereof. may, but is not limited to this.

The reference voltage line RL transmits the reference voltage to the sub-pixel SP. Specifically, the reference voltage line RL transmits the reference voltage to the third source electrode 143 of the third thin film transistor 140 of the sub-pixel SP. Additionally, the reference voltage line RL may be disposed on the same layer as the data line DL and may be made of the same material as the data line DL.

The third drain electrode 144 is electrically connected to another one of the plurality of electrodes of the storage capacitor 150. The third drain electrode 144 may transfer the reference voltage from the reference voltage line RL and the third source electrode 143 to another electrode of the storage capacitor 150.

Meanwhile, referring to FIGS. 2A, 2B, and 3, the storage capacitor 150 includes a first electrode 151 on the substrate 110, a second electrode 152 on the first electrode 151, and a second electrode ( 152) and includes a third electrode 153 on the top. The storage capacitor 150 may store voltage so that the organic light emitting device 160 continues to maintain the same state for one frame.

The first electrode 151 of the storage capacitor 150 is disposed on the substrate 110. The first electrode 151 is disposed on the same layer as the data line DL, the reference voltage line RL, and the power line PL, and may be made of the same material. The first electrode 151 is electrically connected to the third drain electrode 144 of the third thin film transistor 140.

A buffer layer 111 is disposed on the first electrode 151 of the storage capacitor 150. The buffer layer 111 can reduce the penetration of moisture or impurities through the substrate 110 and can flatten the upper part of the substrate 110 including the first electrode 151. The buffer layer 111 may be composed of, for example, a single layer or a multiple layer of silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto. However, the buffer layer 111 is not an absolutely necessary component and may be adopted depending on the type of substrate 110 or the type of thin film transistor 120, 130, and 140.

The second electrode 152 is disposed on the buffer layer 111. The second electrode 152 extends from the first active layer 121 of the first thin film transistor 120 and is disposed to overlap the first electrode 151. Specifically, the second electrode 152 is formed of the same material as the first active layer 121, but can have conductive properties through a conductive process. The second electrode 152 is electrically connected to the second gate electrode 132 of the second thin film transistor 130.

An interlayer insulating layer 113 is disposed on the second electrode 152, and a third electrode 153 is disposed on the interlayer insulating layer 113. The third electrode 153 extends from the second drain electrode 134 of the second thin film transistor 130 and is electrically connected to the second drain electrode 134, and the first electrode 151 and the second electrode 152 ) is placed to overlap. The third electrode 153 may be made of the same material as the second drain electrode 134.

Meanwhile, referring to FIGS. 2A, 2B, and 4, a planarization layer 114 is formed on the first thin film transistor 120, the second thin film transistor 130, the third thin film transistor 140, and the storage capacitor 150. This is placed. The planarization layer 114 may planarize the upper part of the substrate 110 . The planarization layer 114 may be made of an organic material, for example, a single layer or a double layer of polyimide or photo acryl, but is not limited thereto.

The organic light emitting device 160 is disposed on the planarization layer 114. The organic light emitting device 160 includes an anode 161, an organic light emitting layer 162, and a cathode 163.

The anode 161 is electrically connected to the second drain electrode 134 of the second thin film transistor 130. The anode 161 supplies holes to the organic light emitting layer 162 and is made of a conductive material with a high work function. The anode 161 may be formed of a transparent conductive material such as, for example, indium tin oxide (ITO), indium zinc oxide (IZO), but is not limited thereto.

However, when the display device 100 according to an embodiment of the present invention is a top emission type, the light emitted from the organic light emitting layer 162 is reflected by the anode 161 and is directed upward, that is, to the cathode ( 163), a reflective layer made of a metal material with excellent reflection efficiency, such as aluminum (Al) or silver (Ag), may be added to the lower part of the anode 161. Conversely, when the display device 100 is a bottom emission type, the anode 161 may be made only of a transparent conductive material.

Hereinafter, the display device 100 according to an embodiment of the present invention will be described assuming that it is a top emission type, but is not limited thereto.

A bank 115 is disposed on the anode 161. The bank 115 is arranged to cover the edge of the anode 161 and can distinguish the sub-pixel (SP) area. The bank 115 may be made of an insulating material, for example, polyimide, acryl, or benzocyclobutene (BCB)-based resin, but is not limited thereto.

The organic light-emitting layer 162 is disposed on the anode 161. The organic emission layer 162 may include any one of a red organic emission layer, a green organic emission layer, a blue organic emission layer, and a white organic emission layer. When the organic light emitting layer 162 is a white organic light emitting layer, a color filter may be additionally included in the display device 100, and the organic light emitting layers 162 of adjacent sub-pixels (SP) are formed integrally, forming a plurality of sub-pixels. (SP) Can be placed to cover the entire surface.

A cathode 163 is disposed on the organic light emitting layer 162. The cathode 163 supplies electrons to the organic light emitting layer 162 and is made of a conductive material with a low work function. For example, the cathode 163 may be formed of a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), and may further include a metal doping layer. It is not limited to this.

Meanwhile, a plurality of conductive patterns 170 are disposed on the substrate 110. The plurality of conductive patterns 170 include the first active layer 121, the second active layer 131, and the third active layer 141, respectively, the first source electrode 123, the first drain electrode 124, and the third active layer 141. The two source electrodes 133, the second drain electrode 134, the third source electrode 143, and the third drain electrode 144 are disposed to overlap the connected contact holes. The plurality of conductive patterns 170 are disposed on the same layer as the data line DL, the reference voltage line RL, the power line PL, and the first electrode 151 of the storage capacitor 150, and are made of the same material. You can lose.

The plurality of conductive patterns 170 include first to sixth conductive patterns 171 to 176 . Hereinafter, the plurality of conductive patterns 170 will be described in detail with reference to FIGS. 3 to 5 .

Referring to FIG. 3, the first conductive pattern 171 and the second conductive pattern 172 are disposed below the first active layer 121 of the first thin film transistor 120, It is placed to overlap in some areas.

Specifically, the first conductive pattern 171 extends from the data line DL and is electrically connected to the data line DL. The first conductive pattern 171 simultaneously overlaps the first active layer 121 and the first source electrode 123, for example, to overlap the first source region 121S of the first active layer 121. It is placed.

The second conductive pattern 172 extends from the first electrode 151 of the storage capacitor 150 and is electrically connected to the storage capacitor 150. The second conductive pattern 172 simultaneously overlaps the first active layer 121 and the first drain electrode 124 and, for example, overlaps the first drain region 121D of the first active layer 121. It is placed.

Referring to FIG. 4, the third conductive pattern 173 and the fourth conductive pattern 174 are disposed below the second active layer 131 of the second thin film transistor 130, It is placed to overlap in some areas.

Specifically, the third conductive pattern 173 extends from the power wiring PL and is electrically connected to the power wiring PL. The third conductive pattern 173 simultaneously overlaps the second active layer 131 and the second source electrode 133, for example, to overlap the second source region 131S of the second active layer 131. It is placed.

The fourth conductive pattern 174 extends from the first electrode 151 of the storage capacitor 150 and is electrically connected to the storage capacitor 150. The fourth conductive pattern 174 simultaneously overlaps the second active layer 131 and the second drain electrode 134 and, for example, overlaps the second drain region 131D of the second active layer 131. It is placed.

Referring to FIG. 5, the fifth conductive pattern 175 and the sixth conductive pattern 176 are disposed below the third active layer 141 of the third thin film transistor 140, It is placed to overlap in some areas.

Specifically, the fifth conductive pattern 175 extends from the data line DL and is electrically connected to the data line DL. The fifth conductive pattern 175 simultaneously overlaps the third active layer 141 and the third source electrode 143, for example, to overlap the third source region 141S of the third active layer 141. It is placed.

The sixth conductive pattern 176 extends from the first electrode 151 of the storage capacitor 150 and is electrically connected to the storage capacitor 150. The sixth conductive pattern 176 simultaneously overlaps the third active layer 141 and the third drain electrode 144 and, for example, overlaps the third drain region 141D of the third active layer 141. It is placed.

In the display device 100 according to an embodiment of the present invention, a contact hole through which the first active layer 121, the first source electrode 123, and the first drain electrode 124 are electrically connected, a second active layer ( 131) and the second source electrode 133 and the second drain electrode 134 are electrically connected to each other, and the third active layer 141, the third source electrode 143, and the third drain electrode 144 are electrically connected to each other. A plurality of conductive patterns 170 are arranged to overlap each other in electrically connected contact holes. As the plurality of conductive patterns 170 are arranged to overlap the contact hole, when forming a contact hole in the interlayer insulating layer 113, it is easy to adjust the size of the contact hole by reducing the thickness of the photoresist and minimize the remaining film in the contact hole. There is an effect that can be done. Hereinafter, the effect according to the arrangement of the plurality of conductive patterns 170 will be described in detail with reference to FIGS. 6A and 6B.

FIGS. 6A and 6B are diagrams for explaining the principle of improving resolution of fine contact holes in a display device according to an embodiment of the present invention. Specifically, FIG. 6A is a cross-sectional view of the display device according to the comparative example in which photoresist PR is applied on the interlayer insulating layer 113 to form a contact hole in the interlayer insulating layer 113. FIG. 6B is a cross-sectional view of a state in which photoresist (PR) is applied on the interlayer insulating layer 113 to form a contact hole in the interlayer insulating layer 113 in the display device 100 according to an embodiment of the present invention. am.

Referring to FIG. 6A, FIG. 6A is a cross-sectional view of a display device according to a comparative example, with the interlayer insulating layer 113 formed on the substrate 110. Specifically, the buffer layer 111, the first source region 121S of the first active layer 121, and the interlayer insulating layer 113 are sequentially formed on the substrate 110, and the interlayer insulating layer 113 is contacted. In a state where photoresist (PR) is applied on the interlayer insulating layer 113 to form a hole, the thickness from the substrate 110 to the photoresist (PR) is T, and the thickness of the photoresist (PR) is T1. am.

Meanwhile, the interlayer insulating layer 113 may be etched according to the pattern in which the photoresist (PR) is applied to the interlayer insulating layer 113. At this time, even if an exposure machine with the same performance is used, the size of the contact hole formed in the interlayer insulating layer 113 may vary depending on the thickness of the photoresist (PR) and the intensity of exposure energy, and in some cases, a residual film may remain.

Specifically, the thicker the photoresist (PR), the more exposure energy is required to form a contact hole in the interlayer insulating layer 113, and it may be difficult to form the contact hole size below a certain level. Additionally, when the thickness of the photoresist (PR) is thick and the resolution of the exposure machine is low, it is difficult to form a fine-sized contact hole, and problems with residual film remaining may also occur.

In this regard, referring to FIG. 6B, FIG. 6B is a cross-sectional view of the display device 100 according to an embodiment of the present invention, with the interlayer insulating layer 113 formed on the substrate 110. Specifically, a conductive pattern 170, a buffer layer 111, a first source region 121S of the first active layer 121, and an interlayer insulating layer 113 are sequentially formed on the substrate 11, and interlayer insulating In a state where photoresist (PR) is applied on the interlayer insulating layer 113 to form a contact hole in the layer 113, the thickness from the substrate 110 to the photoresist (PR) is T, and the photoresist ( The thickness of PR) is T2.

Specifically, the top surface of the photoresist (PR) may be flat. Even if the thickness of the components disposed under the photoresist PR is not constant, as the upper surface of the photoresist PR is flattened, the thickness from the photoresist PR to the substrate 110 may be constant. However, depending on the thickness of the components under the photoresist (PR), the thickness of the photoresist (PR) may vary.

Comparing the comparative example and the example, the thickness from the substrate 110 to the photoresist (PR) is the same as T. Specifically, in the comparative example, the sum of the thicknesses of the substrate 110, the buffer layer 111, the first active layer 121, the interlayer insulating layer 113, and the photoresist (PR) is T, and the photoresist (PR) ) has a thickness of T1. On the other hand, in the embodiment, the thickness is the sum of the thickness of each of the substrate 110, the buffer layer 111, the first active layer 121, the interlayer insulating layer 113, and the photoresist (PR) and the thickness of the conductive pattern 170. is T. Therefore, compared to the comparative example, in the embodiment, the conductive pattern 170 is further disposed, but the thickness of the photoresist (PR) can be reduced by the thickness of the conductive pattern 170, and the total thickness is the conductive pattern 170. It does not increase by the thickness of and can be the same as T.

Accordingly, in the display device 100 according to an embodiment of the present invention, the thickness of the photoresist PR can be reduced by further disposing the conductive pattern 170 on the substrate 110. If the thickness of the photoresist (PR) is reduced, the exposure energy required to form a contact hole in the interlayer insulating layer 113 under the photoresist (PR) can be reduced. Specifically, in the comparative example, the thickness of the photoresist (PR) is T1, which is thicker than the thickness T2 of the photoresist (PR) in the example. Therefore, the exposure energy required to form a contact hole in the interlayer insulating layer 113 in the comparative example is greater than the exposure energy required to form a contact hole in the interlayer insulating layer 113 in the embodiment. Additionally, when the photoresist (PR) is thick, if sufficient exposure energy is not irradiated, a residual film may remain in the contact hole. Therefore, when the same exposure energy is irradiated, the thinner the thickness of the photoresist (PR) is, the smaller the remaining film can be in the contact hole. Accordingly, the display device 100 according to an embodiment of the present invention can reduce the thickness of the photoresist PR by further arranging the conductive pattern 170. Accordingly, there is an effect of reducing the exposure energy required to form a contact hole in the interlayer insulating layer 113 and minimizing a residual film within the contact hole.

Meanwhile, the conductive pattern 170 is made of a conductive material, as described above, and may be made of a reflective metal material. When exposure energy is irradiated to form a contact hole in the interlayer insulating layer 113, the exposure energy passing through the interlayer insulating layer 113 and the active layers 121, 131, and 141 toward the bottom of the substrate 110 is conductive. It may be reflected from the pattern 170 and re-reflected onto the substrate 110 . Therefore, exposure energy is irradiated once from the top of the interlayer insulating layer 113 and once more from the bottom, so the exposure effect can be improved.

Therefore, the conductive pattern 170 according to an embodiment of the present invention passes through the photoresist (PR), the interlayer insulating layer 113, the active layers 121, 131, and 141, and the buffer layer 111 to form the conductive pattern 170. ) can be reflected back to the top of the conductive pattern 170. Accordingly, the conductive pattern 170 can also function as a reflection pattern that can reflect exposure energy, and the exposure effect can be maximized by recycling the exposure energy. In addition, as the exposure effect improves, the performance of the exposure machine, that is, the resolution, can be further improved even if the same exposure machine is used. Therefore, by improving the resolution and exposure effect of the exposure machine, it can be easy to adjust the size of the contact hole, and in particular, it can be easy to form a fine contact hole of a smaller size. Accordingly, the margin area required to form a fine contact hole can be reduced and the aperture ratio can be improved.

Figure 7 is an enlarged view of a sub-pixel (SP) of a display device according to another embodiment of the present invention. Referring to FIG. 7, the display device 200 of FIG. 7 is different from the display device 100 of FIGS. 1 to 5 only in the third conductive pattern 273, and other configurations are substantially the same, so there is no overlap. We will omit the explanation.

Referring to FIG. 7 , the third conductive pattern 273 extends from the first electrode 151 of the storage capacitor 150 and is electrically connected to the storage capacitor 150. The third conductive pattern 273 simultaneously overlaps the second active layer 131 and the second source electrode 133, for example, to overlap the second source region 131S of the second active layer 131. It is placed.

Like the third conductive pattern 273, the fourth conductive pattern 174 also extends from the first electrode 151 of the storage capacitor 150 and is electrically connected to the storage capacitor 150.

The third conductive pattern 273 and the fourth conductive pattern 174 may extend from the first electrode 151 of the storage capacitor 150 and be included in the first electrode 151 of the storage capacitor 150. Accordingly, the third conductive pattern 273 and the fourth conductive pattern 174 function as the first electrode 151 of the storage capacitor 150 and the third conductive pattern 273 and fourth conductive pattern 174, respectively. can do. And the third conductive pattern 273 and the fourth conductive pattern 174 are formed not only in the second source region 131S and the second drain region 131D of the second active layer 131, but also in the second channel region 131C, respectively. You can overlap at the same time.

In the display device 200 according to another embodiment of the present invention, the third conductive pattern 273 and the fourth conductive pattern 174 may form one electrode and overlap the entire second active layer 131. can do. Each of the plurality of conductive patterns 170 is one of the data line (DL), power line (PL), reference voltage line (RL), or the first electrode 151 of the storage capacitor 150 disposed at the shortest distance from the contact hole. It can be extended from. The plurality of conductive patterns 170 are arranged to overlap the contact hole, so that during the process for forming the contact hole, the thickness of the photoresist (PR) can be reduced, thereby reducing the exposure energy required to form the contact hole. Remaining film inside can be minimized. In addition, the conductive pattern 170 functions as a reflection pattern that reflects exposure energy, so that the exposure energy is irradiated once more to the structure on the conductive pattern 170, thereby maximizing the exposure effect. As the exposure effect improves, it becomes easier to form fine contact holes, and the aperture ratio can be improved by reducing the margin area required for contact hole formation. Additionally, the conductive pattern 170 may extend from the shortest distance from the contact hole, and its location and design may be freely changed depending on the design of the display device 200. Therefore, in the display device 200 according to another embodiment of the present invention, the degree of freedom in designing the conductive pattern 270 can be increased, the size of the contact hole can be reduced by improving the resolution of the contact hole, and the aperture ratio can be improved by minimizing the residual film. You can.

A display device according to embodiments of the present invention can be described as follows.

A display device according to an embodiment of the present invention includes a substrate, a thin film transistor disposed on the substrate, an active layer including a channel region, a gate electrode on the active layer, a source electrode, and a drain electrode, and below the active layer, It includes a first conductive pattern simultaneously overlapping the active layer and the source electrode, and a second conductive pattern simultaneously overlapping the active layer and the drain electrode under the active layer.

According to another feature of the present invention, the first conductive pattern and the second conductive pattern may be made of the same material and disposed on the same layer.

According to another feature of the present invention, the first conductive pattern may overlap the contact hole where the active layer and the source electrode are connected, and the second conductive pattern may overlap the contact hole where the active layer and the drain electrode are connected.

According to another feature of the present invention, the first conductive pattern and the second conductive pattern may form one electrode and overlap the channel region.

According to another feature of the present invention, a voltage may be applied to the conductive pattern.

According to another feature of the present invention, each of the first conductive pattern and the second conductive pattern may be electrically connected to one of a data line, a reference voltage line, one electrode of a storage capacitor, and a high potential voltage line.

A display device according to another embodiment of the present invention includes a substrate on which a plurality of thin film transistors including an active layer, a gate electrode on the active layer, a source electrode, and a drain electrode are disposed, and an active layer of the plurality of thin film transistors, It includes an insulating layer having a plurality of contact holes exposing the active layer, a plurality of reflective patterns disposed between the substrate and the active layer, and overlapping the plurality of contact holes.

According to another feature of the present invention, it further includes a data line and a power line disposed between the substrate and the active layer, and one electrode of a plurality of storage capacitors disposed between the substrate and the active layer, and each of the plurality of reflection patterns is a data line. , may extend from one of the power wiring and one electrode of a plurality of storage capacitors.

According to another feature of the present invention, it further includes a reference voltage line disposed between the substrate and the active layer, and the plurality of thin film transistors include a first thin film transistor electrically connected to the data line, a first thin film transistor, a power line, and It may include a second thin film transistor and a third thin film transistor electrically connected to the storage capacitor and the reference voltage line.

According to another feature of the present invention, the plurality of reflection patterns may include a first reflection pattern electrically connected to a data line and a second reflection pattern electrically connected to one electrode of the storage capacitor.

According to another feature of the present invention, the plurality of reflective patterns may include a third reflective pattern electrically connected to the power wiring and a fourth reflective pattern electrically connected to one electrode of the storage capacitor.

According to another feature of the present invention, the plurality of reflection patterns may include a fifth reflection pattern electrically connected to a data line and a sixth reflection pattern electrically connected to one electrode of the storage capacitor.

According to another feature of the present invention, each of the plurality of reflection patterns may extend from one of a data line, a power line, a reference voltage line, or one electrode of a storage capacitor disposed at the shortest distance from the contact hole.

Although embodiments of the present invention have been described in more detail with reference to the accompanying drawings, the present invention is not necessarily limited to these embodiments, and various modifications may be made without departing from the technical spirit of the present invention. . Accordingly, the embodiments disclosed in the present invention are not intended to limit the technical idea of the present invention but are for illustrative purposes, and the scope of the technical idea of the present invention is not limited by these embodiments. Therefore, the embodiments described above should be understood in all respects as illustrative and not restrictive. The scope of protection of the present invention should be interpreted in accordance with the claims below, and all technical ideas within the equivalent scope should be construed as being included in the scope of rights of the present invention.

100, 200: display device
110: substrate
111: buffer layer
112: Gate insulating layer
113: Interlayer insulation layer
114: Flattening layer
115: bank
120: first thin film transistor
121: first active layer
121C: 1st channel area
121S: first source area
121D: first drain area
122: first gate electrode
123: first source electrode
124: first drain electrode
130: second thin film transistor
131: second active layer
131C: second channel area
131S: second source area
131D: second drain area
132: second gate electrode
133: second source electrode
134: second drain electrode
140: Third thin film transistor
141: third active layer
141C: Third channel area
141S: Third source area
141D: third drain area
142: third gate electrode
143: third source electrode
144: third drain electrode
150: storage capacitor
151: first electrode
152: second electrode
153: third electrode
160: Organic light emitting device
161: anode
162: Organic light emitting layer
163: cathode
170, 270: Challenge pattern
171: First challenge pattern
172: Second challenge pattern
173, 273: Third challenge pattern
174: Fourth challenge pattern
175: Fifth challenge pattern
176: The 6th challenge pattern
AA: display area
NA: Non-display area
SP: Sub pixel
RL: reference voltage wiring
DL: data wiring
PL: power wiring
GL: Gate wiring
PR: Photoresist
T1, T2: Thickness of photoresist

Claims (13)

A substrate on which a plurality of sub-pixels are arranged;
A first active layer disposed in each of the plurality of sub-pixels and including a first channel region, a first source region, and a first drain region, a first gate electrode on the first active layer, a first source electrode, and a first A first thin film transistor including a drain electrode;
A second active layer disposed in each of the plurality of sub-pixels and including a second channel region, a second source region, and a second drain region, a second gate electrode on the second active layer, a second source electrode, and a second a second thin film transistor including a drain electrode;
A third active layer disposed in each of the plurality of sub-pixels and including a third channel region, a third source region, and a third drain region, a third gate electrode, a third source electrode, and a third active layer on the third active layer. A third thin film transistor including a drain electrode;
a storage capacitor disposed in each of the plurality of sub-pixels and including a first electrode, a second electrode on the first electrode, and a third electrode on the second electrode;
a data wire disposed on the same layer as the first electrode and electrically connected to the first source electrode of each of the plurality of sub-pixels;
a power wiring disposed on the same layer as the first electrode and electrically connected to the second source electrode of each of the plurality of sub-pixels;
a first conductive pattern extending from the data line and overlapping the first source region and the contact hole of the first source electrode;
a second conductive pattern extending from the first electrode and overlapping the first drain region and the contact hole of the first drain electrode;
a third conductive pattern disposed on the same layer as the power wiring and overlapping the second source region and the contact hole of the second source electrode;
a fourth conductive pattern extending from the first electrode and overlapping the second drain region and the contact hole of the second drain electrode;
a fifth conductive pattern extending from the data line and overlapping the third source region and the contact hole of the third source electrode;
a sixth conductive pattern extending from the first electrode and overlapping the third drain region and the contact hole of the third drain electrode; and
Between the first conductive pattern and the second conductive pattern and the first active layer, between the third conductive pattern and the fourth conductive pattern and the second active layer, between the fifth conductive pattern and the sixth conductive pattern, and A display device comprising a buffer layer disposed between the third active layers. According to paragraph 1,
The first conductive pattern, the second conductive pattern, the third conductive pattern, the fourth conductive pattern, the fifth conductive pattern, and the sixth conductive pattern are made of the same material and disposed on the same layer. . According to paragraph 1,
The display device, wherein the data wire, the first conductive pattern, and the fifth conductive pattern are integrated with each other. According to paragraph 3,
The first electrode, the second conductive pattern, the fourth conductive pattern, and the sixth conductive pattern of the storage capacitor are integrated with each other,
The display device wherein the power wiring and the third conductive pattern are integrated with each other. According to paragraph 1,
The first electrode, the second conductive pattern, the third conductive pattern, the fourth conductive pattern, and the sixth conductive pattern of the storage capacitor are integrated with each other. According to paragraph 1,
Further comprising a reference voltage wire disposed on the same layer as the data wire and electrically connected to the third source electrode of each of the plurality of sub-pixels,
The fifth conductive pattern disposed below the third source electrode is disposed to be spaced apart from the reference voltage wire. A substrate on which a plurality of sub-pixels are arranged;
A first active layer disposed in each of the plurality of sub-pixels and including a first channel region, a first source region, and a first drain region, a first gate electrode on the first active layer, a first source electrode, and a first A first thin film transistor including a drain electrode;
A second active layer disposed in each of the plurality of sub-pixels and including a second channel region, a second source region, and a second drain region, a second gate electrode on the second active layer, a second source electrode, and a second a second thin film transistor including a drain electrode;
A third active layer disposed in each of the plurality of sub-pixels and including a third channel region, a third source region, and a third drain region, a third gate electrode, a third source electrode, and a third active layer on the third active layer. A third thin film transistor including a drain electrode;
a storage capacitor disposed in each of the plurality of sub-pixels and including a first electrode, a second electrode on the first electrode, and a third electrode on the second electrode;
a data wire disposed on the same layer as the first electrode and electrically connected to the first source electrode of each of the plurality of sub-pixels;
a power wire disposed on the same layer as the first electrode and electrically connected to the second source electrode of each of the plurality of sub-pixels;
Between the first active layer and the first source electrode and the first drain electrode, between the second active layer and the second source electrode and the second drain electrode, between the third active layer and the third source electrode, and a plurality of electrodes disposed between the third drain electrodes and exposing the first source region, the first drain region, the second source region, the second drain region, the third source region, and the third drain region. an insulating layer with contact holes disposed;
a buffer layer disposed between the substrate and the first active layer, between the substrate and the second active layer, and between the substrate and the third active layer; and
disposed between the substrate and the buffer layer and comprising a plurality of reflective patterns arranged to overlap the plurality of contact holes,
The plurality of reflective patterns are,
a first reflection pattern extending from the data line and overlapping a contact hole exposing the first source region among the plurality of contact holes;
a second reflection pattern extending from the first electrode and overlapping a contact hole exposing the first drain region among the plurality of contact holes;
a third reflection pattern disposed on the same layer as the power wiring and overlapping a contact hole exposing the second source region among the plurality of contact holes;
a fourth reflection pattern extending from the first electrode and overlapping a contact hole exposing the second drain region among the plurality of contact holes;
a fifth reflection pattern extending from the data line and overlapping a contact hole exposing the third source region among the plurality of contact holes; and
A display device comprising a sixth reflection pattern extending from the first electrode and overlapping a contact hole exposing the third drain region among the plurality of contact holes. In clause 7,
The display device wherein the plurality of reflection patterns, the data wire, the power wire, and the first electrode are made of the same material and disposed on the same layer. According to clause 8,
Further comprising a reference voltage wire disposed between the substrate and the buffer layer and electrically connected to the third source electrode,
The reference voltage wire and the fifth reflection pattern are arranged on the same layer and spaced apart from each other,
The third source electrode is disposed on the buffer layer, and at least a portion of the third source electrode overlaps the fifth reflection pattern. According to clause 9,
The third reflection pattern extends from the power wiring toward the second source area. According to clause 9,
The third reflection pattern extends from the first electrode toward the second source region,
The display device wherein the first electrode, the second reflection pattern, the third reflection pattern, the fourth reflection pattern, and the sixth reflection pattern are integrated with each other. According to clause 9,
A display device, wherein the plurality of reflective patterns are made of a metal material. According to clause 9,
Each of the plurality of reflection patterns extends from one of the data wire, the power wire, the reference voltage wire, or the first electrode of the storage capacitor disposed at the shortest distance from the plurality of contact holes.

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