KR102653956B1 - Smeiconductor device - Google Patents

Abstract

Examples include a substrate; A first conductivity type semiconductor layer disposed on the substrate, a second conductivity type semiconductor layer, and an active layer disposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, and the second conductivity type semiconductor layer. A light emitting structure including a semiconductor layer and a recess penetrating the active layer; a first electrode disposed on the light emitting structure and electrically connected to the first conductive semiconductor layer; a second electrode disposed on the light emitting structure and electrically connected to the second conductive semiconductor layer; a first pad disposed on the first electrode; and a second pad disposed on the second electrode, wherein the recess separates the second conductive semiconductor layer and the active layer into an active area and a non-active area, and the recess surrounds the active area. It is extended and arranged so that
The second pad extends to the top of the recess on the second electrode and initiates a semiconductor device disposed.

Description

Semiconductor device {SMEICONDUCTOR DEVICE}

The embodiment relates to a semiconductor device.

Semiconductor devices containing compounds such as GaN and AlGaN have many advantages, such as having a wide and easily adjustable band gap energy, and can be used in a variety of ways, such as light emitting devices, light receiving devices, and various diodes.

In particular, light-emitting devices such as light emitting diodes and laser diodes using group 3-5 or group 2-6 compound semiconductor materials have been developed into red, green, and green colors through the development of thin film growth technology and device materials. Various colors such as blue and ultraviolet rays can be realized, and efficient white light can also be realized by using fluorescent materials or combining colors. Compared to existing light sources such as fluorescent lights and incandescent lights, low power consumption, semi-permanent lifespan, and fast response are possible. It has the advantages of speed, safety, and environmental friendliness.

In addition, when light-receiving devices such as photodetectors or solar cells are manufactured using group 3-5 or group 2-6 compound semiconductor materials, the development of device materials absorbs light in various wavelength ranges to generate photocurrent. By doing so, light of various wavelengths, from gamma rays to radio wavelengths, can be used. In addition, it has the advantages of fast response speed, safety, environmental friendliness, and easy control of device materials, so it can be easily used in power control, ultra-high frequency circuits, or communication modules.

Therefore, semiconductor devices can replace the transmission module of optical communication means, the light emitting diode backlight that replaces the cold cathode fluorescence lamp (CCFL) that constitutes the backlight of LCD (Liquid Crystal Display) display devices, and fluorescent or incandescent light bulbs. Applications are expanding to include white light-emitting diode lighting devices, automobile headlights and traffic lights, and sensors that detect gas or fire. Additionally, the applications of semiconductor devices can be expanded to high-frequency application circuits, other power control devices, and communication modules.

In particular, light-emitting devices that emit light in the ultraviolet wavelength range have a curing or sterilizing effect and can be used for curing, medical purposes, and sterilization.

Recently, research on ultraviolet light-emitting devices has been active, but there are still problems with ultraviolet light-emitting devices that deteriorate their light output due to peeling and oxidation from moisture.

The embodiment provides a flip chip type red semiconductor device.

In addition, a semiconductor device with improved reliability due to improved heat dissipation is provided.

Additionally, a semiconductor device with excellent current dispersion effect is provided.

The problem to be solved in the embodiment is not limited to this, and also includes purposes and effects that can be understood from the means of solving the problem or the embodiment described below.

A semiconductor device according to an embodiment of the present invention includes a substrate; A first conductivity type semiconductor layer disposed on the substrate, a second conductivity type semiconductor layer, and an active layer disposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, and the second conductivity type semiconductor layer. A light emitting structure including a semiconductor layer and a recess penetrating the active layer; a first electrode disposed on the light emitting structure and electrically connected to the first conductive semiconductor layer; a second electrode disposed on the light emitting structure and electrically connected to the second conductive semiconductor layer; a first pad disposed on the first electrode; and a second pad disposed on the second electrode, wherein the recess separates the second conductive semiconductor layer and the active layer into an active area and a non-active area, and the recess surrounds the active area. The second pad is disposed to extend from the second electrode to the top of the recess.

The recess is a bottom surface; an inner slope connected to the bottom surface and adjacent to the active area; and an outer inclined surface connected to the bottom surface and facing the inner inclined surface, wherein one end of the second pad may be disposed to extend on the inner inclined surface of the recess.

One end of the second pad may be disposed to extend onto the bottom surface of the recess and the outer inclined surface of the recess.

The second pad may be disposed to extend onto the second conductivity type semiconductor layer on the inactive area, and one end of the second pad may be disposed between the recess and an outermost surface of the second conductivity type semiconductor layer.

The light emitting structure includes a concave portion through which the first conductive semiconductor layer is exposed, and the concave portion may be disposed to extend outside the inactive area.

A ratio between the maximum width in the horizontal direction of the recess and the maximum width in the horizontal direction of the second conductive semiconductor layer on the inactive area may be 1:0.5 to 1:5.

a first bump disposed on the first pad; and a second bump disposed on the second pad and spaced apart from the first bump.

The first electrode may be disposed on the first conductivity type semiconductor layer on the concave portion, and the second electrode may be disposed on the second conductivity type semiconductor layer on the active area.

It further includes a first insulating layer disposed on the light emitting structure, wherein the first insulating layer extends from the second conductivity type semiconductor layer on the active area to the first conductivity type semiconductor layer on the recess and concave portion. It may be disposed to extend and cover the exposed second conductive semiconductor layer and the active layer.

The first insulating layer may be disposed to extend to the first electrode.

The inactive area may be arranged to surround the recess, the active area may be electrically connected to the second electrode, and the inactive area may be electrically separated from the second electrode.

According to the embodiment, the semiconductor device may be implemented in a flip chip form.

Additionally, heat dissipation is improved, making it possible to manufacture light-emitting devices with improved reliability.

Additionally, a semiconductor device with excellent current dispersion effect can be manufactured.

The various and beneficial advantages and effects of the present invention are not limited to the above-described content, and may be more easily understood through description of specific embodiments of the present invention.

1 is a plan view of a semiconductor device according to an embodiment;
Figure 2 is a cross-sectional view taken along line AA' in Figure 1;
Figure 3a is an enlarged view of part K in Figure 2,
Figure 3b is an enlarged view of portion L in Figure 3a,
Figure 4 is a cross-sectional view taken along line BB' in Figure 1;
5 is a plan view of a semiconductor device according to another embodiment;
Figure 6 is a cross-sectional view taken along line CC' in Figure 5;
Figure 7 is a modified example of Figure 1,
8 is a conceptual diagram of a semiconductor device package according to an embodiment,
9A to 9H are diagrams illustrating a method of manufacturing a semiconductor device according to an embodiment.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the attached drawings.

However, the technical idea of the present invention is not limited to some of the described embodiments, but may be implemented in various different forms, and as long as it is within the scope of the technical idea of the present invention, one or more of the components may be optionally used between the embodiments. It can be used by combining and replacing.

In addition, terms (including technical and scientific terms) used in the embodiments of the present invention, unless explicitly specifically defined and described, are generally understood by those skilled in the art to which the present invention pertains. It can be interpreted as meaning, and the meaning of commonly used terms, such as terms defined in a dictionary, can be interpreted by considering the contextual meaning of the related technology.

Additionally, the terms used in the embodiments of the present invention are for describing the embodiments and are not intended to limit the present invention.

In this specification, the singular may also include the plural unless specifically stated in the phrase, and when described as "at least one (or more than one) of A and B and C", it is combined with A, B, and C. It can contain one or more of all possible combinations.

Additionally, when describing the components of an embodiment of the present invention, terms such as first, second, A, B, (a), and (b) may be used.

These terms are only used to distinguish the component from other components, and are not limited to the essence, order, or order of the component.

And, when a component is described as being 'connected', 'coupled' or 'connected' to another component, the component is not only directly connected, coupled or connected to that other component, but also is connected to that component. It may also include cases where other components are 'connected', 'combined', or 'connected' due to another component between them.

Additionally, when described as being formed or disposed "above" or "below" each component, "above" or "below" refers not only to cases where two components are in direct contact with each other, but also to one This also includes cases where another component described above is formed or placed between two components. In addition, when expressed as "top (above) or bottom (bottom)", it may include not only the upward direction but also the downward direction based on one component.

The light emitting structure according to an embodiment of the present invention can output light in the ultraviolet wavelength range. For example, the light-emitting structure may output light in the near-ultraviolet wavelength range (UV-A), light in the far-ultraviolet wavelength range (UV-B), or light in the deep ultraviolet wavelength range (UV-C). Can be printed. The wavelength range may be determined by the Al composition ratio of the light emitting structure 120. In addition, the light emitting structure can output light of various wavelengths with different light intensities, and the peak wavelength of the light with the strongest intensity relative to the intensity of other wavelengths among the wavelengths of light emitted is near ultraviolet rays, far ultraviolet rays, or deep ultraviolet rays. It could be ultraviolet rays.

For example, light in the near-ultraviolet wavelength range (UV-A) may have a wavelength in the range of 320 nm to 420 nm, light in the far-ultraviolet wavelength range (UV-B) may have a wavelength in the range of 280 nm to 320 nm, and deep ultraviolet rays may have a wavelength in the range of 280 nm to 320 nm. Light in the wavelength range (UV-C) may have a wavelength ranging from 100 nm to 280 nm.

FIG. 1 is a plan view of a semiconductor device according to an embodiment, and FIG. 2 is a cross-sectional view taken along line AA′ in FIG. 1 .

Referring to Figures 1 and 2, the semiconductor device 10 according to one embodiment includes a substrate 110, a first conductive semiconductor layer 121, a second conductive semiconductor layer 123, and an active layer 122. and a light emitting structure 120 disposed on the substrate 110, a first insulating layer 140 partially disposed on the light emitting structure 120, and a first conductive semiconductor layer 121 that is electrically connected to the first conductive semiconductor layer 121. The first electrode 131, the second electrode 132 electrically connected to the second conductive semiconductor layer 123, the first pad 151 and the second electrode 132 disposed on the first electrode 131. ) and a second pad 152 disposed on the first insulating layer 140, the first pad 151, and the second insulating layer 160 partially covering the second pad 152.

First, the substrate 110 may be placed on one side of the semiconductor device 10. For example, the substrate 110 may be disposed below the semiconductor device 10 . The substrate 110 may be a transparent and insulating substrate 110 . The substrate 110 may be made of at least one of Al, Si, O, Zn, Mg, Ga, P, and F, and specifically, sapphire (Al ₂ O ₃ ), SiC, GaN, ZnO, Si, GaP, InP, and It may be formed of a material selected from Ge, but is not particularly limited as long as it is a material that transmits light generated from the light emitting structure 110.

A concavo-convex portion may be formed at the bottom of the substrate 110, and the concave-convex portion may be made of a textured structure to improve light extraction efficiency. For example, the semiconductor device 10 is of a flip type and light can be emitted upward through the substrate 110, and the light emitted from the inside to the outside of the semiconductor device 10 can be increased by the uneven portion of the substrate 110. there is. For example, the substrate 110 may be made of a material with a refractive index between 1 and 3.4 to minimize total reflection at the interface in contact with the outside. However, the substrate 110 is not limited to this structure and may have various structures.

The light emitting structure 120 may include a first conductive semiconductor layer 121, an active layer 122, and a second conductive semiconductor layer 123. At this time, the first conductivity type semiconductor layer 121, the active layer 122, and the second conductivity type semiconductor layer 123 may be arranged in the first direction (X direction). Hereinafter, the first direction (X direction), which is the thickness direction of each layer, is defined as the vertical direction, and the second direction (Y direction) perpendicular to the first direction (X direction) is defined as the horizontal direction. And the third direction (Z direction) is a direction perpendicular to both the first direction (X direction) and the second direction (Y direction).

The first conductive semiconductor layer 121 may be implemented as a compound semiconductor such as group III-V or group II-VI, and may be doped with a first dopant. The first conductive semiconductor layer 121 is made of a semiconductor material with a composition formula of Inx1Aly1Ga1-x1-y1N (0≤x1≤1, 0≤y1≤1, 0≤x1+y1≤1), for example, GaN, AlGaN, It can be selected from InGaN, InAlGaN, etc. And, the first dopant may be an n-type dopant such as Si, Ge, Sn, Se, or Te. When the first dopant is an n-type dopant, the first conductive semiconductor layer 121 doped with the first dopant may be an n-type semiconductor layer.

The active layer 122 may be disposed between the first conductive semiconductor layer 121 and the second conductive semiconductor layer 123. The active layer 122 may be a layer in which electrons (or holes) injected through the first conductive semiconductor layer 121 and holes (or electrons) injected through the second conductive semiconductor layer 123 are recombined. As electrons and holes recombine in the active layer 122, electrons transition to a low energy level, and light having a wavelength corresponding to the bandgap energy of a well layer included in the active layer 122, which will be described later, can be generated. Among the wavelengths of light emitted by the semiconductor device, the wavelength of light with the highest intensity may be ultraviolet rays, and the ultraviolet rays may be near ultraviolet rays, far ultraviolet rays, or deep ultraviolet rays described above.

The active layer 122 may have any one of a single well structure, a multi-well structure, a single quantum well structure, a multi quantum well (MQW) structure, a quantum dot structure, or a quantum wire structure, and the active layer 122 The structure is not limited to this.

The second conductive semiconductor layer 123 is formed on the active layer 122 and may be implemented with a compound semiconductor such as group III-V or group II-VI. Dopants may be doped. The second conductive semiconductor layer 123 is made of a semiconductor material with a composition formula of Inx5Aly2Ga1-x5-y2N (0≤x5≤1, 0≤y2≤1, 0≤x5+y2≤1) or AlInN, AlGaAs, GaP, GaAs. , GaAsP, and AlGaInP. When the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, Ba, etc., the second conductive semiconductor layer 123 doped with the second dopant may be a p-type semiconductor layer.

Additionally, an electron blocking layer (not shown) may be disposed between the active layer 122 and the second conductive semiconductor layer 123. The electron blocking layer (not shown) allows electrons supplied from the first conductive semiconductor layer 121 to the active layer 122 to recombine in the active layer 122 and not emit light, but to escape into the second conductive semiconductor layer 123. By blocking the outgoing flow, the probability of electrons and holes recombining within the active layer 122 can be increased. The energy band gap of the electron blocking layer (not shown) may be larger than that of the active layer 122 and/or the second conductive semiconductor layer 123.

The electron blocking layer (not shown) is a semiconductor material with the composition formula In _x1 Al _y1 Ga _{1 -x1- y1} N (0≤x1≤1, 0≤y1≤1, 0≤x1+y1≤1), for example. For example, it may be selected from AlGaN, InGaN, InAlGaN, etc., but is not limited thereto. The electron blocking layer (not shown) may be alternately composed of a first layer (not shown) having a high aluminum composition and a second layer (not shown) having a low aluminum composition.

And the first conductive semiconductor layer 121, the active layer 122, and the second conductive semiconductor layer 123 may all contain aluminum. Accordingly, the first conductivity type semiconductor layer 121, the active layer 122, and the second conductivity type semiconductor layer 123 may be AlGaN. However, it is not necessarily limited to this.

In addition, when the first conductive semiconductor layer 121, the active layer 122, and the second conductive semiconductor layer 123 all contain aluminum, the electron blocking layer (not shown) has an aluminum composition of 50% to 50%. It could be 90%. If the aluminum composition of the electron blocking layer (not shown) is less than 50%, the height of the energy barrier to block electrons may be insufficient, and the light emitted from the active layer 122 may be absorbed by the electron blocking layer (not shown). And, if the aluminum composition exceeds 90%, the electrical characteristics of the semiconductor device may deteriorate.

Additionally, the light emitting structure 120 may include a concave portion 127 and a recess 128 that are concave on the second conductive semiconductor layer 123 toward the first conductive semiconductor layer 121 . That is, the concave portion 127 may be disposed to penetrate the second conductive semiconductor layer 123 and the active layer 122 and expose a partial area of the first conductive semiconductor layer 121. In addition, the recess 128 is arranged to penetrate through the second conductive semiconductor layer 123 and the active layer 122 and to a partial region of the first conductive semiconductor layer 121. ) may be exposed. Accordingly, the first conductive semiconductor layer 121 may be exposed in some areas by the concave portion 127 and the recess 128.

The concave portion 127 may be disposed to extend from the outside of the upper surfaces 123a and 123b of the second conductive semiconductor layer 123 to the outside of the semiconductor device. For example, the concave portion 127 may be disposed outside the outermost side of the upper surface of the second conductive semiconductor layer 123. Accordingly, it may be placed in an inactive region (RI), which will be described later. And the concave portion 127 may include an inclined surface 127a and a bottom surface 127b.

The inclined surface 127a extends from the outermost side of the upper surface of the second conductive semiconductor layer 123 and penetrates the second conductive semiconductor layer 123 and the active layer 122, so that the second conductive semiconductor layer 123 It may include an outermost side and an outermost side of the active layer 122. Additionally, the outermost side of the second conductive semiconductor layer 123 and the outermost side of the active layer 122 may be disposed outside the outermost side of the upper surface of the second conductive semiconductor layer 123.

Additionally, the outermost side of the second conductive semiconductor layer 123 and the outermost side of the active layer 122 may be inclined at a predetermined angle based on the upper surface of the second conductive semiconductor layer 123. This angle can be changed by an etching process.

In addition, the inclined surface 127a may further include the outermost surface of the second conductive semiconductor layer 123 and the outermost surface of the first conductive semiconductor layer 121 extending along the outermost surface of the active layer 122. The outer surface of the first conductive semiconductor layer 121 may extend to a predetermined height along the outermost surface of the active layer 122.

And the concave portion 127 may include a bottom surface 127b extending from the inclined surface 127a. The bottom surface 127b may be arranged to have a predetermined angle with the inclined surface 127a, and may have a flat structure in the horizontal direction so that the first electrode 131, which will be described later, is easily placed. However, it is not limited to this.

Additionally, the bottom surface 127b is part of the upper surface of the first conductive semiconductor layer 121 and may be spaced apart from the outermost surfaces of the active layer 122 and the second conductive semiconductor layer 123.

Additionally, the concave portion 127 may be disposed on the outside of the recess 128, which will be described later, to surround the recess 128.

Additionally, the recess 128 may be disposed to extend adjacent to the edge of the light emitting structure 120. In particular, the recess 128 may be disposed to extend adjacent to an edge of the active layer 122 or the second conductivity type semiconductor layer 123. In other words, the recess 128 may be disposed to extend adjacent to the inclined surface 127a of the concave portion 127. Additionally, the recess 128 may be spaced apart from the concave portion 127 and may be arranged continuously. For example, when the recesses 128 are arranged continuously, the recesses 128 on a plane (ZY plane) may be in the form of a closed loop in the light emitting structure 128. The following description will be based on the case of a closed loop type.

Accordingly, the light emitting structure 120 may be divided into an active area (RA) and an inactive area (RI) by the recess 128. Here, the active area RA may be located inside the recess 128 in the light emitting structure 120, and the inactive area RI may be located outside the recess 128 in the light emitting structure 120.

Additionally, the active layer 122 in the active area RA and the active layer 122 in the inactive area RI may be spaced apart from each other. The active area RA may be a light-emitting area in which the internal active layer 122 is disposed adjacent to the second electrode 132, where electrons and holes combine. In contrast, the active layer 122 inside the inactive region RI is spaced apart from the active layer 122 of the active region RA and is disposed closer to the edge of the light emitting structure 120 than the second electrode 132. It may be a non-emission area where electron and hole bonding does not occur.

Due to this configuration, the second insulating layer 160 surrounding the side and top surfaces of the light emitting structure 120 is peeled off due to heat generated by light emission of the semiconductor device, external high temperature and high humidity, and differences in thermal expansion coefficients between the light emitting structures 120. , even if cracks, etc. occur, moisture or contaminants penetrating into the light emitting structure 120 from the outside can be prevented from oxidizing the active layer 122 of the active region RA, which is the light emitting area.

Specifically, in the semiconductor device according to one embodiment, the recess 128 may block direct connection between the active layer 122 of the active region RA and the active layer 122 of the inactive region RI. Accordingly, when the active layer 122 in the inactive region (RI) adjacent to the sidewall of the light emitting structure 120 is exposed to the outside due to the above-described peeling, the active layer 122 in the inactive region (RI) may be oxidized due to exposure. You can.

However, since the active layer 122 is spaced apart within the active region (RA) and the inactive region (RI) by the recess 128, even if the active layer 122 in the inactive region (RI) is oxidized, the active layer in the active region (RA) (122) can be protected from the above oxidation. That is, the recess 128 can protect the active layer 122 in the light emitting area from oxidation from external moisture.

In particular, when a semiconductor device generates ultraviolet light, the energy band gap and Al concentration of the active layer 122 increase compared to when the semiconductor device generates visible light, so it may be more vulnerable to oxidation. Accordingly, the semiconductor device described in this specification can greatly improve reliability when generating ultraviolet light.

Additionally, when the light emitting structure 120 generates ultraviolet light, the light emitting structure 120 has a high bandgap energy, so the current dispersion characteristics of the light emitting structure 120 may decrease and the effective light emitting area may decrease.

For example, when the light emitting structure 120 is made of a GaN-based compound semiconductor, in order to emit ultraviolet light, the light emitting structure is Al _x Ga _(1-x) N (0≤x≤1) containing a large amount of Al. It can be composed of . Here, as the x value, meaning the Al content, increases, the resistance of the light emitting structure 120 may also increase, and the current dispersion and current injection characteristics of the light emitting structure 120 may deteriorate.

Accordingly, current spreading in the light emitting structure 120 may occur within the active area RA. Accordingly, the semiconductor device 10 described in this specification can maintain light output even though it has a recess 128. In addition, as described above, the area where the recess 128 is oxidized by moisture, etc. is limited to the outer area of the recess 128 (e.g., the active area (RA)), so that the effective light-emitting area (e.g., the inactive area) Light output may be maintained by protecting the active layer 122 located in (RI)) from oxidation. Here, the effective light emitting area refers to an area having light output greater than a predetermined ratio (eg, 40%) of the maximum light output.

Additionally, the upper surface of the second conductive semiconductor layer 123 may be divided into a first upper surface 123a and a second upper surface 123b by the recess 128. The first upper surface 123a may be disposed inside the recess 128, and the second upper surface 123b may be disposed outside the recess 128. The first upper surface 123a and the second upper surface 123b are spaced apart and may be electrically separated by a recess 128.

The first electrode 131 may be disposed on the first conductive semiconductor layer 121 exposed by mesa etching and electrically connected to the first conductive semiconductor layer 121. In particular, the concave portion 127 formed by mesa etching may be disposed outside the recess 128 to surround the recess 128 .

Additionally, the first electrode 131 may be disposed on a low-concentration layer of the active layer 122 to ensure relatively smooth current injection characteristics. That is, the first electrode 131 may be disposed adjacent to the low-concentration layer area of the first conductive semiconductor layer 121. This is because the high-concentration layer of the first conductive semiconductor layer 121 has a high Al concentration and has relatively low current diffusion characteristics. However, it is not limited to this configuration.

Additionally, the first electrode 131 may be disposed on the first conductive semiconductor layer 121 outside the recess 128. For example, the first electrode 131 may be disposed on the bottom surface 127a of the concave portion 127. And when current is injected through the first electrode 131, the light emitting structure 120 can generate light.

The second electrode 132 is disposed on the second conductive semiconductor layer 123 and may be electrically connected to the second conductive semiconductor layer 123. Additionally, since the second electrode 132 is disposed inside the recess 128, it may overlap the active area RA in the first direction.

The first electrode 131 and the second electrode 132 may be ohmic electrodes. The first electrode 131 and the second electrode 132 are made of indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), and indium gallium zinc oxide (IGZO). ), IGTO (indium gallium tin oxide), AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), IZON (IZO Nitride), AGZO (Al-Ga ZnO), IGZO (In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx/ITO, Ni/IrOx/Au, or Ni/IrOx/Au/ITO, Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Sn, In, It may be formed including at least one of Ru, Mg, Zn, Pt, Au, and Hf, but is not limited to these materials.

The first insulating layer 140 may be disposed on the light emitting structure 120 to insulate the first electrode 131 from the active layer 122, the second conductive semiconductor layer 123, and the second electrode 132. there is. Additionally, the first insulating layer 140 may electrically insulate the second electrode 132 from the active layer 122, the first conductive semiconductor layer 121, and the first electrode 131.

Additionally, the first insulating layer 140 may be partially disposed on the light emitting structure 120 to partially expose the first conductive semiconductor layer 121 and the second conductive semiconductor layer 122. Accordingly, the first electrode 131 and the second electrode 132 may be disposed in the area exposed to the first insulating layer 140.

In addition, the first insulating layer 140 is protected from external moisture, etc., from penetrating into the light emitting structure 120 from the edges during the process of the semiconductor device 10, except for the area where the first electrode 131 and the second electrode 132 are disposed. You can prevent it from happening. In particular, the first insulating layer 140 is disposed within the recess 128 to prevent contaminants, etc. from penetrating into the recess 128.

Additionally, the first insulating layer 140 may be located within the recess 128 to maintain insulation between the active layer 122 in the active area RA and the active layer 122 in the inactive area RI.

In addition, the first insulating layer 140 may be formed by selecting at least one from the group consisting of SiO ₂ , SixOy, Si ₃ N ₄ , SixNy, SiOxNy, Al ₂ O ₃ , TiO ₂ , AlN, etc., but is limited thereto. I never do that. The first insulating layer 140 may be formed as a single layer or multiple layers. For example, the first insulating layer 140 may be a distributed Bragg reflector (DBR) with a multilayer structure including Si oxide or Ti compound. However, the first insulating layer 140 is not necessarily limited to this and may include various reflective structures.

Additionally, when the first insulating layer 140 performs a reflection function, light emitted from the active layer 122 toward the top or side is reflected upward, thereby improving light extraction efficiency.

And the first pad 151 may be disposed on the first electrode 131. Specifically, the first pad 151 may be arranged to cover the top surface of the first electrode 131 and a portion of the first insulating layer 140.

Additionally, the first insulating layer 140 may be partially disposed on the first upper surface 123a of the second conductive semiconductor layer 123. And the first insulating layer 140 is arranged to extend from the first upper surface 123a of the second conductive semiconductor layer 123 along the first recess 128, the second upper surface 123b, and the concave portion 127. It can be. That is, the first insulating layer 140 may be disposed to extend along the recess 128 in the active area RA. And the first insulating layer 140 may extend to the bottom surface 127b of the concave portion 127. Accordingly, the first insulating layer 140 may partially overlap the active area RA in the vertical direction. Additionally, the first insulating layer 140 is arranged to vertically overlap the recess 128 and may also vertically overlap a portion of the inactive region RI. With this configuration, moisture, etc. can be prevented from penetrating into the active layer 122 exposed by the recess 128 and the light generated in the active layer 122 in the active area RA can be easily reflected even if it is emitted to the side. there is. In addition, the active layer 122 of the inactive region (RI) is also easily protected from external moisture, etc., and passes through the active layer 122 of the inactive region (RI) and the first conductive semiconductor layer 121 to the active region (RA). ) can prevent oxidation from moving to the active layer 122.

And the first pad 151 may be made of a conductive material. For example, the first pad 151 may include at least one of Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Sn, In, Ru, Mg, Zn, Pt, Au, and Hf. However, it is not limited to these materials.

Additionally, the second pad 152 may be disposed on the second electrode 132. Additionally, the top surface of the first pad 151 and the top surface of the second pad 152 may be disposed at the same position from the bottom surface of the semiconductor device 10. However, it is not limited to this configuration. That is, the thickness of the first pad 151 and the second pad 152 can be adjusted. For example, by minimizing the height difference between the top surface of the first pad 151 and the top surface of the second pad 152, the occurrence of voids is reduced when bonding the first pad 151 and the second pad 152. You can do it.

In particular, at least a portion of the second pad 152 may overlap the recess 128 in the first direction. With this configuration, the second pad 152 can easily protect the active layer 122 of the active area RA from external moisture, etc. when peeled off. In addition, as the second pad 152 is disposed to extend into the recess 128, heat is easily dissipated through the second pad, so that peeling due to heat can be easily prevented. This will be described in detail in Figures 3a and 3b below.

Additionally, the second pad 152 may be partially disposed on the first insulating layer 140. And the second pad 152 may be made of a conductive material like the first pad 151. For example, the second pad 152 may include at least one of Ag, Ni, Cr, Ti, Al, Rh, Pd, Ir, Sn, In, Ru, Mg, Zn, Pt, Au, and Hf. However, it is not limited to these materials.

The second insulating layer 160 may be disposed on the light emitting structure 120, the first insulating layer 140, the first pad 151, and the second pad 152. With this configuration, the second insulating layer 160 can protect the semiconductor device 10 from the outside.

Specifically, the second insulating layer 160 may be disposed to partially expose the first pad 151. Accordingly, the second insulating layer 160 may be partially disposed on the first pad 151 so that the first pad 151 is partially exposed. Accordingly, the exposed first pad 151 can be electrically connected to the outside.

Additionally, the second insulating layer 160 may be partially disposed on the second pad 152 so that the second pad 152 is partially exposed. For example, the second insulating layer 160 may include a first through hole h1. The first through hole h1 may be disposed on the second pad 152 to expose a portion of the upper surface of the second pad 152. And the exposed second pad 152 may be electrically connected to the outside.

Additionally, a portion of the second insulating layer 160 may overlap the recess 128 in the first direction. By this configuration, the recess 128 is protected by the first insulating layer 140, the second pad 152, and the second insulating layer 160, so the semiconductor device according to one embodiment is resistant to peeling and moisture. Oxidation can prevent light output from deteriorating.

Additionally, the second insulating layer 160 is transparent and may be made of an insulating material. For example, the second insulating layer 160 may include at least one of SiO ₂ , SiO _x , SiO _x N _y , Si ₃ N ₄ , Al ₂ O ₃ , or TiO ₂ , but is not limited to these materials. no.

Additionally, the second insulating layer 160 and the first insulating layer 140 may be made of the same material or may be made of different materials. And since the second pad 152 and the second insulating layer 160 are disposed on the first insulating layer 140, it is difficult for defects formed in the first insulating layer 140 to propagate to the second insulating layer 160. The second insulating layer 160 may serve to shield the interface between the first insulating layer 140 and the second insulating layer 160 from propagating defects.

In addition, the first insulating layer 140 and the second insulating layer 141 are melted by heat during the process to form one layer, or the first insulating layer 140 and the second insulating layer 141 are formed at least in some areas. ) the interface may not exist. Accordingly, even when observed using TEM (Transmission electron microscopy) or the like, the interface between the first insulating layer 140 and the second insulating layer 141 may appear as one layer in at least some areas. Additionally, the first insulating layer 140 and the second insulating layer 141 may be formed through a single process.

It is possible to improve the problem that the optical and electrical reliability of semiconductor devices decreases or the unit cost of semiconductor devices increases as the processing time of semiconductor devices increases.

Figure 3a is an enlarged view of part K in Figure 2, and Figure 3b is an enlarged view of part L in Figure 3a.

Referring to FIG. 3A, the recess 128 includes a bottom surface 128b located at the bottom, an inner slope 128a disposed inside the bottom surface 128b, and an outer slope 128c disposed outside the bottom surface 128b. ) may include.

The bottom surface 128b may be located at the lowest portion inside the edge of the active layer 122 or the second conductive semiconductor layer 123 among the exposed first conductive semiconductor layers 121.

And the inner inclined surface 128a is disposed inside the bottom surface 128b and may extend from the bottom surface 128b to the upper surface of the second conductive semiconductor layer 123. For example, the inner inclined surface 128a may extend from the bottom surface 128b to the first top surface 123a of the top surfaces of the second conductive semiconductor layer 123. That is, the inner inclined surface 128a may be disposed along the sides of the first conductive semiconductor layer 121, the active layer 122, and the second conductive semiconductor layer 123 located on the inner side of the bottom surface 128b.

The outer inclined surface 128c is disposed outside the bottom surface 128b and may extend from the bottom surface 128b to the upper surface of the second conductive semiconductor layer 123. For example, the outer inclined surface 128c may extend from the bottom surface 128b to the second top surface 123b of the top surfaces of the second conductive semiconductor layer 123. Additionally, the outer inclined surface 128c may be disposed along the sides of the first conductivity type semiconductor layer 121, the active layer 122, and the second conductivity type semiconductor layer 123 located on the outside of the bottom surface 128b. And the outer inclined surface 128c may be arranged symmetrically with the inner inclined surface 128a with respect to the bottom surface 128b. That is, the outer inclined surface 128c faces the inner inclined surface 128a and may be connected to the bottom surface 128b.

Additionally, the second pad 152 may be disposed on the recess 128 to at least partially overlap the recess 128 in the first direction. In an embodiment, the second pad 152 may be disposed on the second electrode 132, extend in the second direction, and be disposed outside the recess 128. That is, the second pad 152 may be spaced apart from the outermost side of the second upper surface 123b of the second conductive semiconductor layer 123 with a distance d. For example, one end of the second pad 152 may be disposed between the recess 128 and the concave portion 127 and the separation distance d may be 3 μm to 7 μm. If the separation distance (d) is less than 3㎛, the process is difficult, and if the separation distance is more than 7㎛, resistance increases and light extraction deteriorates.

With this configuration, the second pad 152 is disposed to partially extend outside the recess 128, thereby facilitating heat dissipation through the second pad, thereby solving the problem of delamination caused by expansion due to heat. In addition, the second pad 152 can prevent the second pad 152 from being peeled off due to heat, thereby easily protecting the active layer 122 in the active area from external moisture, etc.

The maximum width W1 of the recess 128 may be 1.5 ㎛ to 4.5 ㎛, and the second pad 152 may have a maximum width W5 of 2.5 ㎛ to 4.5 ㎛ in the second direction from the innermost part of the recess 128. It may be 7.5㎛. That is, the ratio between the maximum width W1 of the recess 128 and the maximum width W5 of the second pad 152 in the second direction from the maximum side of the recess 128 is 1:0.5 to 1:5. It can be. When the ratio of the widths is less than 1:0.5, there is a problem that peeling occurs and the improvement in moisture resistance through the second pad is reduced. Additionally, when the width ratio is greater than 1:5, there is a problem in that light output is lowered by the second pad.

Additionally, as described above, the second pad 152 may be disposed above the recess 128 by extending to various positions. In an embodiment, the second pad 152 may be disposed to extend to the inner inclined surface 128a of the recess 128. Accordingly, one end of the second pad 152 may be located on the inner inclined surface 128a. In another embodiment, the second pad 152 may be disposed to extend to the bottom surface 128b of the recess 128 (see FIG. 6). Accordingly, one end of the second pad 152 may be located on the bottom surface 128b. In another embodiment, the second pad 152 may be disposed to extend beyond the inner inclined surface 128a and the bottom surface 128b to the outer inclined surface 128c. Accordingly, one end of the second pad 152 may be located on the outer inclined surface 128c. In addition, in another embodiment, the second pad 152 passes through the inner slope 128a, the bottom surface 128b, and the outer slope 128c to form the second conductive semiconductor layer 123 in the inactive region RI. It may extend to the top. Accordingly, one end of the second pad 152 may be located on the second conductive semiconductor layer 123 in the inactive region RI. As such, the semiconductor device described in this specification may be implemented in various embodiments as described above in accordance with the moisture resistance, resistance, etc. of the semiconductor device.

Referring to FIG. 3B, the first electrode 131 may be electrically connected to the first conductivity type semiconductor layer 121. The first electrode 131 may include a first groove 131a formed on one surface. Unlike general visible light emitting devices, ultraviolet light emitting devices require electrodes to be heat treated at high temperatures for ohmic properties. For example, the first electrode 131 and/or the second electrode 132 may be heat treated at about 600°C to 900°C, and during this process, an oxide film (OX1) may be formed on the surface of the first electrode 131. You can. The oxide film (OX1) may act as a resistance layer, so the operating voltage may increase.

The oxide film OX1 may be formed by oxidizing the material constituting the first electrode 131. Therefore, during the heat treatment of the first electrode 131, the concentration and/or mass percentage of the materials constituting the first electrode 131 may not be constant, or the surface of the first electrode 131 may be exposed to different components. If uneven heat is applied, the thickness of the oxide film OX1 may be formed unevenly.

Accordingly, the first electrode 131 according to the embodiment may form a first groove 131a on one surface to remove the oxide film OX1. In this process, a protrusion 131b surrounding the first groove 131a may be formed.

In the process of heat treating the first electrode 131, the side surface of the first conductive semiconductor layer 121, the side surface of the active layer 122, and the second conductive layer are exposed between the first electrode 131 and the second electrode 132. Oxidation and/or corrosion may occur in at least some areas of the side surfaces of the type semiconductor layer 123.

However, according to the embodiment, the first insulating layer 140 extends from a portion of the upper surface of the second conductive semiconductor layer 123 to the side of the active layer 122 and a portion of the first conductive semiconductor layer 121. It can be placed up to. In addition, the first insulating layer 140 is formed between the first electrode 131 and the second electrode 132, on the side of the first conductive semiconductor layer 121, the side of the active layer 122, and the second conductive semiconductor layer. It can be placed on the side of (123).

Therefore, when heat treating the first electrode 131, the side surface of the first conductive semiconductor layer 121, the side surface of the active layer 122, and the side surface of the second conductive semiconductor layer 123 are formed by the first insulating layer 140. It is possible to prevent at least some areas from being corroded.

In addition, the first insulating layer 140 may protect each side of the semiconductor structure 120 exposed by the recess 128 from oxidation.

Additionally, when the entire first electrode 131 is etched, there is a problem that the adjacent first insulating layer 140 may also be etched. Accordingly, in the embodiment, etching is performed only on a partial area of the first electrode 131, so that the edge area remains and the protrusion 131b can be formed. The upper surface width d3 of the protrusion 131b may be 1 um to 10 um. If the width (d3) is 1 um or more, the first insulating layer 140 can be prevented from being etched, and if the width (d3) is 10 um or less, the area of the first groove increases, increasing the area where the oxide film has been removed, thereby increasing the resistance. The surface area can be reduced.

For example, when forming the first groove 131a in a partial area of the first electrode 131, a mask made of photo resist may be placed by placing photo resist and performing an exposure process. The side of the mask between the upper and lower surfaces may have an inclination angle with respect to the bottom of the substrate. Accordingly, since a partial area of the protrusion 131b of the first electrode 131 can be etched by adjusting the inclination angle of the mask, the thickness of the oxide film OX1 formed on the protrusion 131b may be unevenly disposed. In some cases, some of the oxide film remaining on the protrusion 131b and the side surface of the first electrode 131 may be removed.

The first pad 151 may be disposed on the first electrode 131. At this time, the first pad 151 may include a first concave-convex portion 151a disposed in the first groove 131a. According to this configuration, the electrical connection between the first pad 151 and the first electrode 131 is improved, and the operating voltage can be lowered. If the first electrode 131 does not have the first groove 131a, the oxide film is not removed and the resistance between the first pad 151 and the first electrode 131 may increase.

The first pad 151 may cover the side surface of the first electrode 131. Accordingly, the contact area between the first pad 151 and the first electrode 131 increases, so the operating voltage can be lowered. Additionally, since the first pad 151 covers the side surface of the first electrode 131, the first electrode 131 can be protected from moisture or other contaminants penetrating from the outside. Accordingly, the reliability of semiconductor devices can be improved.

The first pad 151 may include a second uneven portion 151b disposed in the separation area d2 between the first insulating layer 140 and the first electrode 131. The second uneven portion 151b may directly contact the first conductive semiconductor layer 121. Accordingly, it can have the effect of dispersing the current injected into the first conductive semiconductor layer 121 more uniformly. At this time, when the first pad 151 is in direct contact with the first conductive semiconductor layer 121, the resistance between the first pad 151 and the first conductive semiconductor layer 121 is the same as that of the first electrode 131. 1 It may be greater than the resistance between the conductive semiconductor layers 121. The width of the separation area d2 may be about 1um to 10um.

The first pad 151 may have a first region d1 extending above the first insulating layer 140 . Accordingly, the total area of the first pad 151 may increase and the operating voltage may be lowered.

If the first pad 151 does not extend to the top of the first insulating layer 140, the end of the first insulating layer 140 may be lifted and separated from the first conductive semiconductor layer 121. Therefore, external moisture and/or other contaminants may flow into the gap. As a result, at least some of the side surfaces of the first conductive semiconductor layer 121, the active layer 122, and the second conductive semiconductor layer 123 may be corroded or oxidized.

At this time, the ratio (d4:d1) of the total area of the fourth area d4 and the total area of the first area d1 may be 1:0.15 to 1:1. The total area of the first area d1 may be smaller than the total area of the fourth area d4. Here, the fourth area d4 may be an area where the first insulating layer 140 is disposed on the first conductive semiconductor layer 121 in the area between the first and second electrodes 131 and 132.

In addition, when the ratio (d4:d1) of the total area is 1:0.15 or more, the area of the first region (d1) increases to cover the upper part of the first insulating layer 140, thereby preventing lifting. Additionally, by being disposed between the first electrode 131 and the second electrode 132, it is possible to prevent penetration of external moisture or contaminants.

In addition, when the ratio of the total area (d1:d4) is 1:1 or less, it is necessary to secure an area of the first insulating layer 140 that can sufficiently cover the area between the first electrode 131 and the second electrode 132. You can. Accordingly, the semiconductor structure can be prevented from being corroded during heat treatment of the first electrode 131 and/or the second electrode 132.

According to the embodiment, the second insulating layer 160 is disposed on the first insulating layer 140 in the area between the first electrode 131 and the second electrode 132, so that the first insulating layer 140 is defective. Even when this occurs, the infiltration of external moisture and/or other contaminants can be prevented. FIG. 4 is a cross-sectional view taken along line BB' in FIG. 1.

Referring to FIG. 4, as described above, at least a portion of the second pad 152 is disposed within the recess 128, and the second pad 152 and the second insulating layer 160 are formed on the recess 128. Since they overlap in this first direction, it is possible to easily prevent moisture, etc. from penetrating into the recess 128. Additionally, an interface exists between the plurality of layers on the recess 128, so that defects can be prevented from propagating through the interface in stages.

Additionally, the second insulating layer 160 may include a second through hole h2 disposed on a portion of the first pad 151. The second through hole (h2) may be disposed on the first pad 151 to expose a portion of the upper surface of the first pad 151, and the exposed first pad 151 may form the second through hole (h2). It can be electrically connected to the outside.

Figure 5 is a plan view of a semiconductor device according to another embodiment, and Figure 6 is a cross-sectional view taken along line CC' in Figure 5.

5 and 6, a semiconductor device 10a according to another embodiment includes a substrate, a first conductive semiconductor layer 121, a second conductive semiconductor layer 123, and an active layer 122, and the substrate A light emitting structure 120 disposed on the light emitting structure 120, a first insulating layer 140 partially disposed on the light emitting structure 120, a first electrode 131 electrically connected to the first conductive semiconductor layer 121, and , a second electrode 132 electrically connected to the second conductive semiconductor layer 123, a first pad 151 disposed on the first electrode 131, and a second electrode disposed on the second electrode 132. It includes two pads 152 and a second insulating layer 160 that partially covers the first pad 151 and the second pad 152. Additionally, the light emitting structure 120 may include a recess 128 and a concave portion 127. As described above, the concave portion 127 and the recess 128 are disposed to penetrate the second conductive semiconductor layer 123 and the active layer 122 and to penetrate a partial region of the first conductive semiconductor layer 121. Therefore, the first conductive semiconductor layer 121 may be exposed in some areas by the concave portion 127 and the recess 128.

Additionally, the semiconductor device 10a according to another embodiment includes, except for the second pad 152 and the second insulating layer 160, a substrate 110, a light emitting structure 120, a first insulating layer 140, The details described above in FIGS. 1 and 2 may be applied in the same manner to the first electrode 131, the second electrode 132, and the first pad 151.

In addition, as described above, the recess 128 includes a bottom surface 128b located at the bottom, an inner slope 128a disposed inside the bottom surface 128b, and an outer slope 128c disposed outside the bottom surface 128b. ) may include. And the concave portion 127 may include an inclined surface 127a and a bottom surface 127b as described above.

The bottom surface 128b may be located at the lowest portion inside the edge of the active layer 122 or the second conductive semiconductor layer 123 among the exposed first conductive semiconductor layers 121. That is, the inner inclined surface 128a may be disposed along the sides of the first conductive semiconductor layer 121, the active layer 122, and the second conductive semiconductor layer 123. And the outer inclined surface 128c is disposed outside the bottom surface 128b and may extend from the bottom surface 128b to the upper surface of the second conductive semiconductor layer 123. Additionally, the outer inclined surface 128c may be disposed along the sides of the first conductive semiconductor layer 121, the active layer 122, and the second conductive semiconductor layer 123. Additionally, the outer inclined surface 128c may be arranged symmetrically with the inner inclined surface 128a with respect to the bottom surface 128b.

And the second pad 152 may be disposed on the second electrode 132 and extend onto the recess 128 . That is, the outer portion of the second pad 152 may be located on the recess 128 . Additionally, the second pad 152 may be spaced apart from the outermost side of the second upper surface 123b of the second conductive semiconductor layer 123 at a distance d'. With this configuration, the second pad 152 not only can easily protect the active layer 122 in the active area from external moisture, etc. by heat, but also can easily protect the active layer 122 in the active area from external moisture, etc. by heat dissipation through the second pad. Peeling phenomenon can be prevented.

Figure 7 is a modified example of Figure 1.

Referring to FIG. 7, the semiconductor device 10b according to the modified example includes a first bump 171, a plurality of second bumps 172, a first metal pad 181 and a second metal pad 182, and a mounting substrate. It further includes (190).

The bump may include a first bump 171 and a plurality of second bumps 172. The first bump 171 may be disposed on the first pad 151 to be electrically connected to the first pad 151. In particular, the first bump 171 may be disposed on the above-described second through hole.

Additionally, the second bump 172 may be disposed on the second pad 152 to be electrically connected to the second pad 152 . Additionally, the second bumps 172 may be disposed on the above-described first through-hole and may be plural. However, it is not limited to this number.

Likewise, the number of first bumps 171 may be one as shown, but the embodiment does not limit the number of first bumps 171.

Additionally, the plurality of second bumps 172 may include a 2-1 bump (not shown) and a 2-2 bump (not shown) that are electrically and spatially spaced from each other.

An electrode layer may be disposed between the light emitting structure 120 and the plurality of bumps. That is, the electrode layer may include a spread layer, but is not limited to this configuration.

Additionally, the first metal pad 181 and the second metal pad 182 may each be made of a metal material having electrical conductivity.

Additionally, the mounting substrate 190 may be disposed below the first metal pad 171 and the second metal pad 172 to support the first metal pad 171 and the second metal pad 172. The mounting substrate 190 may be arranged to face the substrate 110 . That is, the mounting substrate 190 may be placed below the substrate 110. In addition, the mounting substrate 190 may be made of, for example, a semiconductor substrate such as AlN, BN, silicon carbide (SiC), GaN, GaAs, Si, etc., but is not limited to this and may be made of a semiconductor material with excellent thermal conductivity or an insulating material. It may be possible. Additionally, the mounting substrate 190 may include an element for preventing electrostatic discharge (ESD) in the form of a Zener diode.

8 is a conceptual diagram of a semiconductor device package according to an embodiment.

Referring to FIG. 8, the semiconductor device package 200 according to the embodiment includes a body 205, a first electrode layer 211 and a second electrode layer 212 installed on the body 205, and a body 205. a semiconductor element 10 electrically connected to the first electrode layer 211 and the second electrode layer 212, and a molding member 220 including a phosphor (not shown) surrounding the semiconductor element 10. It can be included.

The first electrode layer 211 and the second electrode layer 212 are electrically separated from each other and serve to provide power to the semiconductor device 10. In addition, the first electrode layer 211 and the second electrode layer 212 may serve to increase light efficiency by reflecting light generated from the semiconductor device 10. It can also play a role in discharging heat to the outside.

The semiconductor device 10 illustrates a semiconductor device according to one embodiment, but is not limited thereto, and semiconductor devices according to other embodiments can also be applied.

The light emitting device according to the embodiment may be applied to a backlight unit, lighting unit, display device, indicating device, lamp, street light, vehicle lighting device, vehicle display device, smart watch, etc., but is not limited thereto.

9A to 9H are diagrams illustrating a method of manufacturing a semiconductor device according to an embodiment.

Referring to FIG. 9A , the substrate 110 and the light emitting structure 120 may be placed on the substrate 110 . The substrate 110 may include a light-transmissive material. For example, the substrate 110 may include any one of sapphire (Al2O3), SiC, Si, GaN, ZnO, GaP, InP, Ge, and Ga2O3. However, it is not limited to these materials.

The light emitting structure 120 includes a first conductive semiconductor layer 121 disposed on the substrate 110, an active layer 122 disposed on the first conductive semiconductor layer 121, and a first conductive semiconductor layer 122 disposed on the active layer 122. It may include a second conductive semiconductor layer 123. That is, the first conductivity type semiconductor layer 121, the active layer 122, and the second conductivity type semiconductor layer 123 may be sequentially stacked on the substrate 110.

The light-emitting structure 120 is formed using Metal Organic Chemical Vapor Deposition (MOCVD), Chemical Vapor Deposition (CVD), Plasma-Enhanced Chemical Vapor Deposition (PECVD), and Molecular Beam Deposition. It can be achieved by methods such as epitaxy (MBE), hydride vapor phase epitaxy (HVPE), and sputtering.

Referring to FIG. 9B, the light emitting structure 120 may include a concave portion 127 by mesa etching. Accordingly, the inclined surface 127a of the light emitting structure 120 may be inclined with the upper surface of the second conductivity type semiconductor layer 123 by etching. And etching may be done by wet etching or dry etching, but is not limited to these methods. And through this etching, the first conductive semiconductor layer 121 may be exposed. Additionally, the bottom surface 127b extends from the inclined surface 127a and may be a bottom surface where the first conductive semiconductor layer 121 is exposed. Additionally, this etching may be performed so that the inclined surface 127a and the bottom surface 127b are located at the edges of the light emitting structure 120.

Referring to FIG. 9C, a recess 128 may be disposed in the light emitting structure 120. The recess 128 may be formed by mesa etching. Additionally, it may be performed by wet etching or dry etching, but is not limited to these methods. The recess 128 and the above-described inclined surface 127a and bottom surface 127b may be formed through the same process, but are not limited thereto.

And through this etching, the first conductive semiconductor layer 129 may be exposed. Additionally, the recess 128 may be formed to extend adjacent to the edge of the light emitting structure 120 after the mesa etching described above is performed.

Referring to FIGS. 9D and 9E, the first insulating layer 140 may be disposed on the light emitting structure 120. After the first insulating layer 140 is disposed, the area where the first electrode 131 and the second electrode 132, which will be described later, are disposed may be exposed through etching. And the first electrode 131 and the second electrode 132 can be formed.

That is, the first electrode 131 is disposed on the first conductive semiconductor layer 121 exposed by etching, so that the first electrode 131 can be electrically connected to the first conductive semiconductor layer 121. . The first electrode 131 can be formed by E-beam evaporator, thermal evaporator, MOCVD (Metal Organic Chemical Vapor Deposition), sputtering, and PLD (Pulsed Laser Deposition) methods. However, it is not limited to this.

And the second electrode 132 may be disposed on the second conductive semiconductor layer 132 and electrically connected to the second conductive semiconductor layer 132. The second electrode 132 may also be formed by E-beam evaporator, thermal evaporator, MOCVD (Metal Organic Chemical Vapor Deposition), sputtering, and PLD (Pulsed Laser Deposition) methods. However, it is not limited to this. However, the formation order of the first insulating layer 140, the first electrode 131, and the second electrode 132 may be changed. Additionally, the first electrode 131 and the second electrode 132 may be formed through the same process, but the arrangement order is not limited to this and may be changed in various ways.

Referring to FIG. 9F, the first pad 151 may be disposed on the first electrode 131. A portion of the first pad 151 may be disposed on the first insulating layer 140. The first pad 151 may be electrically connected to the first electrode 131 to form an electrical path with the first electrode 131 and the first conductive semiconductor layer 121.

Additionally, the second pad 152 may be disposed on the second electrode 132 so that it is at least partially disposed within the recess 128 to cover the second electrode 132 . Additionally, it may be disposed on a partial area of the first insulating layer 140. Additionally, the second pad 152 may be electrically connected to the second electrode 132 to form an electrical path with the second electrode 132 and the second conductive semiconductor layer 123.

Referring to FIG. 9G, the second insulating layer 160 may be disposed on the first insulating layer 140, the first pad 151, and the second pad 152. In particular, the second through hole h2 may be formed by etching so that the connection electrode 135 of the second insulating layer 160 is partially exposed. Additionally, the second insulating layer 160 may be disposed on a partial area of the first pad 151 and the second pad 152, so that the first pad 151 and the second pad 152 may be partially exposed. . Additionally, first and second bumps, mounting substrates, etc. may be additionally disposed on the exposed portion as described in FIG. 7 . Additionally, after disposing the first pad 151 and the second pad 152, a dicing process may be performed to manufacture a plurality of semiconductor devices.

Semiconductor devices can be used as a light source for a lighting system, a light source for an image display device, or a light source for a lighting device. In other words, the semiconductor device can be applied to various electronic devices that are placed in a case and provide light. For example, when using a mixture of semiconductor devices and RGB phosphors, white light with excellent color rendering (CRI) can be implemented.

The above-described semiconductor device is composed of a light-emitting device package and can be used as a light source for a lighting system. For example, it can be used as a light source for an image display device or a lighting device.

When used as a backlight unit for a video display device, it can be used as an edge-type backlight unit or a direct-type backlight unit. When used as a light source for a lighting device, it can be used as a luminaire or bulb type. It can also be used as a light source for a mobile terminal. It may be possible.

The light emitting device includes a laser diode in addition to the light emitting diode described above.

The laser diode, like the light emitting device, may include a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer having the above-described structure. In addition, the electro-luminescence phenomenon, in which light is emitted when a p-type first conductivity type semiconductor and an n-type second conductivity type semiconductor are bonded and an electric current flows, is used, but the directionality of the emitted light is different. There is a difference in phase. In other words, a laser diode can use a phenomenon called stimulated emission and constructive interference to emit light with one specific wavelength (monochromatic beam) with the same phase and in the same direction. Therefore, it can be used in optical communications, medical equipment, and semiconductor processing equipment.

An example of a light receiving element is a photodetector, which is a type of transducer that detects light and converts the intensity into an electrical signal. Such photodetectors include photocells (silicon, selenium), light output devices (cadmium sulfide, cadmium selenide), photodiodes (e.g., PDs with a peak wavelength in the visible blind spectral region or true blind spectral region), and photovoltaic devices (PDs). Examples include transistors, photomultiplier tubes, photoelectron tubes (vacuum, gas-encapsulated), and IR (Infra-Red) detectors, but embodiments are not limited thereto.

Additionally, semiconductor devices such as photodetectors can generally be manufactured using direct bandgap semiconductors, which have excellent light conversion efficiency. Alternatively, photodetectors have various structures, and the most common structures include a pin-type photodetector using a p-n junction, a Schottky-type photodetector using a Schottky junction, and a MSM (Metal Semiconductor Metal) type photodetector. there is.

A photodiode, like a light emitting device, may include a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer of the structure described above, and may have a pn junction or pin structure. The photodiode operates by applying a reverse bias or zero bias, and when light is incident on the photodiode, electrons and holes are created and a current flows. At this time, the size of the current may be approximately proportional to the intensity of light incident on the photodiode.

A photovoltaic cell, or solar cell, is a type of photodiode that can convert light into electric current. The solar cell, like the light emitting device, may include a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer having the above-described structure.

In addition, it can be used as a rectifier in electronic circuits through the rectification characteristics of a general diode using a p-n junction, and can be applied to ultra-high frequency circuits and oscillation circuits.

In addition, the above-described semiconductor device is not necessarily implemented only as a semiconductor and may further include a metal material in some cases. For example, a semiconductor device such as a light receiving device may be implemented using at least one of Ag, Al, Au, In, Ga, N, Zn, Se, P, or As, and may be implemented using a p-type or n-type dopant. It may also be implemented using doped semiconductor materials or intrinsic semiconductor materials.

Claims (11)

Board;
A first conductivity type semiconductor layer disposed on the substrate, a second conductivity type semiconductor layer, and an active layer disposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, and the second conductivity type semiconductor layer. A light emitting structure including a semiconductor layer and a recess penetrating the active layer;
a first electrode disposed on the light emitting structure and electrically connected to the first conductive semiconductor layer;
a second electrode disposed on the light emitting structure and electrically connected to the second conductive semiconductor layer;
a first pad disposed on the first electrode; and
It includes a second pad disposed on the second electrode,
The recess separates the second conductive semiconductor layer and the active layer into an active region and a non-active region,
The recess is arranged to extend to surround the active area,
The second pad is disposed on the second electrode and extends to the top of the recess,
A semiconductor device in which the first conductivity type semiconductor layer, the active layer, and the second conductivity type semiconductor layer are sequentially stacked on the substrate.
According to paragraph 1,
The recess is,
bottom surface;
an inner slope connected to the bottom surface and adjacent to the active area; and
It includes an outer slope connected to the bottom surface and facing the inner slope,
A semiconductor device wherein one end of the second pad extends onto an inner inclined surface of the recess.
According to paragraph 2,
A semiconductor device wherein one end of the second pad extends onto a bottom surface of the recess and an outer inclined surface of the recess.
According to paragraph 3,
The second pad is disposed extending onto the second conductivity type semiconductor layer on the inactive area,
A semiconductor device wherein one end of the second pad is disposed between the recess and an outermost surface of the second conductivity type semiconductor layer.
According to paragraph 1,
The light emitting structure includes a concave portion where the first conductive semiconductor layer is exposed,
A semiconductor device wherein the concave portion extends outside the inactive region.
According to paragraph 1,
A semiconductor having a ratio of the maximum width of the recess in a horizontal direction perpendicular to the thickness direction of the light emitting structure and the maximum width in the horizontal direction of the second conductive semiconductor layer on the inactive area is 1:0.5 to 1:5. device.
According to paragraph 1,
a first bump disposed on the first pad; and
A semiconductor device further comprising a second bump disposed on the second pad and spaced apart from the first bump.
According to clause 5,
The first electrode is disposed on the first conductivity type semiconductor layer on the concave portion,
The second electrode is a semiconductor device disposed on the second conductivity type semiconductor layer on the active region.
According to claim 5 or 8,
Further comprising a first insulating layer disposed on the light emitting structure,
The first insulating layer extends from the second conductive semiconductor layer on the active area onto the first conductive semiconductor layer on the recess and concave portion and covers the exposed second conductive semiconductor layer and the active layer. A semiconductor device placed in a semiconductor device.
According to clause 9,
The first insulating layer is disposed to extend to the first electrode.
According to paragraph 1,
The inactive area is arranged to surround the recess,
The active area is electrically connected to the second electrode,
A semiconductor device wherein the inactive area is electrically separated from the second electrode.

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