KR102528990B1 - Fabrication process of diamond substrate, diamond cover, diamond plate and semiconductor package, and semiconductor package using the same - Google Patents

Abstract

The present disclosure relates to a semiconductor structure, and more particularly to a III-V compound semiconductor package and a process for manufacturing the same. More specifically, the semiconductor package of the present disclosure is a diamond plate including a diamond layer in which a plurality of via holes filled with copper are formed through, a diamond plate in which a plurality of metal layers are formed on upper and lower surfaces of the diamond layer, respectively; semiconductor elements attached on the plurality of metal layers formed on the upper surface of the diamond layer; a side wall formed on the diamond plate in a shape of a closed curve that surrounds the semiconductor device in a plane; and a diamond cover covering the sidewall with an adhesive material, including a diamond layer and an edge portion protruding vertically or tapered from the diamond layer in the shape of a closed curve so as to contact the sidewall, wherein the sidewall or the edge At least two leads penetrating inside and outside of the closed curve are formed in the portion, and each of the leads is electrically connected to the semiconductor element.

Description

Process for manufacturing a diamond substrate, a diamond cover, a diamond plate, and a semiconductor package, and a semiconductor package manufactured using the same

The present disclosure relates to a semiconductor structure, and more particularly to a III-V compound semiconductor package and a process for manufacturing the same. The present disclosure relates to improving heat dissipation characteristics in a package of a high voltage compound semiconductor power device or MMIC (Monolithic Microwave IC) device. Specific embodiments relate to a process of manufacturing polycrystalline diamond having excellent thermal conductivity in a wafer unit, and a process optimized to be applied to the manufacture of a diamond power semiconductor or MMIC device package using the same.

The following terms are widely used in the art of the present invention, and their definitions will be useful in interpreting this specification. 'Wide band-gap semiconductor technology' may be used to refer to a technology for manufacturing electronic and optoelectronic devices based on wide band-gap semiconductors.

'Single-crystal (monocrystalline) or polycrystalline (polycrystalline) material, wafer, or layer' is used to refer to a material, wafer, or layer formed of one or more crystals, i.e., having substantially translational symmetry. It can be. The term 'layer' refers to a material disposed in a continuous or discontinuous manner over at least a portion of its underlying surface. Also, the term "layer" does not necessarily mean that the disposed material has a constant thickness. The disposed material may have either a constant thickness or a varying thickness.

Moreover, any “layer” referred to herein may refer to a single layer or a plurality of layers, unless the context dictates otherwise. This term is commonly used in reference to crystal growth and is essential for most semiconductors. Real semiconductors have defects, but the defect density is low enough to explain the electronic and optical properties of these materials, assuming translational symmetry.

Polycrystalline materials can be used to refer to materials that are composed of more than one number of crystals or that have multiple orientations, while amorphous (amorphous) materials refer to materials that do not have an actual or apparent crystalline form. can be used

Synthetic diamond may be used to refer to artificial diamonds produced by any of the methods known in the art, including but not limited to high temperature and high pressure techniques and chemical vapor deposition (CVD). It doesn't work. 'Diamond wafer', 'diamond substrate', 'diamond operation substrate' or 'diamond wafer substrate' are terms used interchangeably, e.g., such a diamond wafer may have a predetermined diameter (e.g., 4 inches or 100 mm or more) It will be appreciated by those skilled in the art that it may include a polycrystalline diamond wafer having

Bonding or wafer bonding may be used to refer to a technique of bringing two surfaces, typically semiconductor surfaces, into close proximity so that they are firmly attached to each other. Bonding can be accomplished by using chemical bonding or adhesives. This process is widely used in semiconductor technology. For example, Tong and Gosele's book entitled Semiconductor Wafer Bonding, Springer Verlag, 1989 may be referred to.

In addition to broadcasting systems and other communication systems, faster and more data transmission is required in mobile communication systems due to the rapid expansion of the mobile communication market and increase in user demand. For this purpose, a high-power amplification device with broadband characteristics up to hundreds of MHz is required. In the field of power devices, in particular, high output power and stable operation at high temperatures of semiconductor devices are required not only in fields such as power systems, satellites, eco-friendly energy products, automotive sensors, etc., but also for use in the defense industry.

Regarding these requirements, it has a high breakdown voltage and a wide band gap, which is advantageous for high power output, and has a high carrier concentration and high electron mobility, so it shows a high electric field saturation rate, while carrier scattering is low, so it is high-speed switching (i.e. , high-frequency operation), compound semiconductor power devices such as group III-V compound semiconductors, which have advantages of being able to operate stably even at high temperatures, are in the limelight.

For example, gallium nitride devices have a maximum output power that is 10 times higher than conventional silicon-based LDMOS and 8 times higher than GaAs devices, but corresponds to 20% of the potential performance of gallium nitride due to heat dissipation limitations present in substrates and packaging structures. Only power densities of about 7 W to 8 W/mm have been implemented. This is because in the case of a power semiconductor device using a gallium nitride material, a 2-dimensional electron gas (2DEG) is formed and electrons move quickly from the source side to the drain side, but ions due to the electric field concentrated on the gate edge portion of the drain side This is because high heat is generated by collision.

Therefore, such a compound semiconductor power device is required to be coupled with a heat spreader so that it can stay in a stable operating temperature range. The thermal conductivity of Si (silicon) is about 149 W/m K and that of gallium nitride is only about 160 W/m K, and CPC (Cu/Mo ₇₀ Cu /Cu) has a thermal conductivity of about 300 W/m K, CMC (Cu/Mo/Cu) has a thermal conductivity of about 250 W/m K, and CuW (W ₈₅ Cu ₁₅ ) has a thermal conductivity of about 220 W Since it only had a thermal conductivity of /m K, there was a method of disposing and using a gallium nitride element layer on a SiC (silicon carbide) substrate configured to manage heat instead (eg, US Patent No. 9,111,750), but carbonization There is a limit of up to about 4 inches in wafer growth of silicon, and thermal conductivity is only about 390 to 450 W/m·K, so there is still a limit to its heat dissipation performance.

Therefore, in order to solve this problem, continuous efforts have been made to improve heat dissipation characteristics by bonding a diamond wafer having a thermal conductivity of 1200 to 2000 W/m K to a gallium nitride wafer, but still low productivity and high processing cost of diamond. limited by Due to the physical properties of diamond, which is the material with the highest hardness, and its high stiffness and strong bonding force between carbon, there is a bonding problem during polishing of the surface or heterogeneous bonding with other metals, and the process is not easy.

The present disclosure discloses a process for manufacturing a diamond substrate capable of improving thermal characteristics by using diamond having the highest thermal conductivity and overcoming problems in the prior art that occur during heterojunction between diamond and metal, and a compound semiconductor power device package using the same. The purpose is to present the manufacturing process of.

The characteristic configuration of the present invention for achieving the object of the present invention as described above and realizing the characteristic effects of the present invention described later is as follows.

According to one aspect of the present disclosure, a process for manufacturing a diamond substrate is provided, including first seeding of first diamond particles having a first particle size on a surface of a base substrate. step; a second seeding step of seeding second diamond particles having a second particle size smaller than the first particle size on the surface of the base substrate seeded with the first diamond particles; growing a nucleation layer on the base substrate seeded with the first diamond particles and the second diamond particles; a nanocrystalline growth step of growing nanocrystalline diamond on the nucleation layer; and a micro-crystalline growth step of growing micro-crystalline diamond on the nano-crystalline diamond.

In one embodiment, the first seeding step may include immersing the base substrate in a first mixture containing the first diamond particles; ultrasonic treatment so that the first diamond particles are attached to the base substrate; cleaning the base substrate to which the first diamond particles are attached; and heating the cleaned base substrate, wherein the second seeding step includes: immersing the base substrate in a second mixture containing the second diamond particles; ultrasonic treatment so that the second diamond particles are attached to the base substrate; cleaning the base substrate to which the second diamond particles are attached; and heating the cleaned base substrate.

Preferably, the nucleation layer growing step is performed by MPCVD (Microwave Plasma Chemical Vapor Deposition) using a gas containing methane and hydrogen gas, wherein the methane-to-hydrogen ratio (CH ₄ / H ₂ ratio).

Advantageously, the nanocrystalline growth step is performed by MPCVD (Microwave Plasma Chemical Vapor Deposition) using a gas comprising methane and hydrogen gas, wherein the methane to hydrogen ratio (CH ₄ /H ₂ ratio).

Preferably, the microcrystalline growth step is performed by MPCVD (microwave plasma chemical vapor deposition) using a gas containing methane and hydrogen gas, at a temperature of 800 ° C. to 1000 ° C., with a methane-to-hydrogen ratio of 1.6% to 2.4% ( CH ₄ /H ₂ ratio).

In one embodiment, the diamond substrate manufacturing process may include, after the second seeding step and before the nucleation layer growth step, a first photoresist ( coating a photoresist layer and patterning the first photoresist layer; selectively etching the diamond particle layer using the patterned first photoresist layer as a first etch mask; and removing the first photoresist layer after the selective etching.

According to another aspect of the present disclosure, a process for manufacturing a diamond cover is provided, which includes a substrate including a diamond layer formed in a repetitive plane pattern separated from each other by an outline on a base substrate, or the above The upper surface of the diamond layer and the lower surface of the base substrate included in the diamond substrate, which is a substrate including a diamond layer formed according to the diamond substrate manufacturing process and formed in a repetitive plane pattern separated from each other by an outline on the base substrate a polishing step of polishing; forming a second etching mask having a pattern covering at least a width of the outer line on a lower surface of the base substrate with a second photoresist or metal; a Bosch etch step of partially exposing a lower part of the diamond layer by performing an anisotropic etching to a vertical or tapered lower part of the base substrate as a Bosch process using the second etching mask; and a wafer dicing step of manufacturing a plurality of diamond covers corresponding to the plane pattern by dicing the diamond substrate after the Bosch etching step.

According to another aspect of the present disclosure, there is provided a process for manufacturing a diamond plate, wherein the diamond plate manufacturing process includes a substrate without a pattern including a diamond layer formed on a base substrate or without a pattern according to the diamond substrate manufacturing process. performing the process of removing the base substrate included in the manufactured diamond substrate and the process of polishing the surface of the diamond layer, or starting with a diamond substrate composed of a polished diamond layer; forming a plurality of via holes penetrating the diamond layer; filling the via hole with copper; a metallization step of forming a plurality of metal layers in a predetermined pattern on both sides of the diamond layer; and a wafer dicing step of manufacturing a plurality of diamond plates by dicing the diamond substrate after the metallization step.

Preferably, the forming of the via hole may include a first radial direction, which is a direction from the outer edge of the via hole to the center or a direction from the center of the via hole to the outer edge, and a clockwise or counterclockwise first rotation direction. A first laser processing step of irradiating a spiral microwave laser in a direction perpendicular to the diamond layer; and a second laser processing of irradiating the microwave laser in a direction perpendicular to the diamond layer in a spiral shape in a second radiation direction opposite to the first radiation direction and a second rotation direction opposite to the first rotation direction. Include steps.

Advantageously, the step of filling the via hole with copper comprises: attaching a supporting metal layer to one side of the diamond layer; forming a metal thin film layer made of titanium (Ti) or tungsten (W) on sidewalls of the via hole and the supporting metal layer; depositing gold (Au), silver (Ag), or copper (Cu) on the metal thin film layer; plating copper on the inside of the via hole; and polishing both sides of the diamond layer to remove the supporting metal layer.

Preferably, in the metallization step, coating a third photoresist layer on each of both sides of the diamond layer and patterning the third photoresist layer; a metal layer forming step of sequentially depositing the plurality of metal layers using the patterned third photoresist layer as a deposition mask; and removing the third photoresist layer after the formation of the plurality of metal layers.

More preferably, the forming of the metal layer may include forming a first metal layer by depositing titanium (Ti), chromium (Cr), or tungsten (W) on the diamond layer to a thickness of 50 nm to 200 nm; forming a second metal layer by depositing nickel (Ni) or platinum (Pt) on the first metal layer to a thickness of 100 nm to 300 nm; and forming a third metal layer by depositing gold (Au) on the second metal layer to a thickness of 500 nm to 5 μm.

Advantageously, the wafer dicing step is performed by irradiating a microwave laser after attaching an adhesive tape to one surface of the diamond layer.

According to another aspect of the present disclosure, a process for manufacturing a semiconductor package is provided, wherein the semiconductor package manufacturing process includes semiconductor devices on the plurality of metal layers formed on one surface of a diamond plate manufactured according to the diamond plate manufacturing process. A step of attaching and a step of forming a sidewall on the one surface in the shape of a closed curve that surrounds the semiconductor element in a plane on the one surface, wherein the sidewall includes at least two leads penetrating inside and outside of the closed curve forming and electrically connecting each of the leads to the semiconductor element; and covering the sidewall with the diamond cover manufactured according to the diamond cover manufacturing process, and applying an adhesive material between the sidewall and an edge portion of the diamond cover protruding from the base substrate.

According to another aspect of the present disclosure, a process for manufacturing a semiconductor package is provided, wherein the semiconductor package manufacturing process includes a semiconductor on the plurality of metal layers formed on one surface of a diamond plate manufactured according to the diamond plate manufacturing process. performing a process of attaching an element and a process of forming a sidewall in a closed curve shape that planarly surrounds the semiconductor element on the one surface; forming at least two leads penetrating inside and outside of the closed curve at an edge portion of the base substrate protruding in the shape of the closed curve in the diamond cover manufactured according to the diamond cover manufacturing process; and a step of electrically connecting each of the leads to the semiconductor device while covering the sidewall with the diamond cover and a step of applying an adhesive between the edge portion of the diamond cover, which is a protruding part of the base substrate, and the sidewall. It includes steps to

According to the last aspect of the present disclosure, a semiconductor package is provided, which is a diamond plate including a diamond layer in which a plurality of via holes filled with copper are formed, and a plurality of via holes are formed on upper and lower surfaces of the diamond layer, respectively. A diamond plate on which a metal layer is formed; semiconductor elements attached on the plurality of metal layers formed on the upper surface of the diamond layer; a side wall formed on the diamond plate in a shape of a closed curve that surrounds the semiconductor device in a plane; and a diamond cover covering the sidewall with an adhesive material, including a diamond layer and an edge portion protruding vertically or tapered from the diamond layer in the shape of a closed curve so as to contact the sidewall, wherein the sidewall or the edge At least two leads penetrating inside and outside of the closed curve are formed in the portion, and each of the leads is electrically connected to the semiconductor element.

According to the semiconductor package and its manufacturing process of the present disclosure, there is an advantage in that high reliability can be secured even in an extreme environment by improving heat dissipation characteristics of a compound semiconductor power device having a breakdown voltage of hundreds to thousands of volts and high power operation characteristics. there is.

In particular, according to the present disclosure, by using diamond having excellent thermal conductivity as a base plate, a high heat dissipation effect can be obtained by replacing conventional copper, aluminum, silicon carbide, and the like.

Specifically, according to the process of the present disclosure, it is possible to optimize the growth of a polycrystalline diamond substrate having fine-sized particles from the seeding step, and to overcome the problem of heterojunction occurring in processing via holes and filling copper in the diamond substrate. Therefore, there is an effect of manufacturing a diamond substrate of excellent quality with improved heat dissipation performance and operational stability, and a cover and plate using the same.

Embodiments will be described with reference to the accompanying drawings to show the semiconductor package structure shown in the present disclosure for an understanding of the present invention, which is only a non-limiting example, and common knowledge in the art to which this disclosure belongs Of course, other drawings may be obtained based on these drawings without additional effort leading to another invention for a person with (hereinafter referred to as "ordinary skilled person").
1 is a flowchart showing the main steps of a diamond substrate manufacturing process according to an embodiment of the present disclosure, and FIG. 2 is a flowchart showing an embodiment in which the first seeding step and the second seeding step shown in FIG. 1 are specified, FIG. 3 is a side cross-sectional view conceptually illustrating each step shown in FIG. 2 of a substrate according to an embodiment of the present disclosure.
4 is a cross-sectional side view conceptually illustrating some steps shown in FIG. 1 of a substrate according to the present disclosure.
5 is a conceptual diagram of an exemplary MPCVD (Microwave Plasma Chemical Vapor Deposition) reactor that may be used to grow a diamond layer.
6 is a flow chart showing major steps of a diamond substrate manufacturing process according to another embodiment of the present disclosure, and FIG. 7 is a side cross-sectional view conceptually illustrating some steps of a substrate according to the present disclosure according to FIG. 6 .
8 is a plan view and a side cross-sectional view illustrating diamond substrates manufactured according to two embodiments of a diamond substrate manufacturing process of the present disclosure, respectively.
9 is a flowchart showing the main steps of a diamond cover manufacturing process of the present disclosure, and FIG. 10 is a side cross-sectional view conceptually illustrating each step of a diamond cover according to the present disclosure according to FIG. 9 .
FIG. 11 is a flow chart showing major steps of a diamond plate manufacturing process of the present disclosure, and FIG. 12 is a side cross-sectional view conceptually illustrating each step of a diamond plate according to the present disclosure according to FIG. 11 .
13 is a diagram conceptually illustrating a method of forming a via hole in a diamond plate in an embodiment of a diamond plate manufacturing process according to the present disclosure.
FIG. 14 is a flowchart illustrating an embodiment embodying a step of embedding copper in a via hole shown in FIG. 11, and FIG. 15 is a side cross-sectional view conceptually illustrating each step shown in FIG. 14 of a diamond plate according to the present disclosure. am.
16 is an optical micrograph of a via hole in which copper is buried in a direction perpendicular to the diamond plate in an embodiment of a diamond plate manufacturing process according to the present disclosure.
FIG. 17 is a cross-sectional side view conceptually illustrating a diamond plate according to the present disclosure for each step embodying the metallization steps shown in FIG. 11 .
FIG. 18 is a side cross-sectional view conceptually illustrating a diamond plate in which an adhesive tape is attached to one surface of a diamond layer in the wafer dicing step shown in FIG. 11 .
19 is a side cross-sectional view conceptually illustrating a semiconductor package manufactured by the semiconductor package manufacturing process of the present disclosure.

All prior documents cited in this disclosure are incorporated by reference in their entirety as if they were all presented in this disclosure. Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art. Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with the meaning in the context of the related art, and unless explicitly defined in this specification, it should not be interpreted in an ideal or excessively formal meaning. don't

The detailed descriptions set forth below with respect to the processes and principles of construction of a semiconductor package according to the present disclosure are specific embodiments in which the present invention may be practiced in order to make clear the objects, technical solutions, and advantages of the present disclosure. Reference is made to the accompanying drawings which illustrate examples by way of illustration. In the description with reference to the accompanying drawings, the same reference numerals are given to the same components regardless of reference numerals, and overlapping descriptions thereof will be omitted. The structures of the diamond substrate, diamond cover, diamond plate, and semiconductor package according to the present disclosure do not have length ratios as shown in the drawings, and the dimensions of each part in the drawings are shown for purposes of explanation without limiting the scope of the present invention. It will be understood that it is only indicated. For example, the dimensions of some of the elements shown in the drawings are to aid understanding of various embodiments. In addition, the description and drawings are not meant to be written in the order in which they are written. Those skilled in the art will appreciate that acts and/or steps described or illustrated in a particular order may require no particular limitation to such order.

Accordingly, specific structural or functional descriptions of the embodiments are disclosed for illustrative purposes only, and may be modified and implemented in various forms.

And although terms such as first or second may be used to describe various components, these terms should be interpreted only for the purpose of distinguishing one component from another. For example, a first element may be termed a second element, and similarly, a second element may be termed a first element.

It should be understood that when an element is referred to as being “connected” to another element, it may be directly connected or connected to the other element, but other elements may exist in the middle. Also, when an element is referred to as being 'on' or 'above' another element, it should be understood that it may be 'directly on' the other element, but another element may exist in the middle.

Singular expressions include plural expressions and vice versa, unless the context clearly dictates otherwise.

In this disclosure, the expression "disposed on" or "disposed on", and the expression "disposed between", unless otherwise specified, are arranged to be in direct contact with each other or interposed therebetween. It means that it was so arranged indirectly through other components. Moreover, "on ~" and "on ~" merely represent relative positions of components, because they may be seen differently depending on an observer's point of view. Also, "formed on (on)" has a broad meaning, and the fact that an element is formed on another element does not always mean a direct physical contact of any element with respect to the other element.

"Terminal" or "lead" referred to in this disclosure refers to a conductive structure provided for transmission of electrical signals such as signal input and output between elements, including metal terminals, that is, metal terminals. Not limited to this.

In addition, the "electrical connector" referred to in this disclosure refers to a material, substance, or component that electrically connects components, including, for example, a bonding wire, but is not limited thereto.

Moreover, the present invention covers all possible combinations of the embodiments presented herein. It should be understood that the various embodiments of the present invention are different, but need not be mutually exclusive. For example, specific shapes, structures, and characteristics described herein may be implemented in one embodiment in another embodiment without departing from the spirit and scope of the invention. That is, the embodiments of the present invention are described with reference to specific drawings of ideal embodiments of the present invention, but should not be considered as being limited to a specific shape as shown, and various modifications may be included. The shapes shown in the drawings are conceptually shown, and are not intended to limit the scope of the present invention by limiting the precise shape of a structure or region. For example, areas shown as rectangles, squares, etc. in the drawings may often be tapered, curved, or rounded.

It should be understood that the location or arrangement of individual components within each disclosed embodiment may be changed without departing from the spirit and scope of the invention. Accordingly, the detailed description set forth below is not to be taken in a limiting sense, and the scope of the present invention, if properly described, is limited only by the appended claims, along with all equivalents as claimed by those claims.

In addition, in describing the present invention, if it is determined that the detailed description of a related known configuration or function is related to materials, processes, etc. well known to those skilled in the art in the semiconductor technology field and may obscure the gist of the present invention, the description thereof is excessive. Detailed descriptions are omitted.

1 is a flowchart showing major steps of a diamond substrate manufacturing process according to an embodiment of the present disclosure.

Referring to FIG. 1 , the diamond substrate manufacturing process of the present disclosure includes a first seeding step ( S110 ) of seeding first diamond particles having a first particle size on a surface of a base substrate. Here, the base substrate may be, for example, a silicon (Si) substrate, but is not limited thereto. The thickness of the base substrate may be less than 1000 μm, and the first particle size may be, for example, 25 nm, but this is for illustration only and is not limited thereto.

Subsequently, the diamond substrate manufacturing process includes a second seeding step of seeding second diamond particles having a second particle size smaller than the first particle size on the surface of the base substrate on which the first diamond particles are seeded (S120). ) is further included. The second particle size may be, for example, 5 nm, but this is for illustration only and is not limited thereto.

2 is a flowchart illustrating an embodiment in which the first seeding step and the second seeding step shown in FIG. 1 are embodied, and FIG. 3 conceptually shows a substrate according to an embodiment of the present disclosure for each step shown in FIG. 2 This is a side sectional view.

2 and 3, the first seeding step (S110) includes immersing the base substrate 100 in the first mixture 230a containing the first diamond particles 210 (S112), 1 ultrasonic treatment so that the diamond particles 210 are attached to the base substrate 100 (S114), cleaning the base substrate 100 to which the first diamond particles 210 are attached (S116), and cleaning It may be configured to include a step of heating the base substrate 100 (S118).

The first mixture 230a used in step S112 further includes not only the first diamond particles 210 but also a solvent such as an organic solvent such as alcohol (methanol). In the ultrasonic treatment step (S114), adsorption by an ultrasonic cleaner is performed for at least 10 minutes so that the first diamond particles 210 are attached to the base substrate 100. In the substrate cleaning step (S116), the cleaning operation is performed while sprinkling a solvent such as alcohol (methanol) on the upper part of the substrate using a spin coater or the like, and then the substrate is heated in step S118 to remove the solvent. It evaporates and dries the surface of the substrate.

The second seeding step (S120) following the first seeding step (S110) is also performed in the same process, except that the size of the second diamond particles 220 is smaller than that of the first diamond particles 210 (S122 to S122). S128).

As a result, the first diamond particles 210 and the second diamond particles 220 can be seeded on the base substrate 100 at a particle density of 10 ¹³ atoms/cm ² or more.

4 is a cross-sectional side view conceptually illustrating some of the steps shown in FIG. 1 of a substrate according to the present disclosure.

1 and 4, in the diamond substrate manufacturing process of the present disclosure, the nucleation layer 200 is formed on the base substrate 100 seeded with first diamond particles 210 and second diamond particles 220. ), further comprising a nucleation layer growth step (S140) of growing. The step of growing the nucleation layer ( S140 ) may be performed by MPCVD (microwave plasma chemical vapor deposition) using a gas including methane and hydrogen gas.

5 is a conceptual diagram of an exemplary MPCVD (Microwave Plasma Chemical Vapor Deposition) reactor that may be used to grow a diamond layer.

Chemical vapor deposition of diamond catalyzed by microwave plasma is well known in the art. Referring to FIG. 5 , which is a conceptual diagram of an exemplary MPCVD system 2 that can be used to grow polycrystalline diamond in a diamond nucleation layer 200 in the manner described herein, CVD system 2 Upon use of , a mixture of reactive gases 6 comprising methane and hydrogen gas is introduced into the MPCVD reactor 16 . The flow rate of the reactive gas mixture (6) is controlled by a flow regulator (8). Exhaust gas 10 exits CVD reactor 16 and typically flows to vacuum pump 12 . Microwave energy is typically generated by a magnetron 14 and conducted into a CVD reactor 16 through a quartz window 18 . The microwave energy is converted into a plasma 20 in the reactor 16 to radicalize the hydrogen molecules in the reactive gas 6 into hydrogen free radicals as well as the methane molecules in the reactive gas to methyl free radicals, methylene free radicals, and methine free radicals. radicals and secondary or tertiary free radicals containing two or more carbon atoms. A substrate holder 22 or a support for supporting the substrate 100 is seated at the bottom of the CVD reactor 16, and the polycrystalline diamond film 200 is formed from the diamond particles 210 and 220 seeded on the substrate 100. ) grows. Silicon, titanium, niobium, molybdenum, tungsten, tantalum or any suitable carbide formers may sit on the substrate holder 22 .

While the plasma 20 is being generated, free radicals containing and radicalizing carbon species hit the surface of the substrate 100, which causes the carbon species by a mechanism called "hit and stick". leads to fixation of Hydrogen free radicals generated by the plasma 20 strike the fixed surface carbon species that still contain hydrogen atoms to dislodge hydrogen atoms from the fixed carbon species until all hydrogen atoms are freed. This results in the formation of surface carbon free radicals to form C-C bonds containing few atoms. Some pure carbon to carbon bonds can be sp ³ bonds in nature, which is desirable for diamond lattices. Some pure carbon to carbon bonds can be sp ² in nature, which is graphite-like and therefore undesirable. However, hydrogen free radicals can remove sp ² carbon from graphite species faster than they remove sp ³ carbon from the diamond lattice.

The concentration of hydrogen gas and methane gas in the mixture of reactive gases 6 is a critical parameter in diamond growth, together with temperature and whether the size of the plasma 20 is adjusted to have a size sufficient to cover the surface of the substrate 100 corresponds to The internal pressure and microwave power of the reactor 16 vary depending on the size of the substrate, and the maximum size of a substrate that can be grown by MPCVD is known to be about 4 inches.

In the growth conditions according to the particle size of the diamond particles, if the characteristics such as the amount of gas, concentration (composition ratio) of the gas, temperature, etc. are out of a certain range, the growth rate of diamond may be significantly slowed or a graphite structure may be formed on the surface of the diamond. , the skilled person will appreciate the importance of controlling the plasma 20 in seeding, deposition and growth of diamond films.

For example, the nucleation layer growing step (S140) may be performed at a temperature lower than 600 °C for approximately 20 minutes at a methane-to-hydrogen ratio (CH ₄ /H ₂ ratio) lower than 2.4%. Despite the expression 'approximately', a person skilled in the art can experimentally confirm that a range of times corresponding to the neighborhood of 20 minutes is an appropriate range of processing times.

Continuing to refer to FIGS. 1 and 4 , the diamond substrate manufacturing process of the present disclosure further includes a nanocrystalline growth step ( S150 ) of growing nanocrystalline diamond on the grown nucleation layer. Similar to the aforementioned nucleation layer growth step, the nanocrystalline growth step ( S150 ) may also be performed by MPCVD using a gas containing methane and hydrogen gas. MPCVD in the nanocrystalline growth step (S150) is performed at a temperature of 600 °C to 800 °C with a methane-to-hydrogen ratio (CH ₄ /H ₂ ratio) lower than 1%.

In the example of the first particle size (25 nm) and the second particle size (5 nm), the thickness of the nanocrystalline diamond layer 410 may be approximately 20 nm, but this is an exemplary value and is not limiting.

Next, the diamond substrate manufacturing process further includes a micro-crystalline growth step (S160) of growing micro-crystalline diamond on the nano-crystalline diamond. The microcrystalline growth step (S160) may also be performed by MPCVD using a gas containing methane and hydrogen gas, and this MPCVD is performed at a methane-to-hydrogen ratio (CH ₄ /H ₂ ratio). As an example, the thickness of the microcrystalline diamond layer 420 may be 100 μm to 300 μm.

Preferably, in the microcrystalline growth step (S160), argon (Ar) gas, carbon dioxide in an amount smaller than the amount of hydrogen gas into the CVD reactor 16 to increase the shape stability of the plasma 20 and the uniformity of the diamond particle size At least one of (CO ₂ ) gas, nitrogen (N ₂ ) gas, and oxygen (O ₂ ) gas may be further injected.

The diamond substrate manufactured according to the process described with reference to FIGS. 1 and 4 may be used for manufacturing a diamond plate ( 1100 in FIG. 19 ) described later.

Now, a process for manufacturing a diamond substrate according to another embodiment that can be used for manufacturing a diamond cover ( 1300 in FIG. 19 ) to be described later will be described. 6 is a flow chart showing major steps of a diamond substrate manufacturing process according to another embodiment of the present disclosure, and FIG. 7 is a side cross-sectional view conceptually illustrating some steps of a substrate according to the present disclosure according to FIG. 6 .

If the embodiment of the diamond substrate manufacturing process described in FIGS. 1 and 4 is the first embodiment, the second seeding step (S110) in the second embodiment of the diamond substrate manufacturing process described in FIGS. 6 and 7 and the nucleation layer growing step (S140), a first photoresist (300′) layer is coated on the diamond particle layer seeded with the first diamond particles 210 and the second diamond particles 220, and 1 patterning the photoresist layer 300' (S132), and selectively etching the diamond particle layer using the patterned first photoresist layer as a first etch mask (S134). ), and removing the first photoresist layer after the selective etching (S136).

Pattern formation (S132) is generally performed by an exposure process, and selective etching (S134) may be performed with, for example, O ₂ plasma etching equipment. When the pattern is formed (S132) as in this embodiment, the diamond can grow in a direction parallel to the surface (horizontal axis direction, that is, in the plane direction) according to the growth characteristics of the diamond, and the growth thickness and direction of the diamond Considering this, the patterns may have an interval of 100 to 200 μm from each other.

Thereafter, in each of the nucleation layer growth step (S140) to the microcrystalline growth step (S160), the nucleation layer 200' and the diamond layer 400' are not grown at the position where the seeding of the diamond particles is removed. Bar, the nanocrystalline diamond layer and the microcrystalline diamond layer are as shown by reference numerals 410' and 420', respectively.

8 is a plan view and a side cross-sectional view illustrating diamond substrates manufactured according to two embodiments of a diamond substrate manufacturing process of the present disclosure, respectively. FIG. 8(a) conceptually shows a plan view and a side cross-sectional view of a diamond substrate manufactured according to the second embodiment, and FIG. 8(b) shows a diamond substrate manufactured according to the first embodiment.

Now, a process of manufacturing a diamond plate and a diamond cover from the diamond substrate manufactured according to the first and second embodiments will be described. For convenience of description, the diamond cover manufacturing process will be described first.

9 is a flowchart showing the main steps of a diamond cover manufacturing process of the present disclosure, and FIG. 10 is a side cross-sectional view conceptually illustrating each step of a diamond cover according to the present disclosure according to FIG. 9 .

Referring to FIGS. 9 and 10 , in the diamond cover manufacturing process of the present disclosure, a diamond layer (400'; 410' and 420') formed in a repetitive plane pattern separated from each other by an outline on a base substrate 100 Starting with a substrate including a, for example, a diamond substrate according to the second embodiment of the diamond substrate manufacturing process described above. The diamond cover manufacturing process includes, first, a polishing step (S210) of polishing the upper surface of the diamond layer 400' included in the diamond substrate and the lower surface of the base substrate 100.

In this step (S210), mechanical polishing equipment (eg, an iron Scaife device, etc.) may be used to polish the upper surface of the diamond layer 400'. While pressing with a force of 10 N, the target surface is polished at a rotational speed of 2200 rpm or more so that the surface roughness is 5 nm or less. This is to increase the adhesion of the heterojunction between the diamond layer and the metal layer having different thermal expansion coefficients and lattice mismatch. The size of the grown diamond grains on the upper surface of the polycrystalline diamond layer 400' before polishing is about 20 μm, and the surface roughness reaches several tens of μm due to the grain boundary between the particles and the pinning phenomenon. Shows poor flatness.

In addition, in step S210, polishing, lapping, etc. may be performed on the lower surface of the base substrate 100, which means that the diamond cover 1300 according to the present disclosure is used in a conventional semiconductor package. It is performed as long as it has a thickness sufficient to replace the ceramic frame used, and the range of dimensions that the ceramic frame used for the semiconductor package can have is known to those skilled in the art. For example, in the polishing of the lower surface of the base substrate 100, after the lower surface of the base substrate 100 is adhered to a polishing pad made of polyurethane, an abrasive having a size of several hundred nm is applied. It can be carried out in such a way as to reduce surface roughness by rotating the polishing pad at high speed so that mechanical and chemical reactions occur using the contained slurry.

Next, the diamond cover manufacturing process according to the present disclosure includes forming a second etching mask 500 having a pattern covering at least the width of the outline on the lower surface of the base substrate 100 with a second photoresist or metal. Step S220 is further included.

Here, the second etching mask 500 is for protecting the lower surface from the plasma 20 during dry etching, and the metal that can be used here is, for example, chromium (Cr) or aluminum (Al). ) can be. Any one of materials such as photoresist, chromium, and aluminum may be used as the second etching mask in consideration of etching power, gas, air pressure, and etching rate of the Bosch etching described below.

Subsequently, in the diamond cover manufacturing process according to the present disclosure, the diamond layer 400' is anisotropically etched vertically or tapered as a Bosch process for the lower portion of the base substrate 100 using the second etching mask 500. ) It further includes a Bosch etch step (S230) of partially exposing the lower part. The edge portion 100' of the diamond cover 1300 is formed by Bosch etching, as conceptually shown in FIG. 10 .

For example, the Bosch etching in step S230 may be etching the base substrate 100 made of silicon (Si) by chemical action using SF ₆ plasma using dry etching equipment.

After step S230, the diamond cover manufacturing process of the present disclosure includes a wafer dicing step of manufacturing a plurality of diamond covers 1300 corresponding to the plane pattern by dicing the diamond substrate 400' (S240). ) is further included.

Here, since the position to be cut belongs to the base substrate 100, the dicing may be performed using a laser, which will be described later, but mechanical cutting, which is more advantageous than laser dicing in terms of cost, such as blazer dicing dicing). In general, a blazer blade having a circular shape may be used for blazer dicing. When the thickness of the blazer is 70 to 100 μm, the pattern of the diamond layer 400' is formed in the above-described step S132 to be advantageous for processing. It may be formed to preferably have an interval of 100 to 200 μm from each other, more preferably to have an interval of 150 to 200 μm from each other.

Next to the diamond cover manufacturing process, the diamond plate manufacturing process will now be described.

FIG. 11 is a flow chart showing major steps of a diamond plate manufacturing process of the present disclosure, and FIG. 12 is a side cross-sectional view conceptually illustrating each step of a diamond plate according to the present disclosure according to FIG. 11 .

Referring to FIGS. 11 and 12 , the diamond plate manufacturing process of the present disclosure includes a substrate without a pattern including a diamond layer 400 formed on a base substrate 100, for example, a first step of manufacturing a diamond substrate described above. We start with a diamond substrate according to an embodiment. The diamond plate manufacturing process includes, first, a process of removing the base substrate 100 included in the diamond substrate and a process of polishing the surface of the diamond layer 400 (S310).

In step S310, the base substrate 100, for example, the base substrate 100 made of silicon (Si), is removed from the diamond layer 400 so that the diamond plate 1100 according to the present process can have excellent heat dissipation characteristics. To this end, wet etching using any one of a potassium hydroxide (KOH) solution, a tetramethylammonium hydroxide (TMAH) solution, and a sodium hydroxide (NaOH) solution may be performed.

The polishing of both surfaces of the diamond layer 400 in step S310 may be performed in the same manner as the polishing of the upper surface of the diamond layer 400' described in step S210.

Next, the diamond plate manufacturing process according to the present disclosure further includes forming a plurality of via holes 600' penetrating the diamond layer 400 (S320).

In a radio frequency (RF) device and a millimeter wave device, if the distance from the source side to the ground is long, a parasitic inductance or capacitor component may be generated, resulting in deterioration in performance and reliability. Therefore, it is necessary to form the via hole 600' in the polycrystalline diamond substrate of the present disclosure and use it as a path to minimize the distance between the source side and the ground in the semiconductor package described later.

A microwave laser (nanosecond laser or picosecond laser) may be used to form the via hole 600'. Preferably, the via hole 600' may have a diameter of 250 μm to 350 μm.

13 is a diagram conceptually illustrating a method of forming a via hole in a diamond plate in an embodiment of a diamond plate manufacturing process according to the present disclosure.

Specifically, referring to FIG. 13 , the step of forming the via hole 600' (S320) has a first radial direction from the outer edge of the via hole 600' toward the center and a first rotation direction that is clockwise. A first processing step (S322) of irradiating a microwave laser in a direction perpendicular to the plane of the diamond layer 400 in a spiral trajectory, a second radiation direction opposite to the first radiation direction, and the first rotation A second processing step (S324) of irradiating the microwave laser in a direction perpendicular to the plane of the diamond layer 400 in a spiral trajectory having a second rotation direction opposite to the direction (counterclockwise in this example). can

This is because when the laser beam is continuously irradiated to the same area of the diamond layer 400, the energy density in the corresponding area of the diamond layer 400 increases due to the strong energy of the laser, which may cause carbonization of the surface or generation of graphite. This is to distribute the energy so that it is not concentrated. In general, the spiral laser irradiation may be performed by controlling a stage (not shown) on which the diamond layer 400 is placed while the laser light source is fixed.

Of course, alternative combinations are also possible, such as when the first radial direction is a direction from the center of the via hole 600' to the outer periphery, or when the first rotation direction is a counterclockwise direction.

Continuing, the diamond plate manufacturing process according to the present disclosure further includes filling the via hole with copper (S330). As mentioned above, in order to minimize parasitic inductance, it is necessary to fill the via hole 600' using a metal having excellent electrical conductivity. Copper (Cu) has a high electrical conductivity of 5.96×10 ⁷ S/m. However, it has the advantage of low cost.

FIG. 14 is a flowchart illustrating an embodiment embodying a step of embedding copper in a via hole shown in FIG. 11, and FIG. 15 is a side cross-sectional view conceptually illustrating each step shown in FIG. 14 of a diamond plate according to the present disclosure. am.

14 and 15, in the step of burying copper in the via hole 600' (S330), the supporting metal layer 610 ) is attached (S331), and a metal thin film layer 600a made of titanium (Ti) or tungsten (W) is formed on the sidewall of the via hole 600' and the supporting metal layer 610 (S332), the metal thin film layer Gold (Au), silver (Ag), or copper (Cu) (600b) is deposited (S333) on (600a), and copper (Cu) (600c) is plated on the inside of the via hole (600') (S334) After that, it may be performed by polishing both sides of the diamond layer 400 to remove the supporting metal layer 610 (S335).

The supporting metal layer 610 bonded in step S331 may be, for example, a silicon layer on which a metal thin film is deposited.

Forming the metal thin film layer 600a, that is, the seed layer, using titanium (Ti) or tungsten (W) in step S332 is a heterojunction in a high-temperature heat treatment step (S350) to be described later. Titanium carbide (TiC) or tungsten carbide (WC) is formed at the interface with the diamond layer 400, so the adhesion and thermal conductivity of titanium (Ti) or tungsten (W) of the metal thin film layer 600a are greatly improved, and copper This is because detachment from (600c) is also prevented. Since the thermal expansion coefficients of diamond and copper are 1.18×10 ^-6 m/(m K) and 18×10 ^-6 m/(m K), respectively, plating copper directly on diamond may result in desorption due to temperature change. there is.

Formation of the metal thin film layer 600a made of titanium (Ti) or tungsten (W) may be, for example, plating, but is not limited thereto.

In step S334, the top of the diamond layer 400 other than the via hole 600' may be limited to a dry film so that plating can be performed only within the via hole 600'. When electrolytic plating is used in step S334, since copper metal is charged at the entrance of the via hole 600' most rapidly, if positive and negative voltages are alternately applied to offset this, precipitation of copper metal and Since etching is performed alternately, it is possible to minimize a shape in which copper grows faster at the entrance of the via hole 600'. In short, by applying a voltage in the form of a pulse rather than a DC voltage during electroplating, it is possible to prevent the inlet of the via hole 600' from being blocked by the copper plating.

In addition, the removal of the support metal layer 610 in step S335 may be performed, for example, by polishing, whereby copper protruding out of the thickness of the diamond layer 400 is removed to make its surface flat. do.

16 is an optical microscope photograph of a via hole in which copper is buried in a direction perpendicular to the diamond plate in an embodiment of a diamond plate manufacturing process according to the present disclosure. In FIG. 16 (a), a supporting metal layer 610 16(b) shows the result of processing by the steps S331 to S335 using the supporting metal layer 610. In the case of using the supporting metal layer 610, it can be observed that copper is plated without a void inside the via hole 600'. This is because the supporting metal layer 610 allows the copper plating solution to be filled from the upper portion of the supporting metal layer 610, that is, the lower portion of the via hole 600'.

Referring back to FIGS. 11 and 12 , the diamond plate manufacturing process of the present disclosure further includes a metallization step (S340) of forming a plurality of metal layers in a predetermined pattern on both sides of the diamond layer 400. include

FIG. 17 is a cross-sectional side view conceptually illustrating a diamond plate according to the present disclosure for each step embodying the metallization steps shown in FIG. 11 .

Specifically, referring to FIG. 17 , in the metallization step (S340), the third photoresist layers 700a and 700b are coated on both sides of the diamond layer 400, and the third photoresist layers 700a and 700b are coated with desired Forming a pattern, more precisely, a reversal image pattern of a desired metal pattern (S342), a plurality of metal layers 800a and 800b using the patterned third photoresist layers 700a and 700b as a deposition mask A metal layer forming step (S344) of sequentially depositing, and a step (S346) of removing the third photoresist layer (700a, 700b) after forming the plurality of metal layers (800a, 800b), Since the metal layers 800a' deposited on the third photoresist layers 700a and 700b are removed, this method is generally referred to as an image reversal process. After steps S342, S344, and S346 for one side of the diamond layer 400 are performed, steps S342', S344' (not shown), and S346' for the other side may be performed.

Since the diamond layer 400 is an insulator, it is the metal layers 800a and 800b that constitute the power connection line and the ground that electrically connect the top and bottom of the diamond layer 400, so the diamond cover 1300 according to the present disclosure and a diamond plate 1100 to stably bond a high voltage compound semiconductor power device or MMIC to an interface of a semiconductor package ( 1600 in FIG. 19 ), but to improve thermal characteristics of the semiconductor package, a plurality of metal layers 800a, 800b) may be composed of a combination in the order of one of Ti/Pt/Au, Ti/Ni/Au, W/Pt/Au, and W/Ni/Au.

To this end, the metal layer forming step (S344) includes depositing titanium (Ti) or tungsten (W) on the diamond layer 400 to form a first metal thin film layer (not shown); depositing a nickel (Ni) or platinum (Pt) thin film on the first metal thin film layer to form a second metal thin film layer (not shown); and forming a third metal thin film layer (not shown) by depositing gold (Au) on the second metal thin film layer. The first metal thin film layer to the third metal thin film layer may be deposited by, for example, sputtering equipment to improve deposition characteristics of a metal having heat resistance at a high temperature and to maintain a complex alloy well.

Here, the titanium (Ti) or tungsten (W) thin film of the first metal thin film layer is titanium carbide (TiC) or carbonized at the interface between the first metal thin film layer and the diamond layer 400 in a heat treatment step (S350) described later. Tungsten (WC) may be deposited to a thickness of 50 nm to 200 nm so that it can be sufficiently formed.

And since the platinum (Pt) thin film or nickel (Ni) thin film of the second metal thin film layer has a high melting point and has a diffusion preventing property, the titanium (Ti) or tungsten (W) of the first metal thin film layer and the third To prevent diffusion of gold (Au) in the metal thin film layer, the first metal thin film layer and the third metal thin film layer have a thickness in units of nm, preferably 100 nm to 300 nm in thickness, in consideration of the thicknesses of the first metal thin film layer and the third metal thin film layer. It may be formed over the titanium (Ti) or tungsten (W) metal of the metal thin film layer.

In addition, the gold (Au) thin film of the third metal thin film layer can be used to prevent oxidation of Ti or Pt under it in the air, so that the compound power semiconductor device and stable at the top of the metal layers 800a and 800b It can be bonded to, and can be formed with a thickness ranging from 500 nm to 5 μm in consideration of the thickness of wire bonding. In general, since a gold (Au) thin film is deposited on a source terminal/ground portion formed at the lower end of a power semiconductor device or die to increase electrical conductivity, the third metal thin film layer is made of gold (Au) for stable bonding therewith. can be formed

After the metallization step (S340), a high-temperature heat treatment step (S350) for forming a metal carbide between titanium (Ti) or tungsten (W) and carbon atoms of the diamond layer 400 may be further performed. This heat treatment step (S350) is performed at a temperature of 500 °C to 700 °C for 30 minutes or more in an atmosphere containing at least one of argon (Ar), nitrogen (N ₂ ), and hydrogen (H ₂ ). When Ti or W is combined with a carbon (C) atom, a strong bond of TiC or WC is formed to increase adhesion between the diamond layer 400 and the device, thereby improving the reliability of a semiconductor package having a high operating temperature. In addition, for example, titanium carbide (TiC) formed through heat treatment (S350) from titanium (Ti) having a low thermal conductivity of only 15 W / m K has a thermal conductivity of 110 W / m K, There is also an advantage that the thermal conductivity is improved by more than 7 times by heat treatment.

Next, the diamond plate manufacturing process of the present disclosure further includes a wafer dicing step (S360) of manufacturing a plurality of diamond plates by dicing the diamond substrate.

FIG. 18 is a side cross-sectional view conceptually illustrating a diamond plate in which an adhesive tape is attached to one surface of a diamond layer in the wafer dicing step shown in FIG. 11 .

Referring to FIG. 18, in the wafer dicing step (S360), an adhesive tape 900 is applied to one surface of the diamond layer 400, more specifically, a plurality of metal layers 800a or 800b formed on one surface of the diamond layer 400. , For example, UV tape is attached, the diamond substrate is attached to a ring frame (910) using teeth 900, and microwave laser is irradiated to the diamond substrate while being fixed on a vacuum chuck. It can be done by doing The adhesive tape 900 does not separate individual diamond plates from the entire substrate during wafer dicing and easily separates individual diamond plates from other diamond plates and the adhesive tape 900 after wafer dicing is complete. It is for

Unlike the aforementioned wafer dicing step (S240), the cutting position in the wafer dicing step (S360) corresponds to a diamond material, so mechanical cutting is difficult. In addition, since diamond forms a stable chemical bond between carbon atoms, there is a limit to using wet etching or dry etching. Therefore, the wafer dicing step (S360) is preferably performed using a microwave laser.

As an example, the microwave laser in the wafer dicing step (S360) may have a wavelength of 532 nm and a pulse width of 180 ns, and may be irradiated at low energy and at a fast repetition rate of 6 kHz. However, those skilled in the art will be able to understand that the wavelength, pulse width, and power factor of the microwave laser are not limited to these specific values.

By optimizing the size, pulse period, applied energy, etc. of the microwave laser beam, the line width of the laser is limited to 70 μm to 100 μm, thereby minimizing processing steps and errors in wafer dicing (S360).

Now, a process of manufacturing the semiconductor package 1000 using the diamond plate 1100 and the diamond cover 1300 manufactured by the above processes will be described.

19 is a side cross-sectional view conceptually illustrating a semiconductor package manufactured by the semiconductor package manufacturing process of the present disclosure.

Referring to FIG. 19 , in a semiconductor package manufacturing process according to an embodiment of the present disclosure, a semiconductor device 1500, for example, a compound power semiconductor or A step of performing a process of attaching an MMIC chip (S410a) and a process of forming a sidewall 1200 having a closed curve shape on the one surface planarly surrounding the semiconductor device 1500 on the one surface (S410b) (S410; not shown). ).

Processes S410a and S410b may be performed first, but in general, process S410a is performed after process S410b.

In the process (S410a), since the semiconductor device 1500 such as a compound power semiconductor or MMIC chip is vulnerable to high temperatures, bonding is performed at a low temperature of 250 ° C. or less by using a silver nanoparticle sintering method as the interface bonding material 1400 or a eutectic junction can be used.

In step S410b, at least two leads 1700 penetrating the inside and outside of the closed curve, in other words, connecting the inside and outside of the semiconductor package 1000 are formed on the sidewall 1200, and the semiconductor element 1500 is attached thereto. After (S410a), each lead 1700 is electrically connected to the semiconductor element 1500, and the electrical connection 1800 may be, for example, by wire bonding. Gold (Au) may be used as a material of the bonding wire 1800 for wire bonding, but is not limited thereto.

In the case of a compound power semiconductor, a single layer capacitor (SLC) for internal impedance matching or a dielectric having a metal pattern may be mounted on the sidewall 1200, and the lead 1700 transmits an external input/output signal and transmits a bias voltage. It is used for supply purposes. In order not to obscure the essence of the present invention, a detailed description of the device and the lead 1700 mounted together in the sidewall 1200 will be omitted.

Next, in the semiconductor packaging process according to the embodiment, the sidewall 1200 is covered with the diamond cover 1300 to protect the semiconductor device 1500 from the external environment, but the protruding base substrate of the diamond cover 1300 ( 100), and applying an adhesive material between the edge portion and the side wall 1200 (S420; not shown) is further included. For example, epoxy may be used as the adhesive.

As an alternative to the above-described embodiment in which the lead 1700 is embedded in the sidewall 1200 formed on the diamond plate 1100, a lead 1700' (not shown) is formed on the edge portion 100' of the diamond cover 1300. Other embodiments modified to be possible will also be possible.

In the semiconductor packaging process according to this modified embodiment, first, a process of attaching semiconductor elements on the plurality of metal layers formed on one surface of a diamond plate (S410a') and a closed curve shape planarly surrounding the semiconductor elements on the one surface and a step (S410') of performing a process (S410b') of forming a sidewall on the one surface.

Then, at least two leads penetrating the inside and outside of the closed curve are formed to protrude from the diamond cover 1300 in the shape of the closed curve, for example, the edge portion 100', which is a part of the base substrate formed by Bosch etching (S230). (1700') can be formed (S415').

Finally, in the semiconductor package process according to the modified embodiment, the process of covering the sidewall 1200 with the diamond cover 1300 (S420') is the same as the process (S420).

Referring back to FIG. 19 , a semiconductor package manufactured according to the present disclosure is a diamond plate including a diamond layer 400 through which a plurality of via holes 600' filled with copper 600 are formed. A diamond plate 1100 having a plurality of metal layers 800a and 800b formed on the upper and lower surfaces of the diamond plate 400, and a semiconductor device 1500 attached on the plurality of metal layers 800a formed on the upper surface of the diamond layer 400 , a sidewall 1200 formed in a closed curve shape on the diamond plate 1100 to surround the semiconductor device 1500 in a plane, and a diamond cover 1300 covering the sidewall 1200 with an adhesive material, a diamond layer 400', And a diamond cover 1300 including an edge portion 100' protruding vertically or tapered from the diamond layer 400' so as to contact the side wall 1200 in the shape of the closed curve, and the side wall 1200 or At least two leads 1700 or 1700' penetrating the inside and outside of the closed curve are formed in the edge portion 100', and each lead is electrically connected to the semiconductor device 1500.

The semiconductor package according to the present disclosure described so far has the advantage of obtaining an improved heat dissipation effect by using a diamond material having excellent thermal conductivity as a base plate to replace copper or aluminum materials that have been generally used in the prior art. In addition, it is possible to improve the quality of parts of a diamond-based semiconductor package, for example, a diamond plate and a diamond cover, by suggesting parameters of process equipment optimized for manufacturing a semiconductor package using a diamond material. In particular, by overcoming the limitations of the prior art in the processing of via holes for diamond substrates, copper filling therefor, and bonding of heterogeneous materials between diamonds and metals, the heat dissipation characteristics of diamond materials can be more effectively utilized, resulting in high efficiency of semiconductor package chips that require high performance. And there is an advantage that can significantly improve the operation stability.

Although the present invention has been described above with only a few selected embodiments, those skilled in the art can easily understand the concept on which this disclosure is based, and the concept as a design basis for modified structures for carrying out some objects of the present invention. will be able to easily use

The foregoing examples are merely illustrative of several possible embodiments of various aspects of the present disclosure, and equivalent modifications may be made by others skilled in the art after reading and understanding this specification and the accompanying drawings. Changes and/or modifications will occur. In addition, even though a particular feature of this disclosure may have been described and/or illustrated with respect to only one of several embodiments, such a feature may be preferred in any given application or in one or more other embodiments of other embodiments that may be advantageous in a particular application. Features can be combined. Also, to the extent that the words "comprising," "includes," "including," "has," "including," or variations thereof are used in the description and/or claims, such terms It is intended to be inclusive in a manner similar to the term "comprising".

2: MPCVD system
6: gas mixture
8: flow regulator
10: exhaust gas
12: vacuum pump
14: magnetron
16: MPCVD reactor
18: quartz window
20: Plasma
22: substrate holder
100: base substrate
1700, 1700': lead
200, 200': nucleation layer
210 First diamond particles
220 Second diamond particles
300': first photoresist layer
400, 400': diamond layer
410: nanocrystalline diamond layer
420: microcrystalline diamond layer
500: second etching mask
600: buried copper in via hole
600': via hole
610: supporting metal layer
700a, 700b: third photoresist layer
800a, 800b: metal layers
900: adhesive tape

Claims (16)

a first seeding step of seeding first diamond particles having a first particle size on the surface of the base substrate;
a second seeding step of seeding second diamond particles having a second particle size smaller than the first particle size on the surface of the base substrate seeded with the first diamond particles;
growing a nucleation layer on the base substrate seeded with the first diamond particles and the second diamond particles;
a nanocrystalline growth step of growing nanocrystalline diamond on the nucleation layer; and
A micro-crystalline growth step of growing micro-crystalline diamond on the nano-crystalline diamond.
including,
The first seeding step,
dipping the base substrate into a first mixture containing the first diamond particles; processing the first diamond particles to adhere to the base substrate; cleaning the base substrate to which the first diamond particles are attached; and heating the cleaned base substrate;
The second seeding step,
dipping the base substrate into a second mixture containing the second diamond particles; processing the second diamond particles to adhere to the base substrate; cleaning the base substrate to which the second diamond particles are attached; and heating the cleaned base substrate. delete According to claim 1,
The nucleation layer growth step is performed by MPCVD (microwave plasma chemical vapor deposition) using a gas containing methane and hydrogen gas, but a methane-to-hydrogen ratio (CH ₄ /H ₂ ratio lower than 2.4%) at a temperature lower than 600 ° C. ), a diamond substrate manufacturing process, characterized in that carried out. According to claim 1,
The nanocrystalline growth step is performed by MPCVD (microwave plasma chemical vapor deposition) using a gas containing methane and hydrogen gas, but a methane-to-hydrogen ratio (CH ₄ /H ₂ lower than 1% at a temperature of 600 ° C to 800 ° C) A diamond substrate manufacturing process, characterized in that carried out in a ratio). According to claim 1,
The microcrystalline growth step is performed by MPCVD (microwave plasma chemical vapor deposition) using a gas containing methane and hydrogen gas,
A diamond substrate manufacturing process, characterized in that carried out at a temperature of 800 ° C. to 1000 ° C. with a methane to hydrogen ratio (CH ₄ / H ₂ ratio) of 1.6% to 2.4%. According to claim 1,
After the second seeding step and before the nucleation layer growth step,
coating a first photoresist layer on the diamond particle layer seeded with the first diamond particles and the second diamond particles and patterning the first photoresist layer;
selectively etching the diamond particle layer using the patterned first photoresist layer as a first etch mask; and
removing the first photoresist layer after the selective etching;
Further comprising a diamond substrate manufacturing process. a polishing step of polishing an upper surface of the diamond layer and a lower surface of the base substrate included in a diamond substrate manufactured according to claim 6;
forming a second etching mask having a pattern covering at least a width of the outer line on a lower surface of the base substrate with a second photoresist or metal;
a Bosch etch step of partially exposing a lower part of the diamond layer by performing an anisotropic etching to a vertical or tapered lower part of the base substrate as a Bosch process using the second etching mask; and
A wafer dicing step of manufacturing a plurality of diamond covers corresponding to the plane pattern by dicing the diamond substrate after the Bosch etching step.
Including, diamond cover manufacturing process. The step of removing the base substrate included in the diamond substrate, which is a substrate without a pattern including a diamond layer formed on the base substrate or a substrate manufactured without a pattern according to claim 1, and a step of polishing the surface of the diamond layer. or starting with a diamond substrate composed of a polished diamond layer;
forming a plurality of via holes penetrating the diamond layer;
filling the via hole with copper;
a metallization step of forming a plurality of metal layers in a predetermined pattern on both sides of the diamond layer; and
A wafer dicing step of manufacturing a plurality of diamond plates by dicing the diamond substrate after the metallization step.
including,
Forming the via hole,
A first radiation direction, which is a direction from the outer edge of the via hole to the center or a direction from the center to the outer edge of the via hole, and a clockwise or counterclockwise first rotational direction in which the laser is directed in a direction perpendicular to the diamond layer in a spiral shape A first laser processing step of irradiating; and
A second laser processing step of irradiating the laser in a direction perpendicular to the diamond layer in a spiral shape in a second radiation direction opposite to the first radiation direction and a second rotation direction opposite to the first rotation direction
Including, diamond plate manufacturing process. delete According to claim 8,
The step of filling copper in the via hole,
attaching a supporting metal layer to one side of the diamond layer;
forming a metal thin film layer made of titanium (Ti) or tungsten (W) on sidewalls of the via hole and the supporting metal layer;
depositing gold (Au), silver (Ag), or copper (Cu) on the metal thin film layer;
plating copper inside the via hole; and
polishing both sides of the diamond layer to remove the supporting metal layer;
Including, diamond plate manufacturing process. According to claim 8,
In the metallization step, for each side of the diamond layer,
coating a third photoresist layer and patterning a desired pattern on the third photoresist layer;
a metal layer forming step of sequentially depositing the plurality of metal layers using the patterned third photoresist layer as a deposition mask; and
After forming the plurality of metal layers, removing the third photoresist layer.
Characterized in that performing, the diamond plate manufacturing process. According to claim 11,
The metal layer forming step,
depositing titanium (Ti) or tungsten (W) on the diamond layer to a thickness of 50 nm to 200 nm to form a first metal layer;
forming a second metal layer by depositing nickel (Ni) or platinum (Pt) on the first metal layer to a thickness of 100 nm to 300 nm; and
depositing gold (Au) on the second metal layer to a thickness of 500 nm to 5 μm to form a third metal layer;
Including, diamond plate manufacturing process. According to claim 8,
The wafer dicing step,
A diamond plate manufacturing process, which is performed by irradiating a microwave laser after attaching an adhesive tape to one surface of the diamond layer. A process of attaching semiconductor elements on the plurality of metal layers formed on one surface of the diamond plate manufactured according to claim 8 and a process of forming a side wall in the shape of a closed curve that surrounds the semiconductor elements in a plane on the one surface. A step of performing: forming at least two leads penetrating inside and outside of the closed curve on the sidewall, and electrically connecting each of the leads to the semiconductor device; and
Covering the sidewall with the diamond cover manufactured according to claim 8, applying an adhesive between the edge portion of the diamond cover and the sidewall, which is a protruding part of the base substrate.
Including, semiconductor package manufacturing process. A process of attaching semiconductor elements on the plurality of metal layers formed on one surface of the diamond plate manufactured according to claim 8 and a process of forming a side wall in the shape of a closed curve that surrounds the semiconductor elements in a plane on the one surface. performing steps;
forming at least two leads penetrating inside and outside of the closed curve at an edge portion of the base substrate protruding in the shape of the closed curve in the diamond cover manufactured according to claim 8; and
Covering the sidewall with the diamond cover, performing a process of electrically connecting each of the leads to the semiconductor element and a process of applying an adhesive between the edge portion of the diamond cover and the sidewall, which is a protruding part of the base substrate step
Including, semiconductor package manufacturing process. delete

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