KR102471151B1 - 메모리 시스템 및 그것을 제어하는 방법 - Google Patents

메모리 시스템 및 그것을 제어하는 방법 Download PDF

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KR102471151B1
KR102471151B1 KR1020160169763A KR20160169763A KR102471151B1 KR 102471151 B1 KR102471151 B1 KR 102471151B1 KR 1020160169763 A KR1020160169763 A KR 1020160169763A KR 20160169763 A KR20160169763 A KR 20160169763A KR 102471151 B1 KR102471151 B1 KR 102471151B1
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write
memory
memory devices
policy
devices
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KR20170104112A (ko
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디민 니우
무-티엔 창
홍종 정
크레이그 핸손
임선영
김인동
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삼성전자주식회사
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    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0629Configuration or reconfiguration of storage systems
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1668Details of memory controller
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0658Controller construction arrangements
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659Command handling arrangements, e.g. command buffers, queues, command scheduling
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0673Single storage device
    • G06F3/0679Non-volatile semiconductor memory device, e.g. flash memory, one time programmable memory [OTP]
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0683Plurality of storage devices
    • G06F3/0685Hybrid storage combining heterogeneous device types, e.g. hierarchical storage, hybrid arrays
    • GPHYSICS
    • G06COMPUTING OR CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0668Interfaces specially adapted for storage systems adopting a particular infrastructure
    • G06F3/0671In-line storage system
    • G06F3/0683Plurality of storage devices
    • G06F3/0688Non-volatile semiconductor memory arrays

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Human Computer Interaction (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Read Only Memory (AREA)
  • Memory System (AREA)
KR1020160169763A 2016-03-03 2016-12-13 메모리 시스템 및 그것을 제어하는 방법 Active KR102471151B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US201662303343P 2016-03-03 2016-03-03
US62/303,343 2016-03-03
US15/169,609 US10558388B2 (en) 2016-03-03 2016-05-31 Memory system and method of controlling the same
US15/169,609 2016-05-31

Publications (2)

Publication Number Publication Date
KR20170104112A KR20170104112A (ko) 2017-09-14
KR102471151B1 true KR102471151B1 (ko) 2022-11-28

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Country Link
US (1) US10558388B2 (enExample)
JP (1) JP6929650B2 (enExample)
KR (1) KR102471151B1 (enExample)
CN (1) CN107291379B (enExample)
TW (1) TWI699763B (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10996888B2 (en) * 2017-10-31 2021-05-04 Qualcomm Incorporated Write credits management for non-volatile memory
KR102455880B1 (ko) 2018-01-12 2022-10-19 에스케이하이닉스 주식회사 메모리 시스템 및 메모리 시스템의 동작 방법
US11636014B2 (en) 2017-10-31 2023-04-25 SK Hynix Inc. Memory system and data processing system including the same
KR102714157B1 (ko) * 2019-01-15 2024-10-08 에스케이하이닉스 주식회사 메모리 시스템, 데이터 처리 시스템 및 데이터 처리 시스템의 동작방법
CN108829348B (zh) * 2018-05-29 2022-03-04 上海兆芯集成电路有限公司 存储器装置及命令重排序方法
US20190278503A1 (en) * 2019-05-29 2019-09-12 Intel Corporation Nvram memory module with hard write throttle down

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US20010003198A1 (en) 1999-11-30 2001-06-07 Chung-Che Wu Method for timing setting of a system memory
CN1311509A (zh) 2000-03-03 2001-09-05 株式会社日立制作所 高可靠性存储驱动器以及数据写入方法
US20040243753A1 (en) 1999-10-19 2004-12-02 Rambus Inc. Memory device having programmable drive strength setting
JP2012146360A (ja) 2011-01-12 2012-08-02 Renesas Electronics Corp 半導体集積回路及び書込処理方法
US9032162B1 (en) 2011-08-12 2015-05-12 Altera Corporation Systems and methods for providing memory controllers with memory access request merging capabilities

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US6445624B1 (en) * 2001-02-23 2002-09-03 Micron Technology, Inc. Method of synchronizing read timing in a high speed memory system
DE10237954A1 (de) 2002-08-20 2004-03-04 Basf Ag Verfahren zur Herstellung von Tetrahydrofuran
US20050182867A1 (en) 2004-02-17 2005-08-18 Eddy Reynolds Systems and methods for signaling write status
KR100564635B1 (ko) * 2004-10-25 2006-03-28 삼성전자주식회사 메모리 모듈 내에서의 인터페이스 타이밍을 제어하는메모리 시스템 및 그 방법
US7321524B2 (en) 2005-10-17 2008-01-22 Rambus Inc. Memory controller with staggered request signal output
JP2009230293A (ja) 2008-03-21 2009-10-08 Fujitsu Ltd 情報処理装置,記憶制御装置及び制御方法
CN101751226A (zh) * 2008-12-08 2010-06-23 忆正存储技术(深圳)有限公司 非易失存储介质控制器以及非易失存储设备
CN102754084B (zh) * 2010-05-18 2015-10-07 株式会社日立制作所 存储装置和数据管理方法
US9047178B2 (en) * 2010-12-13 2015-06-02 SanDisk Technologies, Inc. Auto-commit memory synchronization
KR101987426B1 (ko) * 2012-09-07 2019-09-30 삼성전자주식회사 불휘발성 메모리 모듈, 불휘발성 메모리 모듈을 포함하는 메모리 시스템, 그리고 불휘발성 메모리 모듈의 제어 방법
KR102039537B1 (ko) * 2013-03-15 2019-11-01 삼성전자주식회사 불휘발성 저장 장치 및 그것의 운영체제 이미지 프로그램 방법
KR102226367B1 (ko) * 2014-01-02 2021-03-12 삼성전자주식회사 불휘발성 메모리 장치 및 그것을 포함하는 불휘발성 메모리 시스템
US10146704B2 (en) * 2016-02-16 2018-12-04 Dell Products L.P. Volatile/non-volatile memory device access provisioning system

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Publication number Priority date Publication date Assignee Title
US20040243753A1 (en) 1999-10-19 2004-12-02 Rambus Inc. Memory device having programmable drive strength setting
US20010003198A1 (en) 1999-11-30 2001-06-07 Chung-Che Wu Method for timing setting of a system memory
CN1311509A (zh) 2000-03-03 2001-09-05 株式会社日立制作所 高可靠性存储驱动器以及数据写入方法
JP2012146360A (ja) 2011-01-12 2012-08-02 Renesas Electronics Corp 半導体集積回路及び書込処理方法
US9032162B1 (en) 2011-08-12 2015-05-12 Altera Corporation Systems and methods for providing memory controllers with memory access request merging capabilities

Also Published As

Publication number Publication date
TWI699763B (zh) 2020-07-21
JP2017157199A (ja) 2017-09-07
CN107291379A (zh) 2017-10-24
TW201735032A (zh) 2017-10-01
KR20170104112A (ko) 2017-09-14
US20170255418A1 (en) 2017-09-07
US10558388B2 (en) 2020-02-11
CN107291379B (zh) 2022-04-05
JP6929650B2 (ja) 2021-09-01

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