KR102424347B1 - 반도체 칩의 접착 방법 - Google Patents
반도체 칩의 접착 방법 Download PDFInfo
- Publication number
- KR102424347B1 KR102424347B1 KR1020180135345A KR20180135345A KR102424347B1 KR 102424347 B1 KR102424347 B1 KR 102424347B1 KR 1020180135345 A KR1020180135345 A KR 1020180135345A KR 20180135345 A KR20180135345 A KR 20180135345A KR 102424347 B1 KR102424347 B1 KR 102424347B1
- Authority
- KR
- South Korea
- Prior art keywords
- semiconductor chip
- substrate
- bonding
- irradiation process
- adhesive
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 130
- 238000000034 method Methods 0.000 title claims abstract description 97
- 239000000758 substrate Substances 0.000 claims abstract description 85
- 239000002313 adhesive film Substances 0.000 claims abstract description 30
- 239000000853 adhesive Substances 0.000 claims description 24
- 230000001070 adhesive effect Effects 0.000 claims description 24
- 239000011347 resin Substances 0.000 claims description 21
- 229920005989 resin Polymers 0.000 claims description 21
- 239000003795 chemical substances by application Substances 0.000 claims description 15
- 238000001723 curing Methods 0.000 claims description 14
- 239000012790 adhesive layer Substances 0.000 claims description 12
- 229920001187 thermosetting polymer Polymers 0.000 claims description 12
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 9
- 239000004925 Acrylic resin Substances 0.000 claims description 7
- 229920000178 Acrylic resin Polymers 0.000 claims description 7
- 239000000945 filler Substances 0.000 claims description 5
- 239000011256 inorganic filler Substances 0.000 claims description 5
- 229910003475 inorganic filler Inorganic materials 0.000 claims description 5
- 229910052751 metal Inorganic materials 0.000 claims description 5
- 239000002184 metal Substances 0.000 claims description 5
- 239000012766 organic filler Substances 0.000 claims description 5
- 238000009281 ultraviolet germicidal irradiation Methods 0.000 claims description 5
- ZDQNWDNMNKSMHI-UHFFFAOYSA-N 1-[2-(2-prop-2-enoyloxypropoxy)propoxy]propan-2-yl prop-2-enoate Chemical compound C=CC(=O)OC(C)COC(C)COCC(C)OC(=O)C=C ZDQNWDNMNKSMHI-UHFFFAOYSA-N 0.000 claims description 4
- SMZOUWXMTYCWNB-UHFFFAOYSA-N 2-(2-methoxy-5-methylphenyl)ethanamine Chemical compound COC1=CC=C(C)C=C1CCN SMZOUWXMTYCWNB-UHFFFAOYSA-N 0.000 claims description 4
- NIXOWILDQLNWCW-UHFFFAOYSA-N 2-Propenoic acid Natural products OC(=O)C=C NIXOWILDQLNWCW-UHFFFAOYSA-N 0.000 claims description 4
- RZVINYQDSSQUKO-UHFFFAOYSA-N 2-phenoxyethyl prop-2-enoate Chemical compound C=CC(=O)OCCOC1=CC=CC=C1 RZVINYQDSSQUKO-UHFFFAOYSA-N 0.000 claims description 4
- LVGFPWDANALGOY-UHFFFAOYSA-N 8-methylnonyl prop-2-enoate Chemical group CC(C)CCCCCCCOC(=O)C=C LVGFPWDANALGOY-UHFFFAOYSA-N 0.000 claims description 4
- IJGRMHOSHXDMSA-UHFFFAOYSA-N Atomic nitrogen Chemical compound N#N IJGRMHOSHXDMSA-UHFFFAOYSA-N 0.000 claims description 4
- CERQOIWHTDAKMF-UHFFFAOYSA-N Methacrylic acid Chemical compound CC(=C)C(O)=O CERQOIWHTDAKMF-UHFFFAOYSA-N 0.000 claims description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical group O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 4
- 229910052799 carbon Inorganic materials 0.000 claims description 4
- 239000003999 initiator Substances 0.000 claims description 4
- 238000000016 photochemical curing Methods 0.000 claims description 4
- 229910052710 silicon Inorganic materials 0.000 claims description 4
- 239000010703 silicon Substances 0.000 claims description 4
- OMIGHNLMNHATMP-UHFFFAOYSA-N 2-hydroxyethyl prop-2-enoate Chemical compound OCCOC(=O)C=C OMIGHNLMNHATMP-UHFFFAOYSA-N 0.000 claims description 3
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 claims description 3
- DAKWPKUUDNSNPN-UHFFFAOYSA-N Trimethylolpropane triacrylate Chemical compound C=CC(=O)OCC(CC)(COC(=O)C=C)COC(=O)C=C DAKWPKUUDNSNPN-UHFFFAOYSA-N 0.000 claims description 3
- 229910052759 nickel Inorganic materials 0.000 claims description 3
- 229910052709 silver Inorganic materials 0.000 claims description 3
- 239000004332 silver Substances 0.000 claims description 3
- FIHBHSQYSYVZQE-UHFFFAOYSA-N 6-prop-2-enoyloxyhexyl prop-2-enoate Chemical compound C=CC(=O)OCCCCCCOC(=O)C=C FIHBHSQYSYVZQE-UHFFFAOYSA-N 0.000 claims description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 claims description 2
- PIGFYZPCRLYGLF-UHFFFAOYSA-N Aluminum nitride Chemical compound [Al]#N PIGFYZPCRLYGLF-UHFFFAOYSA-N 0.000 claims description 2
- 239000004593 Epoxy Substances 0.000 claims description 2
- WOBHKFSMXKNTIM-UHFFFAOYSA-N Hydroxyethyl methacrylate Chemical compound CC(=C)C(=O)OCCO WOBHKFSMXKNTIM-UHFFFAOYSA-N 0.000 claims description 2
- ISWSIDIOOBJBQZ-UHFFFAOYSA-N Phenol Chemical compound OC1=CC=CC=C1 ISWSIDIOOBJBQZ-UHFFFAOYSA-N 0.000 claims description 2
- JUJWROOIHBZHMG-UHFFFAOYSA-N Pyridine Chemical compound C1=CC=NC=C1 JUJWROOIHBZHMG-UHFFFAOYSA-N 0.000 claims description 2
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 2
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 2
- GWEVSGVZZGPLCZ-UHFFFAOYSA-N Titan oxide Chemical compound O=[Ti]=O GWEVSGVZZGPLCZ-UHFFFAOYSA-N 0.000 claims description 2
- ZJCCRDAZUWHFQH-UHFFFAOYSA-N Trimethylolpropane Chemical compound CCC(CO)(CO)CO ZJCCRDAZUWHFQH-UHFFFAOYSA-N 0.000 claims description 2
- 150000008065 acid anhydrides Chemical class 0.000 claims description 2
- 229910052782 aluminium Inorganic materials 0.000 claims description 2
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical group [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims description 2
- 150000001412 amines Chemical class 0.000 claims description 2
- 229920001577 copolymer Polymers 0.000 claims description 2
- 238000004453 electron probe microanalysis Methods 0.000 claims description 2
- 125000003700 epoxy group Chemical group 0.000 claims description 2
- VOZRXNHHFUQHIL-UHFFFAOYSA-N glycidyl methacrylate Chemical compound CC(=C)C(=O)OCC1CO1 VOZRXNHHFUQHIL-UHFFFAOYSA-N 0.000 claims description 2
- 229910052757 nitrogen Inorganic materials 0.000 claims description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 claims description 2
- 229920005862 polyol Polymers 0.000 claims description 2
- 150000003077 polyols Chemical class 0.000 claims description 2
- 229920001296 polysiloxane Polymers 0.000 claims description 2
- 235000012239 silicon dioxide Nutrition 0.000 claims description 2
- 239000000377 silicon dioxide Substances 0.000 claims description 2
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 2
- 238000001029 thermal curing Methods 0.000 claims 1
- 239000000463 material Substances 0.000 description 7
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 4
- 239000004020 conductor Substances 0.000 description 3
- 239000010949 copper Substances 0.000 description 3
- 239000010410 layer Substances 0.000 description 3
- 238000000231 atomic layer deposition Methods 0.000 description 2
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 230000001678 irradiating effect Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- 239000003990 capacitor Substances 0.000 description 1
- 238000007906 compression Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000004519 manufacturing process Methods 0.000 description 1
- 238000000059 patterning Methods 0.000 description 1
- 239000013034 phenoxy resin Substances 0.000 description 1
- 229920006287 phenoxy resin Polymers 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/52—Mounting semiconductor bodies in containers
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J11/00—Features of adhesives not provided for in group C09J9/00, e.g. additives
- C09J11/02—Non-macromolecular additives
- C09J11/04—Non-macromolecular additives inorganic
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J11/00—Features of adhesives not provided for in group C09J9/00, e.g. additives
- C09J11/02—Non-macromolecular additives
- C09J11/06—Non-macromolecular additives organic
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J133/00—Adhesives based on homopolymers or copolymers of compounds having one or more unsaturated aliphatic radicals, each having only one carbon-to-carbon double bond, and at least one being terminated by only one carboxyl radical, or of salts, anhydrides, esters, amides, imides, or nitriles thereof; Adhesives based on derivatives of such polymers
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J163/00—Adhesives based on epoxy resins; Adhesives based on derivatives of epoxy resins
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J183/00—Adhesives based on macromolecular compounds obtained by reactions forming in the main chain of the macromolecule a linkage containing silicon, with or without sulfur, nitrogen, oxygen, or carbon only; Adhesives based on derivatives of such polymers
- C09J183/04—Polysiloxanes
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J5/00—Adhesive processes in general; Adhesive processes not provided for elsewhere, e.g. relating to primers
- C09J5/06—Adhesive processes in general; Adhesive processes not provided for elsewhere, e.g. relating to primers involving heating of the applied adhesive
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67092—Apparatus for mechanical treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67098—Apparatus for thermal treatment
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
- H01L21/67248—Temperature monitoring
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/11—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/27—Manufacturing methods
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L24/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/303—Surface mounted components, e.g. affixing before soldering, aligning means, spacing means
- H05K3/305—Affixing by adhesive
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
- H05K3/321—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives
- H05K3/323—Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by conductive adhesives by applying an anisotropic conductive adhesive layer over an array of pads
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J2203/00—Applications of adhesives in processes or use of adhesives in the form of films or foils
- C09J2203/326—Applications of adhesives in processes or use of adhesives in the form of films or foils for bonding electronic components such as wafers, chips or semiconductors
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J2301/00—Additional features of adhesives in the form of films or foils
- C09J2301/40—Additional features of adhesives in the form of films or foils characterized by the presence of essential components
- C09J2301/416—Additional features of adhesives in the form of films or foils characterized by the presence of essential components use of irradiation
-
- C—CHEMISTRY; METALLURGY
- C09—DYES; PAINTS; POLISHES; NATURAL RESINS; ADHESIVES; COMPOSITIONS NOT OTHERWISE PROVIDED FOR; APPLICATIONS OF MATERIALS NOT OTHERWISE PROVIDED FOR
- C09J—ADHESIVES; NON-MECHANICAL ASPECTS OF ADHESIVE PROCESSES IN GENERAL; ADHESIVE PROCESSES NOT PROVIDED FOR ELSEWHERE; USE OF MATERIALS AS ADHESIVES
- C09J2433/00—Presence of (meth)acrylic polymer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
- H01L2021/60277—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation involving the use of conductive adhesives
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/60—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation
- H01L21/603—Attaching or detaching leads or other conductive members, to be used for carrying current to or from the device in operation involving the application of pressure, e.g. thermo-compression bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05599—Material
- H01L2224/056—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/05638—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1301—Shape
- H01L2224/13012—Shape in top view
- H01L2224/13013—Shape in top view being rectangular or square
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1301—Shape
- H01L2224/13012—Shape in top view
- H01L2224/13014—Shape in top view being circular or elliptic
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13075—Plural core members
- H01L2224/1308—Plural core members being stacked
- H01L2224/13082—Two-layer arrangements
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/13109—Indium [In] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13101—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of less than 400°C
- H01L2224/13111—Tin [Sn] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13139—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13147—Copper [Cu] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/13138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/13155—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
- H01L2224/141—Disposition
- H01L2224/1412—Layout
- H01L2224/1415—Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry
- H01L2224/14151—Mirror array, i.e. array having only a reflection symmetry, i.e. bilateral symmetry being uniform, i.e. having a uniform pitch across the array
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16135—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/16145—Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16238—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a bonding area protruding from the surface of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/273—Manufacturing methods by local deposition of the material of the layer connector
- H01L2224/2731—Manufacturing methods by local deposition of the material of the layer connector in liquid form
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
- H01L2224/2743—Manufacturing methods by blanket deposition of the material of the layer connector in solid form
- H01L2224/27436—Lamination of a preform, e.g. foil, sheet or layer
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/2919—Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29199—Material of the matrix
- H01L2224/2929—Material of the matrix with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29317—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/29324—Aluminium [Al] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29339—Silver [Ag] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/293—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
- H01L2224/29338—Base material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/29355—Nickel [Ni] as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/29386—Base material with a principal constituent of the material being a non metallic, non metalloid inorganic material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/28—Structure, shape, material or disposition of the layer connectors prior to the connecting process
- H01L2224/29—Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
- H01L2224/29001—Core members of the layer connector
- H01L2224/29099—Material
- H01L2224/29198—Material with a principal constituent of the material being a combination of two or more materials in the form of a matrix with a filler, i.e. being a hybrid material, e.g. segmented structures, foams
- H01L2224/29298—Fillers
- H01L2224/29299—Base material
- H01L2224/2939—Base material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/3205—Shape
- H01L2224/32057—Shape in side view
- H01L2224/32058—Shape in side view being non uniform along the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32135—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/32145—Disposition the layer connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/731—Location prior to the connecting process
- H01L2224/73101—Location prior to the connecting process on the same surface
- H01L2224/73103—Bump and layer connectors
- H01L2224/73104—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/75251—Means for applying energy, e.g. heating means in the lower part of the bonding apparatus, e.g. in the apparatus chuck
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/75252—Means for applying energy, e.g. heating means in the upper part of the bonding apparatus, e.g. in the bonding head
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/75253—Means for applying energy, e.g. heating means adapted for localised heating
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/74—Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies and for methods related thereto
- H01L2224/75—Apparatus for connecting with bump connectors or layer connectors
- H01L2224/7525—Means for applying energy, e.g. heating means
- H01L2224/75261—Laser
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8138—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/81399—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/83009—Pre-treatment of the layer connector or the bonding area
- H01L2224/83026—Applying a precursor material to the bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/831—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector the layer connector being supplied to the parts to be connected in the bonding apparatus
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83191—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8319—Arrangement of the layer connectors prior to mounting
- H01L2224/83192—Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/83201—Compression bonding
- H01L2224/83203—Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/832—Applying energy for connecting
- H01L2224/8322—Applying energy for connecting with energy being in the form of electromagnetic radiation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/8338—Bonding interfaces outside the semiconductor or solid-state body
- H01L2224/83399—Material
- H01L2224/83486—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2224/83488—Glasses, e.g. amorphous oxides, nitrides or fluorides
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/83859—Localised curing of parts of the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/83862—Heat curing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83855—Hardening the adhesive by curing, i.e. thermosetting
- H01L2224/83874—Ultraviolet [UV] curing
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/83—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
- H01L2224/838—Bonding techniques
- H01L2224/8385—Bonding techniques using a polymer adhesive, e.g. an adhesive based on silicone, epoxy, polyimide, polyester
- H01L2224/83885—Combinations of two or more hardening methods provided for in at least two different groups from H01L2224/83855 - H01L2224/8388, e.g. for hybrid thermoplastic-thermosetting adhesives
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L24/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Manufacturing & Machinery (AREA)
- Chemical & Material Sciences (AREA)
- Organic Chemistry (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Inorganic Chemistry (AREA)
- Wire Bonding (AREA)
- Die Bonding (AREA)
Abstract
반도체 칩의 접착 방법은 접착막을 반도체 칩의 표면에 형성하고, 상기 접착막이 기판의 상면에 접촉하도록 상기 반도체 칩을 상기 기판 상에 실장하고, 그리고 상기 반도체 칩이 실장된 상기 기판에 대하여 열압착 공정 및 자외선 조사 공정을 동시에 수행하여 상기 반도체 칩을 상기 기판에 접착시키는 것을 포함할 수 있다.
Description
본 발명은 반도체 칩의 접착 방법에 관한 것이다. 보다 상세하게 본 발명은 접착 소재를 이용한 반도체 칩의 접착 방법에 관한 것이다.
반도체 패키지의 제조 공정에 있어서, 반도체 칩과 기판의 접착을 위해서 접착 소재가 사용될 수 있다. 상기 접착 소재는 열경화성 수지를 포함하는 비전도성 페이스트(non-conductive paste; NCP) 또는 비전도성 필름(non-conductive film; NCF) 형태일 수 있다.
상기 접착 소재는 열압착 공정(thermo compression process)에 의해 경화되어 경화막(cured layer)이 형성될 수 있는데, 상기 경화막이 상기 반도체 칩을 전면적으로 커버하지 못하거나 혹은 상기 반도체 칩으로부터 돌출되는 경우, 상기 반도체 패키지의 신뢰성이 저하될 수 있다.
본 발명의 과제는 반도체 패키지의 신뢰성을 향상시킬 수 있는 반도체 칩의 접착 방법을 제공하는 데 있다.
상술한 본 발명의 과제를 달성하기 위한 예시적인 실시예들에 따른 반도체 칩의 접착 방법에 있어서, 상기 반도체 칩의 접착 방법은 접착막을 반도체 칩의 표면에 형성하고, 상기 접착막이 기판의 상면에 접촉하도록 상기 반도체 칩을 상기 기판 상에 실장하고, 그리고 상기 반도체 칩이 실장된 상기 기판에 대하여 열압착 공정 및 자외선 조사 공정을 동시에 수행하여 상기 반도체 칩을 상기 기판에 접착시키는 것을 포함할 수 있다.
상술한 본 발명의 과제를 달성하기 위한 예시적인 실시예들에 따른 반도체 칩의 접착 방법에 있어서, 상기 반도체 칩의 접착 방법은 반도체 칩 표면에 연결 구조물을 형성하고, 상기 반도체 칩 상에 상기 연결 구조물을 커버하는 접착막을 형성하고, 상기 접착막이 기판의 상면에 접촉하도록 상기 반도체 칩을 상기 기판 상에 실장하고, 그리고 상기 반도체 칩이 실장된 상기 기판에 대하여 열압착 공정 및 자외선 조사 공정을 동시에 수행하여 상기 반도체 칩을 상기 기판에 접착시키는 것을 포함할 수 있다.
상술한 본 발명의 과제를 달성하기 위한 예시적인 실시예들에 따른 반도체 칩의 접착 방법에 있어서, 상기 반도체 칩의 접착 방법은 기판 패드를 포함하는 기판 상에 접착 페이스트를 도포하고, 반도체 칩을상기 접착 페이스트가 도포된 상기 기판 상에 실장하고, 상기 반도체 칩이 실장된 상기 기판에 대하여 열압착 공정 및 자외선 조사 공정을 동시에 수행하여 상기 반도체 칩을 상기 기판에 접착시키는 것을 포함할 수 있다.
예시적인 실시예들에 따른 반도체 칩의 접착 방법은 열경화성 수지 및 광경화성 수지를 포함하는 접착 소재를 이용한 열압착 공정 및 자외선 조사 공정을 반도체 칩이 실장된 기판에 대해 동시에 수행하여, 상기 반도체 칩을 상기 기판에 접착할 수 있다. 이때, 반도체 칩의 꼭지점 부분들을 모두 채우기 위하여 높은 온도 및/또는 높은 압력 조건에서 열압착 공정이 수행될 수 있는데, 상기 꼭지점 부분들을 제외한 반도체 칩 변들을 초과하여 형성되는 접착 소재 부분들이 자외선 조사 공정에 의해 광경화될 수 있다.
이에 따라, 접착 소재가 경화되어 형성되는 경화막이 반도체 칩의 꼭지점 부분들을 모두 채우도록 형성되어 보이드가 형성되지 않을 수 있고, 상기 꼭지점 부분들을 제외한 반도체 칩의 변들을 초과하지 않도록 형성되어 접착 소재의 오버플로우가 방지될 수 있으며, 이에 따라 반도체 패키지의 신뢰성이 향상될 수 있다.
다만, 본 발명의 효과는 상기 언급한 효과에 한정되는 것이 아니며, 본 발명의 사상 및 영역으로부터 벗어나지 않는 범위에서 다양하게 확장될 수 있을 것이다.
도 1 내지 도 11은 예시적인 실시예들에 따른 반도체 칩의 접착 방법의 단계들을 설명하기 위한 평면도들, 단면도들 및 사시도이다.
도 12 내지 도 18은 예시적인 실시예들에 따른 반도체 칩의 접착 방법의 단계들을 설명하기 위한 평면도들 및 단면도들이다.
도 12 내지 도 18은 예시적인 실시예들에 따른 반도체 칩의 접착 방법의 단계들을 설명하기 위한 평면도들 및 단면도들이다.
이하, 첨부한 도면들을 참조하여 본 발명의 실시예들을 상세히 설명하고자 한다.
도 1 내지 도 11은 예시적인 실시예들에 따른 반도체 칩의 접착 방법의 단계들을 설명하기 위한 평면도들, 단면도들 및 사시도이다. 구체적으로 도 1, 7-8 및 10-11은 평면도들이고, 도 2, 4-6 및 9는 대응하는 각 평면도들의 A-A'선을 따라 절단한 단면도들이며, 도 3은 도 2의 X 영역을 확대한 사시도이다.
도 1 내지 도 3을 참조하면, 칩 패드(110)를 포함하는 반도체 칩(100) 상에 순차적으로 적층된 제1 도전성 범프(120) 및 제2 도전성 범프(130)를 포함하는 도전성 범프 구조물(140)을 형성할 수 있다.
구체적으로, 반도체 칩(100)의 칩 패드(110) 상에 시드층(도시되지 않음)을 형성한 후, 상기 시드층 상에 도금 공정을 수행하여 제1 및 제2 도전성 범프막들을 형성하고 이를 패터닝함으로써, 순차적으로 적층된 제1 및 제2 도전성 범프들(120, 130)을 형성할 수 있다. 칩 패드(110) 및 도전성 범프(140)은 함께 연결 구조물을 형성할 수 있다.
일 실시예에 있어서, 반도체 칩(100)은 트랜지스터, 콘택 플러그, 배선, 및 커패시터 등의 반도체 소자를 포함할 수 있다.
도 1에서 반도체 칩(100)은 상면에서 보았을 때 정사각형 또는 직사각형 형상을 가지는 것으로 도시되고 있지만, 본 발명의 개념은 반드시 이에 한정되지 않으며, 반도체 칩(100)은 상면에서 보았을 때 삼각형, 오각형 등의 다각형 형상을 가질 수도 있다.
칩 패드(110)는 반도체 칩(100) 상면에 평행한 제1 방향을 따라 복수 개로 형성될 수 있으며, 반도체 칩(100) 상면에 평행하고 상기 제1 방향과 교차하는 제2 방향으로 각각 연장될 수 있다. 예시적인 실시예들에 있어서, 상기 제1 및 제2 방향들은 서로 직교할 수 있다.
도전성 범프 구조물(140)은 칩 패드(110) 상에서 상기 제2 방향을 따라 복수 개로 형성될 수 있다. 이에 따라, 도전성 범프 구조물(140)은 칩 패드(110)와 서로 전기적으로 연결될 수 있다.
예시적인 실시예들에 있어서, 도전성 범프 구조물(140)의 상기 제2 방향으로의 측벽은 반도체 칩(100) 상면에 대해 수직하지 않고 경사진 기울기를 가질 수 있으며, 이에 따라 제2 도전성 범프(130)의 상면은 제1 도전성 범프(120)의 저면보다 상기 제2 방향으로의 폭이 더 클 수 있다. 즉, 상기 제1 방향에서 보았을 때, 도전성 범프 구조물(140)은 사다리꼴 형상을 가질 수 있다. 하지만, 본 발명의 개념은 반드시 이에 한정되지 않으며, 제2 도전성 범프(130)의 상면은 상기 제1 도전성 범프(120)의 저면보다 상기 제2 방향으로의 폭이 더 작을 수도 있다. 즉, 상기 제1 방향에서 보았을 때, 도전성 범프 구조물(140)은 전체적으로 사다리꼴 형상이 반전된 형상을 가질 수도 있다.
이와는 달리, 도전성 범프 구조물(140)의 상기 제2 방향으로의 측벽은 반도체 칩(100) 상면에 대해 수직인 기울기를 가질 수도 있으며, 이에 따라 제2 도전성 범프(130)의 상면의 상기 제2 방향으로의 폭이 제1 도전성 범프(120)의 저면의 상기 제2 방향으로의 폭과 서로 같을 수도 있다. 즉, 상기 제1 방향에서 보았을 때, 도전성 범프 구조물(140)은 직사각형 형상을 가질 수도 있다.
한편, 도 3에서 제1 및 제2 도전성 범프들(120, 130)이 상기 제1 방향으로의 서로 동일한 폭을 갖는 것으로 도시되고 있지만, 본 발명의 개념은 반드시 이에 한정되지 않을 수 있다. 즉, 제2 도전성 범프(130)의 상기 제1 방향으로의 폭은 상부에서 하부로 갈수록 증가할 수 있고, 상기 제1 도전성 범프(120)의 상기 제1 방향으로의 폭은 하부에서 상부로 갈수록 증가할 수 있으며, 이에 따라 도전성 범프 구조물(140)은 상기 제2 방향에서 보았을 때, 타원형 형상을 가질 수도 있다.
예시적인 실시예들에있어서, 칩 패드(110)는 폴리실리콘을 포함할 수 있고, 제1 도전성 범프(120)는 구리(Cu), 니켈(Ni) 등의 제1 도전성 물질을 포함할 수 있으며, 제2 도전성 범프(130)는 주석(Sn), 주석/은(Sn/Ag), 주석(Sn/Cu), 주석/인듐(Sn/In) 등의 제2 도전성 물질을 포함할 수 있다. 그러나, 상기 제1 및 제2 도전성 물질들은 이에 제한되지 않음을 이해할 수 있을 것이다.
도 4를 참조하면, 반도체 칩(100) 상면에 칩 패드(110) 및 도전성 범프(140)를 포함하는 상기 연결 구조물을 커버하는 접착막(150)을 형성할 수 있다. 이때, 접착막(150)의 상면의 높이는 제2 도전성 범프(130)의 상면의 높이보다 클 수 있다.
예시적인 실시예들에 있어서, 접착막(150)은 화학 기상 증착(Chemical Vapor Deposition: CVD) 공정, 원자층 증착(Atomic Layer Deposition: ALD) 공정 등을 통해 형성될 수 있다.
예시적인 실시예들에 있어서, 접착막(150)은 바인딩 수지, 열경화성 수지 및 광경화성 수지를 포함할 수 있다. 상기 바인딩 수지는 예를 들어, 아크릴계 수지 또는 페녹시계 수지를 포함할 수 있다. 상기 열경화성 수지는 예를 들어, 에폭시계 수지, 아크릴계 수지 및 실리콘계 수지로 이루어진 그룹에서 선택된 적어도 하나와 열경화제의 반응을 통하여 형성될 수 있고, 상기 열경화제는 예를 들어, 열경화제는 아민계 경화제, 산무수물계 경화제, 폴리올계 경화제, 아진계 경화제, 페놀계 경화제 등을 포함할 수 있다. 상기 광경화성 수지는 예를 들어, 탄소 이중결합을 가지는 아크릴계 수지와 광경화 개시제의 반응을 통하여 형성될 수 있고, 상기 탄소 이중결합을 가지는 아크릴계 수지는 예를 들어, 2-하이드록시에틸 아크릴레이트(HEA), 2-하이드록시에틸 메타크릴레이트(HEMA), 2,3-에폭시프로필 메타크릴레이트(EPMA), 아크릴산(AA), 메타크릴산(MAA) 등을 포함할 수 있으며, 상기 광경화 개시제는 예를 들어, 이소데실 아크릴레이트(IDA), 2-페녹시에틸 아크릴레이트(PEA), 헥산디올 디아크릴레이트(HDDA), 트리프로필렌글리콜 디아크릴레이트(TrPGDA), 트리메틸올프로판 트리아크릴레이트(TMPTA), 트리메틸올프로판 에톡시트리아크릴레이트(TMPEOTA) 등을 포함할 수 있다.
일 실시예에 있어서, 접착막(150)은 무기 필러, 유기 필러 및/또는 금속 필러를 더 포함할 수 있다. 상기 무기 필러는 예를 들어, 이산화규소(SiO2), 산화알루미늄(Al2O3), 이산화티타늄(TiO2), 질화알루미늄(AlN), 질화규소(Si3N4), 붕화질소(BN) 등을 포함할 수 있고, 상기 유기 필러는 예를 들어, 분자량 100,000 이상의 Epoxy기를 함유하는 acryl 공중합체를 포함할 수 있으며, 상기 금속 필러는 예를 들어, 알루미늄(Al), 니켈(Ni), 은(Ag) 등의 금속을 포함할 수 있다. 상기 무기 필러, 상기 유기 필러 및 상기 금속 필러는 접착막(150)의 열팽창 계수를 낮추는 역할을 할 수 있고, 이후에 수행되는 열압착 공정이 안정적으로 수행되도록 컨트롤 가능하게 할 수 있으며, 이에 따라 반도체 패키지의 신뢰성이 증가할 수 있다.
도 5를 참조하면, 접착막(150)이 형성된 반도체 칩(100)을 180도 뒤집을 수 있다.
이에 따라, 반도체 칩(100) 상면에 형성된 상기 연결 구조물을 커버하는 접착막(150)이 아래로 향할 수 있다.
도 6을 참조하면, 반도체 칩(100)을 기판 패드(210)를 포함하는 기판(200) 상에 실장할 수 있다.
즉, 상기 연결 구조물을 커버하는 접착막(150)이 형성된 반도체 칩(100)의 상면이 기판(200) 상면에 대향하도록 반도체 칩(100)을 기판(200) 상에 실장할 수 있으며, 상기 연결 구조물에 포함된 제2 도전성 범프(130)와 기판(200)의 기판 패드(210)는 서로 얼라인될 수 있다.
일 실시예에 있어서, 기판(200)은 예를 들어, 인쇄회로기판(printed circuit board; PCB)일 수 있으며, 상기 인쇄회로기판은 내부에 비아와 다양한 회로들을 갖는 다층 회로 보드일 수 있다. 이와는 달리, 기판(200)은 예를 들어, 실리콘 칩(Si chip) 또는 실리콘 웨이퍼(Si wafer) 일 수도 있다.
한편, 기판(200)은 하부 금형(10) 상에 위치할 수 있고, 반도체 칩(100)의 상부에는 상부 금형(20)이 위치할 수 있으며, 하부 및 상부 금형들(10, 20) 사이의 공간에는 자외선 조사 장치(30)가 위치할 수 있다. 하부 금형(10)은 기판(200)이 상하 방향으로 움직이지 않도록 고정시키는 역할을 할 수 있고, 상부 금형(20)은 이후에 수행되는 열압착 공정(thermo compression process)이 수행될 때, 반도체 칩(100)을 기판(200)의 상면에 수직한 방향을 따라 아래 방향으로 압축시키는 역할을 할 수 있다. 상기 자외선 조사 장치는 이후에 수행되는 자외선 조사 공정(ultra violet rays irradiation process)이 수행될 때, 접착막(150)에 대하여 자외선을 조사하는 역할을 할 수 있다.
도 4 내지 도 6에서는 접착막(150)이 반도체 칩(100) 상에 형성된 상기 연결 구조물을 커버하도록 형성된 것이 도시되지만, 본 발명의 개념은 반드시 이에 한정되지는 않는다. 즉, 접착막(150)은 별도로 제작될 수도 있으며, 이에 따라 반도체 칩(100) 상의 상기 연결 구조물을 커버하지 않을 수 있다. 이 경우, 반도체 칩(100)이 기판(200) 상에 실장될 때, 반도체 칩(100)과 기판(200) 사이의 공간, 즉 상기 연결 구조물과 기판 패드(210) 사이의 공간에 제공될 수도 있다.
도 7 내지 도 10을 참조하면, 반도체 칩(100) 및 기판(200)에 대하여 열압착 공정 및 자외선 조사 공정을 동시에 수행할 수 있다.
이에 따라, 반도체 칩(100)과 기판(200) 사이의 공간에 위치하는 접착막(150)이 열압착되어 반도체 칩(100)의 상기 연결 구조물이 기판(200) 상의 기판 패드(210)에 접촉하여 전기적으로 연결될 수 있으며, 상기 열압착 공정 및 상기 자외선 조사 공정에 의해 접착막(150)이 경화되어 제1 경화막(160)이 형성될 수 있다.
상기 열압착 공정은 상부 금형(20)을 아래 방향으로 움직여 반도체 칩(100)을 하부 금형(10) 상에 놓여진 기판(200) 상으로 압착시킨 후, 하부 및 상부 금형들(10, 20) 사이 공간의 온도를 증가시킴으로써 수행될 수 있고, 도 7에 도시된 바와 같이, 반도체 칩(100)이 갖는 다각형 형상의 꼭지점 부분들을 포함한 모든 변들에 대응하는 접착막(150) 부분에 대하여 수행될 수 있다.
상기 자외선 조사 공정은 자외선 조사 장치(30)에서 발생한 자외선을 상기 열압착 공정에 의해 압착된 접착막(150)에 대하여 상기 기판(200) 상면으로부터 0˚ 내지 90˚ 각도로 조사함으로써 수행될 수 있고, 도 8에 도시된 바와 같이, 반도체 칩(100)이 갖는 다각형의 꼭지점 부분들을 제외한 모든 변들, 또는 상기 모든 변들 중 적어도 일부에 대응하는 접착막(150) 부분에 대응하여 수행될 수 있다. 일 실시예에 있어서, 상기 자외선 조사 공정은 상기 제1 및 제2 방향들을 따라 수행될 수 있다.
이에 따라, 상기 열압착 공정에 의해 접착막(150)이 반도체 칩(100)의 꼭지점들보다 이의 변들에 대응하는 공간을 먼저 채우도록 경화되더라도, 상기 자외선 조사 공정에 의해 접착막(150)이 반도체 칩(100)의 꼭지점들을 제외한 변들로부터 외부로 돌출되는 부분이 최소화되도록 경화될 수 있다. 즉, 접착막(150)은 열경화성 수지 및 광경화성 수지를 모두 포함하므로, 상기 열압착 공정에 의해 제1 경화막(160)은 반도체 칩(100)의 꼭지점들에 대응하는 공간을 대부분 채울 수 있고, 상기 자외선 조사 공정에 의해 제1 경화막(160)은 반도체 칩(100)의 꼭지점들을 제외한 변들에 대응하는 공간으로부터 외부로 돌출되는 것이 최소화되도록 할 수 있다.
예시적인 실시예들에 있어서, 제1 경화막(160) 저면의 최대 폭과 반도체 칩(100) 저면의 최대 폭의 차이는 500㎛ 미만일 수 있다. 즉, 상기 제1 방향으로의 제1 경화막(160)의 저면 폭과 상기 제1 방향으로의 반도체 칩(100)의 저면 폭의 차이가 500㎛ 미만일 수 있고, 상기 제2 방향으로의 제1 경화막(160)의 저면 폭과 상기 제2 방향으로의 상기 반도체 칩(100)의 저면 폭의 차이도 500㎛ 미만일 수 있다.
예시적인 실시예들에 있어서, 상기 열압착 공정은 350℃ 이하의 온도 및 100N 이하의 압력 조건에서 수행될 수 있고, 상기 자외선 조사 공정은 자외선 광량(light quantity) 5,000mJ/cm2 이하의 조건에서 수행될 수 있다.
한편, 도 9에서 접착막(150)이 경화되어 형성되는 제1 경화막(160)의 측벽이 기판(200) 상면에 대해 일정한 기울기를 갖는 것이 도시되어 있지만, 본 발명의 개념은 반드시 이에 한정되지 않는다. 즉, 제1 경화막(160)의 측벽은 기판(200) 상면에 대해 일정하지 않은 기울기를 가질 수도 있으며, 예를 들어, 제1 경화막(160)은 기판(200) 상면에 대해 점차 증가하는 기울기를 갖는 측벽을 갖거나, 혹은 기판(200) 상면에 대해 점차 감소하는 기울기를 갖는 측벽을 가질 수도 있다.
한편 도 11을 참조하면, 제1 경화막(160)은 기판(200) 상의 반도체 칩(100)에 대응하는 모든 공간을 채울 수도 있으며, 다만 반도체 칩(100)으로부터 외부로 돌출되는 부분의 면적은 작을 수 있다.
전술한 바와 같이, 반도체 칩(100)과 기판(200) 사이에 형성되는 접착막(150)에 대하여 열압착 공정 및 자외선 조사 공정을 수행할 때, 상기 열압착 공정은 반도체 칩(100)이 갖는 다각형상의 꼭지점을 포함하여 모든 변들에 대응하는 접착막(150) 부분에 대해 수행되는 반면, 상기 자외선 조사 공정은 반도체 칩(100)이 갖는 다각형상의 꼭지점을 제외한 변들에 대응하는 접착막(150) 부분에 대해서만 수행될 수 있다.
이에 따라, 접착막(150)이 경화되어 형성되는 제1 경화막(160)은 반도체 칩(100)이 갖는 다각형상의 꼭지점 부분에 대응하는 공간을 대부분 채우면서도 상기 다각형상의 변들에 대응하는 공간으로부터 외부로 돌출되는 것이 최소화될 수 있다. 그 결과, 반도체 칩(100)이 기판(200)에 잘 접착되면서도, 접착막(150)의 오버플로우에 의해 제1 경화막(160)이 반도체 칩(100) 외부로 돌출되어 상기 반도체 패키지의 신뢰성이 저하되는 것을 방지할 수 있다.
도 12 내지 도 18은 예시적인 실시예들에 따른 반도체 칩의 접착 방법의 단계들을 설명하기 위한 평면도들 및 단면도들이다. 구체적으로, 도 14-15 및 17-18은 평면도들이고, 도 12-13 및 16은 대응하는 각 평면도들의 A-A'선을 따라 절단한 단면도들이다.
상기 반도체 칩의 접착 방법은 도 1 내지 도 11을 참조로 설명한 공정들과 실질적으로 동일하거나 유사한 공정들을 포함하므로, 동일한 구성 요소에는 동일한 참조 부호를 부여하고, 이들에 대한 자세한 설명은 생략한다.
도 12를 참조하면, 기판 패드(210)를 포함하는 기판(200) 상에 기판 패드(210)를 커버하도록 열경화성 수지 및 광경화성 수지를 포함하는 접착 페이스트(170)를 도포할 수 있다.
이때, 접착 페이스트(170)는 전술한 접착막(150)의 성분과 실질적으로 동일한 성분을 포함할 수 있으나 필름 형태가 아닌 액상 형태를 가질 수 있다.
도 13을 참조하면, 접착 페이스트(170)가 도포된 기판(200)을 하부 금형(10) 상에 위치시키고, 접착 페이스트(170) 상에 반도체 칩(100)을 실장하고, 반도체 칩(100) 상에 상부 금형(20)을 위치시키고, 기판(200)과 반도체 칩(100) 사이에 도포된 접착 페이스트(170)의 측부에 자외선 조사 장치(30)를 위치시킬 수 있다.
이때, 접착 페이스트(170)에 의해 커버되는 반도체 칩(100)의 연결 구조물에 포함된 칩 패드(110), 및 제1 및 제2 도전성 범퍼들(120, 130)과 기판(200)의 기판 패드(210)는 서로 얼라인 될 수 있다.
도 14 내지 도 17을 참조하면, 반도체 칩(100) 및 기판(200)에 대하여 열압착 공정 및 자외선 조사 공정을 동시에 수행할 수 있다.
이에 따라, 반도체 칩(100)과 기판(200) 사이의 공간에 위치하는 접착 페이스트(170)가 열압착되어 반도체 칩(100)의 상기 연결 구조물이 기판(200) 상의 기판 패드(210)에 접촉하여 전기적으로 연결될 수 있으며, 상기 열압착 공정 및 상기 자외선 조사 공정에 의해 접착 페이스트(170)가 경화되어 제2 경화막(180)이 형성될 수 있다.
상기 열압착 공정은 상부 금형(20)을 아래 방향으로 움직여 반도체 칩(100)을 하부 금형(10)상에 놓여진 기판(200) 상에 압착시킨 후, 하부 및 상부 금형들(10, 20) 사이 공간의 온도를 증가시킴으로써 수행될 수 있고, 도 14에 도시된 바와 같이, 반도체 칩(100)이 갖는 반도체 칩(100)이 갖는 다각형상의 꼭지점 부분들을 포함한 모든 변들에 대응하는 접착 페이스트(170) 부분에 수행될 수 있다.
상기 자외선 조사 공정은 자외선 조사 장치(30)에서 발생한 자외선을 상기 열압착 공정에 의해 압착된 접착 페이스트(170)에 대하여 기판(200) 상면으로부터 0˚ 내지 90˚ 각도로 조사함으로써 수행될 수 있고, 도 15에 도시된 바와 같이, 반도체 칩(100)이 갖는 다각형상의 꼭지점 부분들을 제외한 모든 변들, 또는 상기 모든 변들 중 적어도 일부에 대응하는 접착 페이스트(150) 부분에 대하여 수행될 수 있다.
이때, 제2 경화막(180)의 성분은 제1 경화막(160)의 성분과 실질적으로 동일할 수 있다.
한편, 도 16에서 접착 페이스트(170)가 경화되어 형성되는 제2 경화막(180)의 측벽이 기판(200) 상면에 대해 일정한 기울기를 갖는 것이 도시되어 있지만, 본 발명의 개념은 반드시 이에 한정되지 않는다. 즉, 제2 경화막(180)의 측벽은 기판(200) 상면에 대해 일정하지 않는 기울기를 가질 수도 있으며, 예를 들어, 제2 경화막(180)은 기판(200) 상면에 대해 점차 증가하는 기울기를 갖는 측벽을 갖거나, 혹은 기판(200) 상면에 대해 점차 감소하는 기울기를 갖는 측벽을 가질 수도 있다.
한편, 도 18을 참조하면, 제2 경화막(180)은 기판(200) 상의 반도체 칩(100)에 대응하는 모든 공간을 채울 수도 있으며, 다만 반도체 칩(100)으로부터 외부로 돌출되는 부분의 면적은 작을 수 있다.
전술한 반도체 칩의 접착 방법은 로직 소자나 메모리 소자와 같은 반도체 소자를 포함하는 반도체 칩을 접착하는 데 사용될 수 있다. 상기 반도체 칩의 접착 방법은, 예를 들어 중앙처리장치(CPU, MPU), 애플리케이션 프로세서(AP) 등과 같은 로직 소자, 예를 들어 에스램(SRAM) 장치, 디램(DRAM) 장치 등과 같은 휘발성 메모리 장치, 및 예를 들어 플래시 메모리 장치, 피램(PRAM) 장치, 엠램(MRAM) 장치, 알램(RRAM) 장치 등과 같은 불휘발성 메모리 장치를 포함하는 반도체 칩의 접착 방법에 사용될 수 있다.
이상에서는 본 발명의 실시예들을 참조하여 설명하였지만, 해당 기술 분야의 숙련된 당업자는 하기의 특허 청구의 범위에 기재된 본 발명의 사상 및 영역으로부터 벗어나지 않는 범위 내에서 본 발명을 다양하게 수정 및 변경시킬 수 있음을 이해할 수 있을 것이다.
10: 하부 금형 20: 상부 금형
30: 자외선 조사 장치 100: 반도체 칩
110: 칩 패드 120, 130: 제1 및 제2 도전성 범프들
140: 도전성 범프 구조물 150: 접착막
160: 제1 경화막 170: 접착 페이스트
180: 제2 경화막 200: 기판
210: 기판 패드
30: 자외선 조사 장치 100: 반도체 칩
110: 칩 패드 120, 130: 제1 및 제2 도전성 범프들
140: 도전성 범프 구조물 150: 접착막
160: 제1 경화막 170: 접착 페이스트
180: 제2 경화막 200: 기판
210: 기판 패드
Claims (20)
- 접착막을 반도체 칩의 표면에 형성하고;
상기 접착막이 기판의 상면에 접촉하도록 상기 반도체 칩을 상기 기판 상에 실장하고; 그리고
상기 반도체 칩이 실장된 상기 기판에 대하여 열압착 공정 및 자외선 조사 공정을 동시에 수행하여 상기 반도체 칩을 상기 기판에 접착시키는 것을 포함하며,
상기 반도체 칩은 상면에서 보았을 때 다각형 형상을 가지며,
상기 자외선 조사 공정은 상기 접착막에 대하여 상기 반도체 칩이 갖는 다각형의 꼭지점 부분들을 제외한 변들 중 적어도 하나의 변을 향해 수행되는 반도체 칩의 접착 방법. - 삭제
- 제1항에 있어서, 상기 자외선 조사 공정은 상기 접착막에 대하여 상기 반도체 칩이 갖는 상기 다각형의 모든 변들을 향해 수행되는 반도체 칩의 접착 방법.
- 제1항에 있어서, 상기 자외선 조사 공정은 자외선 광량(light quantity) 5,000mJ/cm2 이하의 조건에서 수행되는 반도체 칩의 접착 방법.
- 제1항에 있어서, 상기 열압착 공정 및 상기 자외선 조사 공정을 수행함으로써 상기 접착막이 경화되어 경화막이 형성되는 반도체 칩의 접착 방법.
- 제5항에 있어서, 상기 경화막의 저면 폭과 상기 반도체 칩 저면 폭의 차이는 500㎛ 미만인 반도체 칩의 접착 방법.
- 제1항에 있어서, 상기 열압착 공정은 350℃ 이하의 온도 및 100N 이하의 압력 조건에서 수행되는 반도체 칩의 접착 방법.
- 제1항에 있어서, 상기 접착막은 열경화성 수지 및 광경화성 수지를 포함하는 반도체 칩의 접착 방법.
- 제8항에 있어서, 상기 열경화성 수지는 에폭시계 수지, 아크릴계 수지 및 실리콘계 수지로 이루어진 그룹에서 선택된 적어도 하나와 열경화제의 반응을 통하여 형성되는 반도체 칩의 접착 방법.
- 제9항에 있어서, 열경화제는 아민계 경화제, 산무수물계 경화제, 폴리올계 경화제, 아진계 경화제 및 페놀계 경화제로 이루어진 그룹에서 선택된 적어도 하나를 포함하는 반도체 칩의 접착 방법.
- 제8항에 있어서, 상기 광경화성 수지는 탄소 이중결합을 가지는 아크릴계 수지와 광경화 개시제의 반응을 통하여 형성되는 반도체 칩의 접착 방법.
- 제11항에 있어서, 상기 탄소 이중결합을 가지는 아크릴계 수지는 2-하이드록시에틸 아크릴레이트(HEA), 2-하이드록시에틸 메타크릴레이트(HEMA), 2,3-에폭시프로필 메타크릴레이트(EPMA), 아크릴산(AA) 및 메타크릴산(MAA)으로 이루어진 그룹에서 선택된 적어도 하나를 포함하는 반도체 칩의 접착 방법.
- 제11항에 있어서, 상기 광경화 개시제는 이소데실 아크릴레이트(IDA), 2-페녹시에틸 아크릴레이트(PEA), 헥산디올 디아크릴레이트(HDDA), 트리프로필렌글리콜 디아크릴레이트(TrPGDA), 트리메틸올프로판 트리아크릴레이트(TMPTA) 및 트리메틸올프로판 에톡시트리아크릴레이트(TMPEOTA)로 이루어진 그룹에서 선택된 적어도 하나를 포함하는 반도체 칩의 접착 방법.
- 제8항에 있어서, 상기 접착막은 무기 필러, 유기 필러 및 금속 필러로 이루어진 그룹에서 선택된 적어도 하나를 더 포함하는 반도체 칩의 접착 방법.
- 제14항에 있어서, 상기 무기 필러는 이산화규소(SiO2), 산화알루미늄(Al2O3), 이산화티타늄(TiO2), 질화알루미늄(AlN), 질화규소(Si3N4) 및 붕화질소(BN)로 이루어진 그룹에서 선택된 적어도 하나를 포함하고, 상기 유기 필러는 분자량 100,000 이상의 Epoxy기를 함유하는 acryl 공중합체를 포함하며, 상기 금속 필러는 알루미늄(Al), 니켈(Ni) 및 은(Ag)으로 이루어진 그룹에서 선택된 적어도 하나을 포함하는 반도체 칩의 접착 방법.
- 제1항에 있어서, 상기 기판은 인쇄회로기판(PCB), 실리콘 칩(Si chip) 또는 실리콘 웨이퍼(Si wafer)인 반도체 칩의 접착 방법.
- 반도체 칩 표면에 연결 구조물을 형성하고;
상기 반도체 칩 상에 상기 연결 구조물을 커버하는 접착막을 형성하고;
상기 접착막이 기판의 상면에 접촉하도록 상기 반도체 칩을 상기 기판 상에 실장하고; 그리고
상기 반도체 칩이 실장된 상기 기판에 대하여 열압착 공정 및 자외선 조사 공정을 동시에 수행하여 상기 반도체 칩을 상기 기판에 접착시키는 것을 포함하며,
상기 반도체 칩은 상면에서 보았을 때 다각형 형상을 가지며,
상기 자외선 조사 공정은 상기 접착막에 대하여 상기 반도체 칩이 갖는 다각형의 꼭지점 부분들을 제외한 변들 중 적어도 하나의 변을 향해 수행되는 반도체 칩의 접착 방법. - 제17항에 있어서, 상기 연결 구조물은 상기 반도체 칩 표면에 순차적으로 적층된 칩 패드, 제1 도전성 범프 및 제2 도전성 범프를 포함하고, 상기 기판은 기판 패드를 포함하는 반도체 칩의 접착 방법.
- 제18항에 있어서, 상기 반도체 칩이 상기 기판에 접착될 때, 상기 접착막이 열압착되어 상기 연결 구조물이 상기 기판 패드에 접촉하는 반도체 칩의 접착 방법.
- 기판 패드를 포함하는 기판 상에 접착 페이스트를 도포하고;
반도체 칩을 상기 접착 페이스트가 도포된 상기 기판 상에 실장하고; 그리고
상기 반도체 칩이 실장된 상기 기판에 대하여 열압착 공정 및 자외선 조사 공정을 동시에 수행하여 상기 반도체 칩을 상기 기판에 접착시키는 것을 포함하며,
상기 반도체 칩은 상면에서 보았을 때 다각형 형상을 가지며,
상기 자외선 조사 공정은 상기 접착 페이스트에 대하여 상기 반도체 칩이 갖는 다각형의 꼭지점 부분들을 제외한 변들 중 적어도 하나의 변을 향해 수행되는 반도체 칩의 접착 방법.
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020180135345A KR102424347B1 (ko) | 2018-11-06 | 2018-11-06 | 반도체 칩의 접착 방법 |
US16/427,162 US10825795B2 (en) | 2018-11-06 | 2019-05-30 | Method of manufacturing semiconductor devices |
CN201910806622.6A CN111146100A (zh) | 2018-11-06 | 2019-08-28 | 制造半导体器件的方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020180135345A KR102424347B1 (ko) | 2018-11-06 | 2018-11-06 | 반도체 칩의 접착 방법 |
Publications (2)
Publication Number | Publication Date |
---|---|
KR20200052136A KR20200052136A (ko) | 2020-05-14 |
KR102424347B1 true KR102424347B1 (ko) | 2022-07-22 |
Family
ID=70458998
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
KR1020180135345A KR102424347B1 (ko) | 2018-11-06 | 2018-11-06 | 반도체 칩의 접착 방법 |
Country Status (3)
Country | Link |
---|---|
US (1) | US10825795B2 (ko) |
KR (1) | KR102424347B1 (ko) |
CN (1) | CN111146100A (ko) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20240070996A (ko) | 2022-11-15 | 2024-05-22 | 동국대학교 산학협력단 | 심리 검사용 이미지 데이터를 이용한 성격 유형 예측 장치 및 방법 |
KR20240084307A (ko) | 2022-12-06 | 2024-06-13 | 동국대학교 산학협력단 | 그림검사용 앱 프로그램을 심리 검사용 이미지 데이터를 이용한 성격 유형 예측 장치 및 방법 |
Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20010018986A1 (en) * | 2000-02-21 | 2001-09-06 | Akira Nagai | Resin compound, and adhesive film, metal-clad adhesive film, circuit board, and assembly structure, using the resin compound |
US20140353540A1 (en) * | 2013-05-31 | 2014-12-04 | Sunray Scientific, Llc | Anisotropic Conductive Adhesive with Reduced Migration |
US20170355906A1 (en) * | 2014-12-18 | 2017-12-14 | Dic Corporation | Liquid crystal composition and liquid crystal display element using same |
Family Cites Families (16)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4954197A (en) | 1989-03-30 | 1990-09-04 | Xerox Corporation | Process for assembling smaller arrays together to form a longer array |
US5783465A (en) * | 1997-04-03 | 1998-07-21 | Lucent Technologies Inc. | Compliant bump technology |
JPH1187413A (ja) | 1997-09-08 | 1999-03-30 | Fujitsu Ltd | 半導体ベアチップ実装方法 |
JP2001308145A (ja) | 2000-04-25 | 2001-11-02 | Fujitsu Ltd | 半導体チップの実装方法 |
US6873059B2 (en) * | 2001-11-13 | 2005-03-29 | Texas Instruments Incorporated | Semiconductor package with metal foil attachment film |
TWI252066B (en) * | 2002-02-28 | 2006-03-21 | Hitachi Chemical Co Ltd | Method for connecting electrodes, surface-treated wiring board and adhesive film used in the method, and electrodes-connected structure |
US7204574B2 (en) | 2004-06-30 | 2007-04-17 | Lexmark International, Inc. | Polyimide thickfilm flow feature photoresist and method of applying same |
WO2006063338A1 (en) | 2004-12-08 | 2006-06-15 | Mark Knapp | Molded gasket and method of making |
WO2007100849A2 (en) | 2006-02-27 | 2007-09-07 | Microcontinuum, Inc. | Formation of pattern replicating tools |
JP4902229B2 (ja) | 2006-03-07 | 2012-03-21 | ソニーケミカル&インフォメーションデバイス株式会社 | 実装方法 |
US8499810B2 (en) | 2009-08-27 | 2013-08-06 | Transfer Devices Inc. | Molecular transfer lithography apparatus and method for transferring patterned materials to a substrate |
US20110207253A1 (en) | 2010-02-23 | 2011-08-25 | Yueh-Hsun Yang | Flip-chip led module fabrication method |
JP5792375B2 (ja) | 2011-05-19 | 2015-10-14 | 晶能光電(江西)有限公司Lattice Power(Jiangxi)Corporation | 窒化ガリウムベースフィルムチップの生産方法および製造方法 |
KR102047225B1 (ko) | 2012-11-30 | 2019-11-22 | 엘지디스플레이 주식회사 | Ncp 타입 접착수단 및 이를 구비한 표시장치 |
KR102090456B1 (ko) * | 2012-11-30 | 2020-03-18 | 엘지디스플레이 주식회사 | 비 전도성 타입 접착수단과 이를 구비한 표시장치 |
JP2015072410A (ja) | 2013-10-04 | 2015-04-16 | 富士フイルム株式会社 | コレステリック液晶層を含む熱圧着貼合用フィルムおよびその応用 |
-
2018
- 2018-11-06 KR KR1020180135345A patent/KR102424347B1/ko active IP Right Grant
-
2019
- 2019-05-30 US US16/427,162 patent/US10825795B2/en active Active
- 2019-08-28 CN CN201910806622.6A patent/CN111146100A/zh active Pending
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20010018986A1 (en) * | 2000-02-21 | 2001-09-06 | Akira Nagai | Resin compound, and adhesive film, metal-clad adhesive film, circuit board, and assembly structure, using the resin compound |
US20140353540A1 (en) * | 2013-05-31 | 2014-12-04 | Sunray Scientific, Llc | Anisotropic Conductive Adhesive with Reduced Migration |
US20170355906A1 (en) * | 2014-12-18 | 2017-12-14 | Dic Corporation | Liquid crystal composition and liquid crystal display element using same |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR20240070996A (ko) | 2022-11-15 | 2024-05-22 | 동국대학교 산학협력단 | 심리 검사용 이미지 데이터를 이용한 성격 유형 예측 장치 및 방법 |
KR20240084307A (ko) | 2022-12-06 | 2024-06-13 | 동국대학교 산학협력단 | 그림검사용 앱 프로그램을 심리 검사용 이미지 데이터를 이용한 성격 유형 예측 장치 및 방법 |
Also Published As
Publication number | Publication date |
---|---|
KR20200052136A (ko) | 2020-05-14 |
CN111146100A (zh) | 2020-05-12 |
US20200144222A1 (en) | 2020-05-07 |
US10825795B2 (en) | 2020-11-03 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
US12020953B2 (en) | Fan-out structure and method of fabricating the same | |
US12009345B2 (en) | 3D package structure and methods of forming same | |
US10062659B2 (en) | System and method for an improved fine pitch joint | |
US10340259B2 (en) | Method for fabricating a semiconductor package | |
KR102632563B1 (ko) | 반도체 패키지 | |
US9929022B2 (en) | Semiconductor chip package and method of manufacturing the same | |
US8803306B1 (en) | Fan-out package structure and methods for forming the same | |
KR102352237B1 (ko) | 팬 아웃 웨이퍼 레벨 패키지의 제조 방법 및 그의 구조 | |
US9805997B2 (en) | Packaging methods for semiconductor devices with encapsulant ring | |
US20180026014A1 (en) | Package-on-Package Structure with Through Molding Via | |
US9287191B2 (en) | Semiconductor device package and method | |
CN113140519A (zh) | 采用模制中介层的晶圆级封装 | |
US9941260B2 (en) | Fan-out package structure having embedded package substrate | |
US9716079B2 (en) | Multi-chip package having encapsulation body to replace substrate core | |
US20170098589A1 (en) | Fan-out wafer level package structure | |
US11139281B2 (en) | Molded underfilling for package on package devices | |
TWI769530B (zh) | 封裝結構及其形成方法 | |
KR102424347B1 (ko) | 반도체 칩의 접착 방법 | |
TW202017062A (zh) | 半導體封裝及其製造方法 | |
US20120129315A1 (en) | Method for fabricating semiconductor package | |
KR20240010629A (ko) | 반도체 패키지 제조 방법 | |
JP2022074033A (ja) | 半導体パッケージ | |
JP2006040983A (ja) | 半導体装置の製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A201 | Request for examination | ||
E902 | Notification of reason for refusal | ||
E701 | Decision to grant or registration of patent right | ||
GRNT | Written decision to grant |