KR102416413B1 - Micro light emitting device - Google Patents

Abstract

Embodiments disclose a micro light emitting device. The micro light emitting device include: a first conductivity type semiconductor layer; a second conductivity type semiconductor layer; an active layer disposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer; and an optical layer disposed between the second conductivity type semiconductor layer and the active layer. The optical layer includes a current blocking region formed at its edge and a current passing region formed at its center.

Description

Micro light emitting device {MICRO LIGHT EMITTING DEVICE}

The embodiment relates to a micro light emitting device.

A light emitting diode (LED) is one of light emitting devices that emits light when an electric current is applied thereto. Light-emitting diodes can emit high-efficiency light with a low voltage, and thus have an excellent energy-saving effect. Recently, the luminance problem of light emitting diodes has been greatly improved, and it has been applied to various devices such as a backlight unit of a liquid crystal display device, an electric sign board, a display device, and a home appliance.

A light emitting device including a compound such as GaN or AlGaN has many advantages, such as having a wide and easily adjustable band gap energy, and thus can be used in various ways as a light emitting device, a light receiving device, and various diodes.

In particular, light emitting devices such as light emitting diodes or laser diodes using group 3-5 or group 2-6 compound semiconductor materials of semiconductors have developed red, green, and Various colors such as blue and ultraviolet light can be implemented, and efficient white light can be realized by using fluorescent materials or combining colors. , safety, and environmental friendliness.

Recently, research has been conducted on a technology of manufacturing a light emitting diode in a micro size and using it as a pixel of a display.

The embodiment may provide a micro light emitting device capable of reducing leakage current.

The embodiment may provide a micro light emitting device having improved luminous efficiency.

The embodiment may provide a micro light emitting device with improved light extraction efficiency.

The problem to be solved in the embodiment is not limited thereto, and it will be said that the purpose or effect that can be grasped from the method of solving the problem described below or the embodiment is also included.

A micro light emitting device according to one aspect of the present invention includes: a first conductivity type semiconductor layer; a second conductivity type semiconductor layer; an active layer disposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer; and an optical layer disposed between the second conductivity-type semiconductor layer and the active layer, wherein the optical layer includes an oxide region formed at an edge thereof.

The optical layer may include a non-oxidized region formed in the central region.

The oxide region may be exposed through an outer surface of the light emitting device, and a ratio of a width of the light emitting device to a thickness of the oxide region may be 1:0.002 to 1:0.98.

When the current is injected into the light emitting device, the amount of current flowing to the side of the light emitting device may be 6% to 50% of the total amount of current injected into the light emitting device.

The optical layer may be an electron blocking layer.

The optical layer may have a different aluminum composition in a thickness direction.

The oxidation region may have a region having a different degree of oxidation in a thickness direction.

The oxide region may have a lower refractive index than that of an adjacent second semiconductor layer.

A second optical layer disposed between the first conductivity-type semiconductor layer and the active layer may be further included, wherein the second optical layer may include an oxide region formed at an edge thereof.

A width of the oxidation region of the second optical layer may be different from a width of the oxidation region of the optical layer.

A micro light emitting device according to another aspect of the present invention comprises: a first conductivity type semiconductor layer; a second conductivity type semiconductor layer; an active layer disposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer; and an optical layer disposed between the second conductivity-type semiconductor layer and the active layer; a first electrode electrically connected to the first conductivity-type semiconductor layer; and a second electrode electrically connected to the second conductivity-type semiconductor layer, wherein the width of the light emitting structure is 100 μm or less, and the amount of current flowing to the side of the light emitting structure when current is injected into the light emitting structure is the light emitting structure It may be smaller than the amount of current injected into the

an optical layer disposed in a region between the second conductivity-type semiconductor layer and the active layer, wherein the optical layer includes a central region and an edge region, wherein the edge region has a higher resistance and a lower refractive index than the central region have.

According to the embodiment, the leakage current of the micro light emitting device may be reduced, so that luminous efficiency may be improved. In addition, the light extraction efficiency can be improved.

Various and advantageous advantages and effects of the present invention are not limited to the above, and will be more easily understood in the course of describing specific embodiments of the present invention.

1 is a cross-sectional view of a micro light emitting device according to an embodiment of the present invention.
2 is a graph showing a change in luminous efficiency according to a change in the size of a micro light emitting device.
3 is a simulation result showing lateral current density and effective current density during current injection.
4 is a simulation result showing a change in lateral leakage current according to a change in the size of a micro light emitting device.
5 is a view showing the flow of carriers when a current is injected into a general micro light emitting device.
6 is a view showing the flow of carriers when current is injected into the micro light emitting device according to an embodiment of the present invention.
7A is a simulation result showing a change in an effective injection current according to a change in the width of an oxidation region.
7B is a plan view of the optical layer.
8 is a view showing a change in side leakage current according to a change in the width of an oxidation region.
9 is a view showing a change in an effective injection current according to a change in the width of an oxidation region.
10 is a view showing light extraction efficiency of a typical micro light emitting device.
11 is a view showing light extraction efficiency of a micro light emitting device according to an embodiment of the present invention.
12 is a modification of FIG. 1 .
13 is a diagram of a micro light emitting device according to another embodiment of the present invention.
14A to 14E are views illustrating a procedure for manufacturing a micro light emitting device according to another embodiment of the present invention.
15 is a diagram of a micro light emitting device according to another embodiment of the present invention.
16A to 16F are views showing a procedure for manufacturing a micro light emitting device according to another embodiment of the present invention.
17 is a diagram of a display device according to an exemplary embodiment.

Since the present invention may have various changes and may have various embodiments, specific embodiments will be illustrated and described in the drawings. However, this is not intended to limit the present invention to specific embodiments, and it should be understood to include all modifications, equivalents and substitutes included in the spirit and scope of the present invention.

Terms including an ordinal number such as second, first, etc. may be used to describe various elements, but the elements are not limited by the terms. The above terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the second component may be referred to as the first component, and similarly, the first component may also be referred to as the second component. and/or includes a combination of a plurality of related listed items or any of a plurality of related listed items.

When a component is referred to as being “connected” or “connected” to another component, it may be directly connected or connected to the other component, but it is understood that other components may exist in between. it should be On the other hand, when it is said that a certain element is "directly connected" or "directly connected" to another element, it should be understood that the other element does not exist in the middle.

The terms used in the present application are only used to describe specific embodiments, and are not intended to limit the present invention. The singular expression includes the plural expression unless the context clearly dictates otherwise. In the present application, terms such as “comprise” or “have” are intended to designate that a feature, number, step, operation, component, part, or combination thereof described in the specification exists, but one or more other features It should be understood that this does not preclude the existence or addition of numbers, steps, operations, components, parts, or combinations thereof.

Unless defined otherwise, all terms used herein, including technical and scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. Terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with the meaning in the context of the related art, and should not be interpreted in an ideal or excessively formal meaning unless explicitly defined in the present application. does not

Hereinafter, the embodiment will be described in detail with reference to the accompanying drawings, but the same or corresponding components are given the same reference numerals regardless of reference numerals, and overlapping descriptions thereof will be omitted.

In addition, the micro light emitting device according to the present embodiment may be a light emitting device having a micro size or a nano size. The micro light emitting device may have a size of 1 μm to 100 μm, but is not limited thereto.

1 is a cross-sectional view of a micro light emitting device according to an embodiment of the present invention.

Referring to FIG. 1 , the micro light emitting device according to the embodiment may include a light emitting structure ES1 and electrodes 71 and 72 . The light emitting structure ES1 may include a first conductivity type semiconductor layer 30 , an active layer 40 , and a second conductivity type semiconductor layer 60 .

The light emitting structure ES1 may have a structure in which the first conductivity type semiconductor layer 30 , the active layer 40 , and the second conductivity type semiconductor layer 60 are sequentially stacked. In addition, the substrate 10 and the buffer layer 20 may be formed under the light emitting structure ES1.

The substrate 10 may be formed of a material suitable for semiconductor material growth or a carrier wafer, may be formed of a material having excellent thermal conductivity, and may include a conductive substrate or an insulating substrate. For example, at least one of sapphire (Al ₂ O ₃ ), SiO ₂ , SiC, Si, GaAs, GaN, ZnO, GaP, InP, Ge, and Ga ₂ 0 ₃ may be used.

The buffer layer 20 may be disposed between the substrate 10 and the light emitting structure ES1 . When the light emitting structure ES1 is disposed on the substrate 10, dislocation, melt-back, crack, pit, and surface morphology that deteriorate crystallinity defects can be prevented. The buffer layer 20 may be at least one of InP, GaAs, GaN, AlGaN, and AlN.

The light emitting structure ES1 is formed by a Metal Organic Chemical Vapor Deposition (MOCVD) method, a Chemical Vapor Deposition (CVD) method, a Plasma-Enhanced Chemical Vapor Deposition (PECVD) method, and a molecular beam growth method (Molecular Beam). Epitaxy; MBE), hydride vapor phase epitaxy (HVPE), can be formed using a method such as sputtering (Sputtering).

The first conductivity type semiconductor layer 30 may be implemented with a group III-V group or group II-VI compound semiconductor, and the first conductivity type semiconductor layer 30 may be doped with a first dopant. The first conductivity type semiconductor layer 30 is A _x B _y C _(1-xy) D _z E _(1-z) (0≤x≤1, 0≤y≤1, 0≤x+y≤1, 0 It may be a semiconductor material having a composition formula of ≤z≤1). Here, A, B, and C may be one of Al, Ga, and In, and D and E may be one of As, P, N, and Sb.

Exemplarily, the first conductivity type semiconductor layer 30 may be formed of any one or more of GaN, InGaN, InAlGaN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, InGaAsP, InAlGaAs, InAlGaAsP, and InGaAsSb, but is not limited thereto. . When the first dopant is an n-type dopant such as Si, Ge, Sn, Se, Te, or the like, the first conductivity-type semiconductor layer 30 may be an n-type semiconductor layer.

The active layer 40 is a layer in which electrons (or holes) injected through the first conductivity type semiconductor layer 30 and holes (or electrons) injected through the second conductivity type semiconductor layer 60 meet. The active layer 40 may transition to a low energy level as electrons and holes recombine, and may generate light having a corresponding wavelength.

The active layer 40 may have any one of a single well structure, a multi-well structure, a single quantum well structure, a multi quantum well (MQW) structure, a quantum dot structure, or a quantum wire structure, and the active layer 40 The structure of is not limited thereto. For example, the active layer 40 may have a structure in which a well layer 41 and a barrier layer 42 are alternately disposed.

The active layer 40 may generate light in a visible light wavelength band. Exemplarily, the active layer 40 may output light in any one wavelength band among blue, green, and red. However, the present invention is not limited thereto, and the active layer 40 may generate light in an ultraviolet wavelength band or light in an infrared wavelength band.

The second conductivity type semiconductor layer 60 may be disposed on the active layer 40 . The second conductivity-type semiconductor layer 60 may be implemented with a group III-V group, II-VI group, or the like compound semiconductor, and the second conductivity-type semiconductor layer 60 may be doped with a second dopant. The second conductivity type semiconductor layer 60 is A _x B _y C _(1-xy) D _z E _(1-z) (0≤x≤1, 0≤y≤1, 0≤x+y≤1, 0 It may be formed of a semiconductor material having a compositional formula of ≤z≤1). Here, A, B, and C may be one of Al, Ga, and In, and D and E may be one of As, P, N, and Sb.

Exemplarily, the second conductivity type semiconductor layer 60 may be formed of any one or more of GaN, InGaN, InAlGaN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, InGaAsP, InAlGaAs, InAlGaAsP, and InGaAsSb. When the second dopant is a p-type dopant such as Mg, Zn, Ca, Sr, or Ba, the second conductivity-type semiconductor layer 60 doped with the second dopant may be a p-type semiconductor layer.

An optical layer 50 may be disposed between the second conductivity-type semiconductor layer 60 and the active layer 40 . The optical layer 50 has a relatively high Al composition ratio (Al composition ratio of 80% or more) while A _x B _y C _(1-xy) D _z E _(1-z) (0≤x≤1, 0≤y≤ Composition formula of 1, 0≤x+y≤1, 0≤z≤1) It may be a semiconductor material having The optical layer 50 may be formed of at least one of AlGaN, InAlGaN, AlGaAs, AlAsP, AlGaP, AlGaAsP, AlGaInP, InAlGaAs, InAlGaAsP, and AlInGaAsSb. In addition, the optical layer 50 may include the same dopant as the second conductivity type semiconductor layer 60 .

The optical layer 50 may have a higher aluminum composition than the first conductivity-type semiconductor layer 30 , the active layer 40 , and the second conductivity-type semiconductor layer 60 . The composition of aluminum may be 80% to 100%. Therefore, when in contact with water vapor, oxidation may proceed from the side of the optical layer 50 .

According to an embodiment, the non-oxidized central region 52 and the oxidized edge region 51 may be formed by exposing the side surface of the optical layer 50 to water vapor. The edge region 51 may be oxidized to have a higher resistance and a lower refractive index than the central region 52 . Accordingly, the edge region 51 may function as a current shielding region, and the center region 52 may function as a current pass region.

The first electrode 71 may be electrically connected to the first conductivity-type semiconductor layer 30 . Although the first electrode 71 is illustrated as being disposed under the substrate, the present invention is not limited thereto, and the first electrode 71 may be disposed on the first conductivity-type semiconductor layer 30 exposed by etching. . In this case, the optical layer 50 may be disposed higher than the exposed surface of the first conductivity-type semiconductor layer 30 .

The second electrode 72 may be disposed on the second conductivity-type semiconductor layer 60 to be electrically connected to the second conductivity-type semiconductor layer 60 .

The first electrode 71 and the second electrode 72 include indium tin oxide (ITO), indium zinc oxide (IZO), indium zinc tin oxide (IZTO), indium aluminum zinc oxide (IAZO), and indium gallium zinc oxide (IGZO). ), IGTO (indium gallium tin oxide), AZO (aluminum zinc oxide), ATO (antimony tin oxide), GZO (gallium zinc oxide), IZON (IZO Nitride), AGZO (Al-Ga ZnO), IGZO (In-Ga ZnO), ZnO, IrOx, RuOx, NiO, RuOx/ITO, Ni/IrOx/Au, Ni/AuGe/Au, and Ti/Pt/Au. Exemplarily, the first electrode 71 and the second electrode 72 may be Ni/AuGe/Au or Ti/Pt/Au, but are not limited thereto.

2 is a graph showing a change in luminous efficiency according to a change in the size of a micro light emitting device, FIG. 3 is a simulation result showing a side current density and an effective current density when a current is injected, and FIG. 4 is a side view according to a size change of the micro light emitting device It is a simulation result showing the change of leakage current.

Referring to FIG. 2 , in the case of a micro light emitting device having a side length of 262 μm, when the injected current density is 50 A/cm ² or more, it has about 5% luminous efficiency, whereas that of a micro light emitting device having a side length of 32 μm In this case, it can be seen that the luminous efficiency is about 2% even when the injected current density is increased. That is, it can be seen that the luminous efficiency decreases as the size of the micro light emitting device decreases.

The simulation results of FIGS. 3 and 4 are simulation results based on the following semiconductor stack structure. The semiconductor stack structure may be a red light emitting device, but a blue light emitting device and a green light emitting device may have the same result.

Layer ID matter Thickness (㎛) number of repetitions p-contact layer p-GaAs 0.02 One p-cladding layer p-AlGaAs 1 to 10 One 10 MQW for 940nm i-GaAs/i-InGaAs/i-GaAs 0.015/0.008/0.015 10/10/10 n-cladding layer n-AlGaAs 1 to 10 One n-buffer n-GaAs 0.3 One n-substrate n-GaAs 100-500 One

Referring to FIG. 3 , when a current is injected into a micro light emitting device having a side length of 30 μm, a current leaked to the side of the micro light emitting device (hereinafter referred to as a side leakage current) and injected into the micro light emitting device for light emission It can be seen that a participating current (hereinafter referred to as an effective injection current) exists. The sum of the lateral leakage current and the effective injection current may be the total amount of current applied to the micro light emitting device.

The lateral leakage current may be a current that does not participate in light emission because the applied current flows along the side surface of the micro light emitting device without being injected into the interior of the micro light emitting device. Accordingly, since a significant portion of the applied current is leaked, the luminous efficiency may decrease as the size of the micro light emitting device becomes smaller.

Referring to FIG. 4 , it can be seen that as the size of the micro light emitting device decreases, the ratio of the side leakage current among the applied currents increases. It can be seen that when the size of the micro light emitting device is 200 μm, the ratio of the side leakage current is only about 10%, but when the size of the micro light emitting device is 100 μm, the ratio of the side leakage current almost doubles to about 20%. can

Moreover, it can be seen that when the size of the micro light emitting device is 50 μm, the ratio of the side leakage current increases to about 35%, and when the size of the micro light emitting device is 20 μm, the ratio of the side leakage current increases rapidly to about 85%. have.

In order to increase the resolution of the display device, the size of the micro light emitting device needs to be smaller. In order to use the micro light emitting device as a pixel light source of a high-resolution display, it may be advantageous to manufacture the micro light emitting device having a size of 50 μm or less. Therefore, it is very important to prevent a decrease in luminous efficiency as the size of the micro light emitting device decreases.

In the embodiment, as described above, the luminous efficiency of the micro light emitting device can be effectively improved by forming an optical layer inside the micro light emitting device to reduce side leakage current.

5 is a view showing a flow of carriers when current is injected into a general micro light emitting device, and FIG. 6 is a view showing a flow of carriers when current is injected into a micro light emitting device according to an embodiment of the present invention.

Referring to FIG. 5 , a typical micro light emitting device may not participate in light emission because a portion CL1 of carriers (electrons or holes) moves along the side surface of the light emitting device when a voltage is applied. As the size of the light emitting device decreases, the density of carriers moving along the side surface may increase. Accordingly, as the size of the light emitting device decreases, the lateral leakage current may increase.

Referring to FIG. 6 , in the micro light emitting device according to the embodiment, an optical layer 50 may be formed between the second conductivity type semiconductor layer 60 and the active layer 40 .

The optical layer 50 may have a higher aluminum composition than the active layer 40 and the second conductivity-type semiconductor layer 60 . Exemplarily, the optical layer 50 may be formed of any one or more of AlGaN, InAlGaN, AlGaAs, AlGaP, AlAsP, AlGaAsP, AlGaInP, InAlGaAs, InAlGaAsP, or AlInGaAsSb having a high Al composition ratio.

Since the optical layer 50 has a high aluminum composition, the energy bandgap may be the largest in the light emitting structure ES1 . Accordingly, by blocking the flow of electrons supplied from the first conductivity-type semiconductor layer 30 , escaping to the second conductivity-type semiconductor layer 60 , the probability of recombination of electrons and holes in the active layer 40 may be increased. . That is, the optical layer 50 may serve as an electron blocking layer.

The optical layer 50 may be composed of a plurality of sub-layers (not shown) to function as an electron blocking layer, and each sub-layer may have a different aluminum composition. Accordingly, the degree of oxidation of each sub-layer may be different even under the same oxidation condition.

The optical layer 50 may include an unoxidized central region 52 and an oxidized edge region 51 . The edge region 51 may be oxidized to have a higher resistance and a lower refractive index than the central region 52 . Accordingly, the injected carrier CL1 is blocked by the edge region having high resistance, so that it cannot move along the side surface of the light emitting device and may be bent into the central region 52 having low resistance. Therefore, according to the embodiment, it is possible to reduce the current leaking to the side.

The thickness of the oxidized edge region 51 may be 1 μm to 10 μm. If the thickness of the edge region 51 is less than 1 μm, the carrier may pass through the edge region 51 and move along the side of the light emitting device because the thickness is too thin. increased, and there is a risk of oxidation to other semiconductor layers.

A ratio of the width W2 of the light emitting device to the thickness of the edge region may be 1:0.01 to 1:0.9. The width of the light emitting device may be 1 μm to 100 μm. If the ratio of the width of the light emitting device to the thickness of the edge region does not satisfy 1: 0.01 to 1: 0.9, the carrier moves along the side of the light emitting device to increase the leakage current, increase the oxidation time, and increase the thickness of the light emitting device. there is a problem.

According to the embodiment, it is exemplified that the resistance and refractive index are changed by oxidizing the edge region of the optical layer, but the present invention is not limited thereto, and various methods for controlling the resistance and refractive index of the central region and the edge region to be different can be applied. have. For example, the opening may be formed by controlling the composition of the central region and the edge region differently or by removing the central region.

An intermediate layer 61 may be disposed between the optical layer 50 and the active layer 40 . The intermediate layer 61 may prevent the active layer 40 from being exposed to the outside when the central region 52 of the optical layer 50 is removed.

7A is a simulation result showing a change in effective injection current according to a change in the width of an oxidation region, and FIG. 7B is a plan view of an optical layer. 8 is a view showing a change in side leakage current according to a change in the width of an oxidation region. 9 is a view showing a change in an effective injection current according to a change in the width of an oxidation region.

7A and 7B , it can be seen that the density of the effective injection current increases as the width W1 of the oxidized edge region 51 increases. When the width of the oxidized edge region 51 is 1 μm, the injected current density is about 1 A/cm ² , whereas when the width of the oxidized edge region 51 is 5 μm, the current density is about 1.25 A/cm ² increased to When the width of the oxidized edge region 51 was 10 μm, the current density increased to about 1.8 A/cm ² , and when the width of the oxidized edge region 51 was 12 μm, the current density was about 2.4 A/cm ² It can be seen that increased

However, when the width of the oxidized edge region 51 is 12 μm, the current is concentrated in the central region of the optical layer 50 , and thus a problem in that the driving voltage is increased may occur. Therefore, when the width of the oxidized edge region 51 is controlled to be 5 μm to 11 μm, the luminous efficiency is improved by increasing the current density without excessively increasing the driving voltage in the central region 52 of the optical layer 50 . can be improved

According to an embodiment, the area of the edge region 51 of the optical layer 50 may be larger than the area of the central region 52 . Exemplarily, when the width W1 of the edge region 51 is 5 μm in the square-shaped optical layer having the width W2 of 30 μm, the width of the central region 52 may be 20 μm. Accordingly, since the total area of the optical layer 50 is 900 μm ² and the area of the central region 52 is 400 μm ² , the area of the edge region 51 may be 500 μm ² . That is, in order to block the side leakage current, the area of the edge region 51 may be larger than the area of the center region 52 .

For example, the area of the central region 52 may be 9% to 45% of the total area of the optical layer, and the area of the edge region 51 may be 55% to 91% of the total area of the optical layer.

As described above, since the thickness of the optical layer 50 may be 1 μm to 10 μm, the ratio (thickness: width) of the thickness to the width of the edge region of the optical layer may be 1:0.1 to 1:11. When this condition is satisfied, the luminous efficiency can be improved by increasing the current density in the central region.

Referring to FIG. 8 , as the length of the edge region 51 increases, it can be seen that the ratio of the lateral leakage current to the internal injection current gradually decreases. As described above, it can be seen that when the width of the oxidized edge region 51 is 5 μm to 11 μm, the ratio of the lateral leakage current is reduced to 17.4% to 6.4%.

For example, when the ratio of the side leakage current is 17.4%, the internal injection current may be 82.6%, and when the ratio of the side leakage current is 6.4%, the internal injection current may be 93.6%.

Accordingly, when the current is injected into the light emitting device, the lateral leakage current flowing to the side of the light emitting device may be 6% to 20% of the total amount of current applied to the light emitting device.

Referring to FIG. 9 , when the luminous efficiency in the case where there is no oxidized edge region is 100%, when the width of the edge region is 5 μm, the luminous efficiency increases to 191.3%, and when the width of the edge region is 12 μm, the luminous efficiency It can be seen that increased to 217%.

10 is a view showing light extraction efficiency of a general micro light emitting device, and FIG. 11 is a view showing light extraction efficiency of a micro light emitting device according to an embodiment of the present invention.

Referring to FIG. 10 , in the case of a conventional micro light emitting device, since each semiconductor layer is made of AlGaAs, the refractive index is about 3.3, and the refractive index of air is 1, so the critical angle is about 17.6 degrees according to Snell's law. Therefore, since most of the light is larger than the critical angle, there is a problem that the light extraction efficiency is very low due to total reflection. In addition, even when the semiconductor layer is GaN, since the refractive index is 2.44 and the critical angle is 24.2 degrees, the light extraction efficiency is relatively low.

However, according to the embodiment as shown in FIG. 11 , since the oxidized edge region 51 has a composition of AlOx, the refractive index is reduced to 1.55, and thus the critical angle with air is increased to 40.2 degrees. Accordingly, a portion L2 of the light emitted from the active layer 40 may be emitted to the outside through the edge region 51 . Accordingly, according to the embodiment, the light extraction efficiency may be improved while reducing the leakage current by the edge region.

According to an embodiment, irregularities may be formed on the side surface of the light emitting device. The unevenness can be manufactured using a semiconductor mask process. Accordingly, the roughness of the outer surface of the optical layer may be increased to improve light extraction efficiency.

12 is a modification of FIG. 1 .

Referring to FIG. 12 , the micro light emitting device according to the embodiment may include a light emitting structure ES1 and an electrode. The light emitting structure ES1 may include a first conductivity type semiconductor layer 30 , an active layer 40 , and a second conductivity type semiconductor layer 60 .

The light emitting structure ES1 may have a structure in which the first conductivity type semiconductor layer 30 , the active layer 40 , and the second conductivity type semiconductor layer 60 are sequentially stacked. In this case, the first optical layer 50 may be disposed between the first conductivity type semiconductor layer 30 and the active layer 40 , and the second optical layer 50 is disposed between the second conductivity type semiconductor layer 60 and the active layer 40 . Layer 80 may be disposed.

As described above, the first optical layer 50 and the second optical layer 80 may have a higher aluminum composition than the active layer 40 and the second conductivity-type semiconductor layer 60 . Exemplarily, the first optical layer 50 and the second optical layer 80 may be made of any one or more of AlGaN, InAlGaN, AlGaAs, AlGaP, AlAsP, AlGaAsP, AlGaInP, InAlGaAs, InAlGaAsP, or AlInGaAsSb having a high Al composition ratio. can In this case, the composition of aluminum may be 80% to 100%. Accordingly, when in contact with water vapor, the first optical layer 50 and the second optical layer 80 may be oxidized from the side.

The first optical layer 50 and the second optical layer 80 may include non-oxidized central regions 52 and 82 and oxidized edge regions 51 and 81 . The edge regions 51 and 81 may have a higher resistance and a lower refractive index than the central regions 52 and 82 due to oxidation. Accordingly, since the injected carriers are concentrated in the central regions 52 and 82 having a relatively low resistance, a lateral leakage current can be reduced.

At this time, the width of the edge region 51 of the first optical layer 50 and the width of the edge region 81 of the second optical layer 80 may be the same, but is not necessarily limited thereto. The width of the edge region 81 of , may be smaller than the width of the edge region 51 of the first optical layer 50 . In this structure, not only the flow of carriers (holes) injected from the second conductivity type semiconductor layer 60 to the active layer, but also the flow of carriers (electrons) injected from the first conductivity type semiconductor layer 30 can be concentrated in the central region. Therefore, the probability of recombination of electrons and holes in the active layer 40 may be increased.

13 is a view of a micro light emitting device according to another embodiment of the present invention, and FIGS. 14A to 14E are views showing a procedure of manufacturing the micro light emitting device according to another embodiment of the present invention.

Referring to FIG. 13 , the micro light emitting device includes a substrate 110 , a first conductivity type semiconductor layer 130 , an active layer 140 , and a second conductivity type semiconductor layer 160 disposed on the substrate 110 , , an optical layer 182 may be disposed between the active layer 140 and the second conductivity-type semiconductor layer 160 .

The substrate 110 may be formed of a material suitable for semiconductor material growth or a carrier wafer, may be formed of a material having excellent thermal conductivity, and may include a conductive substrate or an insulating substrate. For example, at least one of sapphire (Al ₂ O ₃ ), SiO ₂ , SiC, Si, GaAs, GaN, ZnO, GaP, InP, Ge, and Ga ₂ 0 ₃ may be used.

The first conductivity type semiconductor layer 130 , the active layer 140 , and the second conductivity type semiconductor layer 160 are Al _x In _y Ga _(1-xy) N (0≤x≤1, 0≤y≤1, It may be formed of any one or more of a semiconductor material having a composition formula of 0≤x+y≤1), GaN, InGaN, InAlGaN, AlGaAs, GaP, GaAs, GaAsP, AlGaInP, InGaAsP, InAlGaAs, InAlGaAsP, InGaAsSb, but limited thereto I never do that.

In the active layer 140 , well layers and barrier layers are alternately disposed to output visible light. The active layer 140 may emit light in blue, green, and red wavelength bands, but is not limited thereto, and may emit light in an ultraviolet or infrared wavelength band.

The optical layer 182 may be disposed between the active layer 140 and the second conductivity type semiconductor layer 160 . The optical layer 182 may have an opening region 182a formed therein. Accordingly, the optical layer 182 disposed at the edge of the light emitting structure may function as a current blocking region, and the opening region 182a formed in the center of the optical layer 182 may function as a current passing region.

The optical layer 182 may include silicon oxide (SiOx) or silicon nitride (SiNx), but is not limited thereto, and may include various insulating materials. In addition, the optical layer 182 may be formed of an oxidizable semiconductor layer (eg, AlGaAs) containing aluminum and have a structure in which an opening region is formed in the center.

The optical layer 182 may have a thickness of 1 μm to 10 μm. If the thickness of the optical layer 182 is less than 1 μm, the carrier may move along the side surface of the light emitting device because the thickness is too thin, and when the thickness of the optical layer 182 is greater than 10 μm, the optical layer 182 causes the light emitting device As the thickness increases and the step increases, optical or electrical properties may be deteriorated.

The width of the optical layer 182 may be 5 μm to 11 μm. When the width of the optical layer 182 is controlled to be 5 μm to 11 μm, the luminous efficiency can be improved by increasing the current density without excessively increasing the driving voltage in the opening region disposed in the center of the optical layer 182 . have.

The ratio of the maximum width of the light emitting device to the thickness of the optical layer 182 may be 1: 0.01 to 1: 0.9. The maximum width of the light emitting device may be the maximum width of the first conductivity type semiconductor layer 130 . The maximum width of the light emitting device may be 1 μm to 100 μm. If the ratio of the width of the light emitting device to the thickness of the optical layer 182 does not satisfy 1: 0.01 to 1: 0.9, the carrier moves along the side of the light emitting device to increase the leakage current or increase the thickness of the light emitting device. have.

A protective layer 181 may be formed between the active layer 140 and the optical layer 182 . The protective layer may prevent the active layer 140 from being exposed in the process of forming the optical layer 182 . The passivation layer may be undoped GaN, but is not limited thereto, and may have various semiconductor compositions capable of epi-growth again.

The electron blocking layer 183 may be disposed on the optical layer 182 . Accordingly, the electron blocking layer 183 may form a first blocking region 183a disposed on the optical layer 182 and a second blocking region 183b disposed inside the opening region 182a of the optical layer 182 . may include Also, the electron blocking layer 183 may include a stepped region 183c formed between the first blocking region 183a and the second blocking region 183b.

The first electrode 171 may be disposed on the exposed surface 130a of the first conductivity type semiconductor layer 130 , and the second electrode 172 may be disposed on the second conductivity type semiconductor layer 160 . have.

14A to 14C , the nucleation layer 121 , the buffer layer 122 , the first conductivity type semiconductor layer 130 , the active layer 140 , and the second conductivity type semiconductor layer 160 on the substrate 110 . ), the protective layer 181 and the optical layer 182 may be sequentially formed. Thereafter, the protective layer 181 may be partially exposed by forming an opening region 182a in the center of the optical layer 182 .

Referring to FIG. 14D , an electron blocking layer 183 and a second conductivity type semiconductor layer 160 may be formed by epi-growth on the exposed protective layer 181 . The electron blocking layer 183 may be re-growth on the protective layer 181 to extend over the optical layer 182 . The electron blocking layer 183 may not be formed on a portion of the upper surface of the optical layer 182 depending on growth conditions.

Referring to FIG. 14E , the plurality of light emitting structures ES1 and ES2 may be separated through mesa etching. Thereafter, the exposed surface 130a of the first conductivity type semiconductor layer 130 may be formed and the first electrode 171 may be formed. In addition, a second electrode 172 may be formed on the second conductivity type semiconductor layer 160 .

15 is a view of a micro light emitting device according to another embodiment of the present invention, and FIGS. 16A to 16F are views showing a procedure for manufacturing a micro light emitting device according to another embodiment of the present invention.

15 , in the light emitting device according to an embodiment of the present invention, the width of the active layer 140 is formed to be smaller than the width of the optical layer 182 , and the optical layers 191 are disposed at both ends of the active layer 140 . can

The first conductivity-type semiconductor layer 130 includes the protrusion 130b on which the active layer 140 is disposed, and the width of the protrusion 130b may be greater than the width of the active layer 140 . Also, the width of the protrusion 130b may be the same as or greater than the width of the electron blocking layer 183 .

According to the embodiment, since the optical layer 191 is disposed to surround the active layer 140 , it is possible to suppress a current leaking to the side of the active layer 140 when a current is applied. The optical layer 191 may be a partial region of the insulating layer 190 surrounding the light emitting structure. The insulating layer 190 may include, but is not limited to, silicon oxide (SiOx) and silicon nitride (SiNx), and may include various insulating materials.

16A and 16B , the nucleation layer 121 , the buffer layer 122 , the first conductivity type semiconductor layer 130 , the active layer 140 , and the second conductivity type semiconductor layer 160 on the substrate 110 . ) can be formed sequentially. Thereafter, the active layer 140 and the second conductivity-type semiconductor layer 160 may be separated into a plurality of light emitting structures through etching.

Referring to FIG. 16C , a concave portion ET1 may be formed by partially etching a side surface of the active layer 140 of each light emitting structure. A method of etching the side surface of the active layer 140 is not particularly limited. The side surface of the active layer 140 may be etched using various photomasks and semiconductor etching processes. For example, the side surface of the active layer 140 may be selectively etched using an undercut process. In this process, the width W31 of the active layer 140 may be smaller than the width of the protrusion 130b of the first conductivity-type semiconductor layer 130 and/or the width of the second conductivity-type semiconductor layer 160 .

Referring to FIG. 16D , the insulating layer 190 may be coated on the light emitting structure. In this case, the insulating region disposed on the side surface of the active layer 140 may function as an optical layer.

16E and 16F , a through hole exposing the upper surface of the second conductivity type semiconductor layer 160 and a through hole exposing the upper surface of the first conductivity type semiconductor layer 130 are formed in the insulating layer 190 . and the first electrode 171 and the second electrode 172 may be formed, respectively.

17 is a diagram of a display device according to an exemplary embodiment.

Referring to FIG. 17 , as an embodiment, a display device including a light emitting device includes a panel substrate 410 , a driving thin film transistor T2 , a planarization layer 430 , a common electrode CE, a pixel electrode AE, and a micro light emission. element 10 may be included.

The driving thin film transistor T2 may include a gate electrode GE, a semiconductor layer SCL, an ohmic contact layer OCL, a source electrode SE, and a drain electrode DE.

The driving thin film transistor T2 is a driving element, and may be electrically connected to the light emitting element to drive the light emitting element.

The gate electrode GE may be formed together with the gate line. The gate electrode GE may be covered with a gate insulating layer 440 .

The gate insulating layer 440 may be formed of a single layer or a plurality of layers made of an inorganic material, and may be made of silicon oxide (SiOx), silicon nitride (SiNx), or the like.

The semiconductor layer SCL may be disposed in the form of a preset pattern (or island) on the gate insulating layer 440 to overlap the gate electrode GE. The semiconductor layer SCL may be formed of a semiconductor material made of any one of amorphous silicon, polycrystalline silicon, oxide, and an organic material, but is not limited thereto.

The ohmic contact layer OCL may be disposed in a preset pattern (or island) shape on the semiconductor layer SCL. The ohmic contact layer PCL may be for ohmic contact between the semiconductor layer SCL and the source/drain electrodes SE and DE.

The source electrode SE is formed on the other side of the ohmic contact layer OCL to overlap one side of the semiconductor layer SCL.

The drain electrode DE may be formed on the other side of the ohmic contact layer OCL to be spaced apart from the source electrode SE while overlapping the other side of the semiconductor layer SCL. The drain electrode DE may be formed together with the source electrode SE.

The planarization layer may be disposed on the second panel substrate 410 . A driving thin film transistor T2 may be disposed inside the planarization layer. The planarization layer according to an embodiment may include an organic material such as benzocyclobutene or photo acryl, but is not limited thereto.

The groove 450 is a predetermined light emitting area, and a light emitting device may be disposed therein. Here, the light emitting area may be defined as an area other than the circuit area in the display device.

The groove 450 may be concavely formed in the planarization layer 430 , but is not limited thereto.

The micro light emitting device 10 may be disposed in the groove 450 . The first electrode and the second electrode of the micro light emitting device 10 may be connected to a circuit (not shown) of the display device.

The second electrode of the micro light emitting device 10 may be electrically connected to the source electrode SE of the driving thin film transistor T2 through the pixel electrode AE. In addition, the first electrode of the light emitting device may be connected to the common power line CL through the common electrode CE.

The pixel electrode AE may electrically connect the source electrode SE of the driving thin film transistor T2 and the second electrode of the light emitting device.

The common electrode CE may electrically connect the common power line CL and the first electrode of the light emitting device.

Each of the pixel electrode AE and the common electrode CE may include a transparent conductive material. The transparent conductive material may include a material such as indium tin oxide (ITO) or indium zinc oxide (IZO), but is not limited thereto.

A display device according to an embodiment of the present invention includes a standard definition (SD) level resolution (760×480), a high definition (HD) level resolution (1180×720), a full HD (Full HD) level resolution (1920×1080), and UH (Ultra HD) level resolution (3480×2160), or UHD level or higher resolution (eg, 4K (K=1000), 8K, etc.) may be implemented. In this case, a plurality of light emitting devices according to the embodiment may be arranged and connected to suit the resolution.

In addition, the display device may be an electric billboard or TV having a diagonal size of 100 inches or more, and the pixel may be implemented as a light emitting diode (LED). Accordingly, power consumption is reduced, and a long lifespan can be provided with a low maintenance cost, and a high-brightness self-luminous display can be provided.

The light emitting device according to the embodiment may further include an optical member such as a light guide plate, a prism sheet, and a diffusion sheet to function as a backlight unit. In addition, the light emitting device of the embodiment may be further applied to a display device, a lighting device, and a pointing device.

In this case, the display device may include a bottom cover, a reflector, a light emitting module, a light guide plate, an optical sheet, a display panel, an image signal output circuit, and a color filter. The bottom cover, the reflector, the light emitting module, the light guide plate, and the optical sheet may form a backlight unit.

The reflector is disposed on the bottom cover, and the light emitting module emits light. The light guide plate is disposed in front of the reflection plate to guide light emitted from the light emitting module to the front, and the optical sheet includes a prism sheet and the like, and is disposed in front of the light guide plate. A display panel is disposed in front of the optical sheet, an image signal output circuit supplies an image signal to the display panel, and a color filter is disposed in front of the display panel.

In addition, the lighting device may include a light source module including a substrate and the light emitting device of the embodiment, a heat dissipation unit for dissipating heat of the light source module, and a power supply unit for processing or converting an electrical signal received from the outside and providing it to the light source module. . Furthermore, the lighting device may include a lamp, a head lamp, or a street lamp.

In addition, the camera flash of the mobile terminal may include a light source module including the light emitting device of the embodiment.

In the above, the embodiment has been mainly described, but this is only an example and does not limit the present invention, and those of ordinary skill in the art to which the present invention pertains are not exemplified above in the range that does not depart from the essential characteristics of the present embodiment. It can be seen that various modifications and applications are possible. For example, each component specifically shown in the embodiment can be implemented by modification. And differences related to such modifications and applications should be construed as being included in the scope of the present invention defined in the appended claims.

Claims (14)

A first conductivity type semiconductor layer, a second conductivity type semiconductor layer, an active layer disposed between the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, and disposed between the second conductivity type semiconductor layer and the active layer a light emitting structure including an optical layer;
a first electrode electrically connected to the first conductivity-type semiconductor layer; and
a second electrode electrically connected to the second conductivity-type semiconductor layer;
The optical layer includes a current blocking region formed at the edge and a current path region formed in the center,
Among the total area of the optical layer, the area of the current blocking region is larger than the area of the current path region,
The current blocking region is exposed to the outer surface of the light emitting device, the ratio of the width of the light emitting device to the thickness of the current blocking region is 1: 0.01 to 1: 0.9,
When the current is injected into the light emitting structure, the amount of current flowing to the side of the light emitting structure is 6% to 50% of the total amount of current injected into the light emitting structure,
The current blocking region is an oxidized region in which aluminum of the optical layer is oxidized, the current passing region is an opening region,
The electron blocking layer disposed on the optical layer includes a first blocking region on the current blocking region, a second blocking region disposed inside the opening region, and connecting the first blocking region and the second blocking region including a step area,
The width of the light emitting structure is less than 100㎛,
a second optical layer disposed between the first conductivity-type semiconductor layer and the active layer;
The second optical layer includes a current blocking region formed at the edge,
A width of the current blocking region of the second optical layer is smaller than a width of the current blocking region of the optical layer. delete delete The method of claim 1,
The optical layer is a micro light emitting device having a different aluminum composition in the thickness direction.
The method of claim 1,
The current blocking region is a micro light emitting device having a lower refractive index than a neighboring semiconductor layer.
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