KR102327733B1 - Printed circuit board and method of manufacturing the same - Google Patents

Abstract

The present invention relates to a printed circuit board and a method for manufacturing the same.
A printed circuit board according to the present invention includes an insulating layer, a circuit layer formed on the insulating layer, a circuit layer comprising a pad and a circuit pattern, and stacked on the insulating layer, an opening through which a part of the pad is exposed is formed, and a solder resist layer in which one opening wall of the opening is positioned on the pad and the other opening wall is positioned outside the pad.

Description

Printed circuit board and its manufacturing method

The present invention relates to a printed circuit board and a method of manufacturing the same, and more particularly, to a printed circuit board and a method of manufacturing the same to prevent lifting of a solder resist layer.

In general, a printed circuit board (PCB: Printed Circuit Board) is a stacked structure in which insulating layers and conductive layers are alternately stacked, and the conductive layers may be formed in a circuit pattern by patterning.

Such a printed circuit board protects the circuit formed on the outermost side of the laminate, prevents oxidation of the conductor layer, and also serves as an insulation during electrical connection with a chip or other board mounted on the printed circuit board ( SR) is provided.

In a conventional solder resist, an opening area (SRO: Solder Resist Opening) that becomes an electrical connection path is formed by connecting means such as solder or bumps, and the opening area of the solder resist becomes I/ As the input/output (O) performance is improved, a larger number of opening areas is required, thereby requiring a small bump pitch of the opening area. In this case, the bump pitch of the opening region means the center distance between the adjacent opening regions and the bump pitch of the solder resist opening region.

As described above, in order to reduce the bump pitch of the opening region, the pad of the conductor layer exposed through the opening region should be small, and the matching characteristic between the solder resist and the pad in the opening region should be improved to satisfy the improved I/O performance.

On the other hand, one of the main factors influencing the alignment characteristics of the solder resist and the pad in the printed circuit board is UV exposure performed in the manufacturing process of the printed circuit board. Depending on the offset (offset) can be set.

However, in spite of an appropriate offset setting during UV exposure of the solder resist, exposure interference occurs depending on the position of the circuit pattern disposed under the solder resist, so it is difficult to satisfy the alignment characteristic between the opening area of the solder resist and the pad. There is this.

On the other hand, even if an alignment defect between the solder resist and the pad occurs due to exposure interference during the exposure process of the solder resist, if the gap between the edge of the solder resist opening area and the circuit pattern is large, the defect in which the solder resist is lifted does not occur. If the gap between the edge and the circuit pattern is small, a defect in which the solder resist is lifted may occur. This is due to the need to improve I/O performance by reducing the bump pitch of the opening region as described above.

Republic of Korea Patent Publication No. 2014-0027731

Therefore, the present invention was devised to solve the above-mentioned disadvantages and problems raised in the conventional printed circuit board, even if eccentricity occurs in the exposure process performed when the solder resist layer constituting the outermost layer of the printed circuit board is formed. It is an object of the present invention to provide a printed circuit board that prevents the solder resist from floating.

In addition, it is another object of the present invention to form an opening exposing a part of the pad on the insulating layer overlaid with the solder resist layer. There is provided a printed circuit board such that the interval between the and the circuit pattern disposed in the adjacent position is formed at an interval of 16.5 μm or less.

In addition, another object of the present invention is to provide a method for manufacturing a printed circuit board in which the lifting of the solder resist layer between the pad and the circuit pattern on the insulating layer is prevented.

The above object of the present invention is that a circuit layer comprising a pad and a circuit pattern is provided on an insulating layer, and a solder resist layer covering the circuit layer is laminated, and the solder resist layer has an opening through which a part of the pad is exposed. This is achieved by providing a printed circuit board in which one opening wall of the opening is positioned on the pad, the other opening wall is positioned outside the pad, and the distance between the pad and the circuit pattern is 16.5 µm or less.

In this case, the width of the opening formed in the solder resist layer is formed to be smaller than the width of the pad.

In addition, the present invention comprises the steps of forming a circuit layer composed of a pad and a circuit pattern on an insulating layer, applying a primary solder resist on the insulating layer, and the upper surface of the circuit layer on the primary resist Developing a portion of the primary solder resist to be exposed; exposing the primary solder resist; applying a secondary solder resist on an upper portion of the primary solder resist; exposing the secondary solder resist except for, developing the secondary solder resist to form an opening through which a portion of the upper surface of the pad is exposed, and curing the primary solder resist and the secondary solder resist to solder resist It is achieved by providing a method of manufacturing a printed circuit board comprising the step of forming a layer.

On the other hand, the present invention comprises the steps of: forming a circuit layer composed of a pad and a circuit pattern on an insulating layer; applying a solder resist on the insulating layer; A method of manufacturing a printed circuit board comprising the steps of: developing the solder resist so that a part of the opening forming region is removed to expose the upper surface of the pad; and curing the solder resist to form a solder resist layer. This is achieved by providing

As described above, the printed circuit board and the method for manufacturing the same according to the present invention can prevent the lifting of the solder resist layer that may occur during exposure of the solder resist between the pad and the circuit pattern formed on the insulating layer.

1 is a cross-sectional view of a printed circuit board according to the present invention.
2 is a cross-sectional view during an exposure process when manufacturing a printed circuit board according to the present invention.
3 to 9 are cross-sectional views of an embodiment of the method for manufacturing a printed circuit board of the present invention,
3 is a cross-sectional view of a state in which the primary solder resist is applied to the outermost layer of the printed circuit board;
4 is a cross-sectional view of a state in which a part of the primary solder resist is developed;
5 is a cross-sectional view of the primary solder resist during exposure,
6 is a cross-sectional view of a state in which the secondary solder resist is applied;
7 and 8 are cross-sectional views of the secondary solder resist during exposure and development.
9 to 12 are cross-sectional views showing a method for manufacturing a printed circuit board according to the present invention,
9 is a cross-sectional view of a state in which a solder resist is applied to the outermost layer of a printed circuit board;
10 is a cross-sectional view of the solder resist upon exposure;
11 is a cross-sectional view of a part of the solder resist opening in a developed state;
12 is a cross-sectional view of a solder resist layer having an opening formed by curing the solder resist.

The terminology used herein is used to describe specific embodiments, not to limit the present invention. The singular form as used herein may include the plural form unless the context clearly dictates otherwise. Also, "comprise" and/or "comprising" when used herein excludes the presence or addition of the recited shapes, numbers, steps, actions, members, elements and/or groups. not to do

The objects, specific advantages and novel features of the present invention will become more apparent from the following detailed description and preferred embodiments taken in conjunction with the accompanying drawings. In the present specification, in adding reference numbers to the components of each drawing, it should be noted that only the same components are given the same number as possible even though they are indicated on different drawings. In addition, in describing the present invention, if it is determined that a detailed description of a related known technology may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted. In this specification, terms such as first, second, etc. are used to distinguish one component from another, and the component is not limited by the terms.

The description of the operation and effect including the technical configuration for the above object of the printed circuit board with embedded electronic component and the manufacturing method thereof according to the present invention will be clearly understood by the detailed description with reference to the drawings shown below.

1 is a cross-sectional view of a printed circuit board according to the present invention.

As shown, the printed circuit board 100 according to the present embodiment includes an insulating layer 110 , a circuit layer 120 formed on the insulating layer 110 , and a solder resist layer stacked on the insulating layer 110 . (130). At this time, although not shown in FIG. 1 , in the printed circuit board of the present embodiment, circuit layers and insulating layers are alternately stacked under the insulating layer 110 , and the circuit layers may be electrically connected through vias formed in the insulating layer.

The insulating layer 110 may be formed by curing an insulating resin material such as epoxy or resin, and impregnating the insulating resin material with inorganic fillers to have a low coefficient of thermal expansion (CTE). In addition, the insulating layer 110 may be an insulating resin material impregnated with glass colth or fabric cloth in order to minimize the occurrence of warpage during curing of the insulating resin material and improve the modulus of rigidity.

A circuit layer 120 is formed on the insulating layer 110 , and the circuit layer 120 may include a circuit pattern 122 including a pad 121 . At this time, the pad 121 is used as an electrical signal transmission means by combining the pads of electronic components or other printed circuit boards, and is electrically connected to electronic components and the like through electrical connection means such as solder balls or bumps applied on the pad 121 . can be connected to In addition, the circuit pattern 122 may be formed according to a circuit patterning design of the printed circuit board, and may be formed continuously or discontinuously by maintaining a predetermined distance from the pad 121 .

The circuit layer 120 may be formed of a metal material such as gold (Au), silver (Ag) or copper (Cu). Preferably, a conductor layer mainly made of copper (Cu) is formed and the conductor layer is formed. The additive process may be formed by a semi-additive process, a subtractive process, or a tenting process using a dry film. In this case, a plating layer using nickel or gold may be further formed on the surface of the pad 121 used as an electrical connection means among the circuit layers 120 .

On the other hand, the circuit pattern 122 of the circuit layer 120 is covered on the insulating layer 110 , and the solder resist layer 130 is laminated so that a part of the pad 121 is exposed. The solder resist layer 130 constitutes the outermost layer of the printed circuit board 100 , and may be simultaneously laminated on the uppermost layer and the lowermost layer of the printed circuit board, and only the uppermost layer of the printed circuit board exposed to the outside is selective. can be stacked with

The solder resist layer 130 may have an opening area 131 through which a portion of the pad 121 is exposed. A solder ball or bump may be formed on the pad 121 exposed through the opening 131 , and the pad 121 is electrically connected to an electronic component or other printed circuit board through a solder ball or bump through the opening 131 . do.

The solder resist layer 133 covers the circuit pattern 122 formed on the insulating layer 110 to protect the circuit pattern 120 from the outside and prevent oxidation, and is formed on the pad 121 . It is possible to prevent overflow or movement of solder or the like through the side wall of the opening 131 .

In the printed circuit board 100 of this embodiment configured as described above, the solder resist layer 130 laminated on the insulating layer 110 is mainly cured by UV exposure. When the solder resist layer 130 is cured through exposure, In consideration of the exposure eccentricity, the opening 131 formed in the solder resist layer 130 may be formed to be smaller than the width of the pad 121 . In this case, one side of the opening wall of the opening 131 may be formed on the pad 121 and the other side may be formed outside the pad 121 due to eccentricity generated during curing of the solder resist layer 130 .

That is, the solder resist layer 130 is formed so that a part of the upper surface of the pad 121 is exposed, and when the center of the pad 121 and the center of the opening 131 do not coincide with each other, the pad 121 and the circuit pattern 122 are formed. Lifting of the solder resist layer 130 may occur due to poor exposure therebetween, and soldering is performed between the pad 121 and the circuit pattern 122 according to the design of the range of the interval between the pad 121 and the circuit pattern 122 . Lifting of the resist layer can be prevented.

More specifically, when the circuit pattern 122 is positioned adjacent to the pad 121 when the solder resist layer 130 is cured by UV exposure, the path of UV light used during exposure is blocked by the circuit pattern 122 . Since sufficient exposure is not performed between the pad 121 and the circuit pattern 122 , the solder resist layer 130 may float between the pad 121 and the circuit pattern 122 .

At this time, when the gap L between the pad 121 and the circuit pattern 122 covered by the solder resist layer 130 is formed in the range of 16.5 μm or less, even if the exposure eccentricity of the solder resist layer 130 occurs, the pad It is possible to prevent the solder resist layer 130 from floating between the 121 and the circuit pattern 122 .

For this reason, the structural characteristics for preventing the solder resist layer from floating and the reason for setting the interval will be described in more detail with reference to FIG. 2 as follows.

2 is a cross-sectional view during an exposure process when manufacturing a printed circuit board according to the present invention.

As shown, in the printed circuit board 100 of this embodiment, a circuit layer 120 including a pad 121 and a circuit pattern 122 is formed on an insulating layer 110 , and the circuit layer 120 is covered. A solder resist layer 130 is formed by applying a solder resist. The solder resist layer 130 is exposed by UV light irradiation, and the solder resist layer 130 in which the opening 131 is formed as shown in FIG. 1 is laminated by development after exposure.

At this time, when the circuit pattern 122 is not disposed at a position adjacent to the pad 121 formed on the insulating layer 110 as shown in FIG. 2A , the irradiation path of UV light is not disturbed during UV exposure and the solder resist layer 130 is formed. On the other hand, when the circuit pattern 122 is disposed on the insulating layer 110 at a position adjacent to the pad 121 on the insulating layer 110 as shown in FIG. 2B, UV exposure occurs during UV exposure. Since the light irradiation path is obstructed by the circuit pattern 122 , the light is not sufficiently irradiated to the edge of the solder resist layer 130 , so exposure failure may occur.

Accordingly, the portion where the poor exposure of the solder resist layer occurs may be raised on the insulating layer 110 when the cured solder resist layer is developed.

At this time, when the pad 121 and the circuit pattern 122 are designed so that the gap between the pad 121 and the circuit pattern 122 is 16.5 μm or less on the insulating layer 110 covered with the solder resist layer 130 , the pad 121 and the circuit pattern 122 are ) between the solder resist layer 130 can be prevented from floating.

As described above, a detailed manufacturing method for preventing the solder resist layer 130 from floating between the pad 121 and the circuit pattern 122 will be described with reference to the process cross-sectional view below.

First, FIGS. 3 to 9 are cross-sectional views of an embodiment of the method for manufacturing a printed circuit board of the present invention, and FIG. 3 is a cross-sectional view of a state in which a primary solder resist is applied to the outermost layer of a printed circuit board, and FIG. It is a cross-sectional view of a partially developed solder resist, FIG. 5 is a cross-sectional view during exposure of the primary solder resist, FIG. 6 is a cross-sectional view of a state in which the secondary solder resist is applied, and FIGS. 7 and 8 are the secondary solder resists It is a cross-sectional view during exposure and development.

First, as shown in FIG. 3 , a circuit layer 120 is formed on the insulating layer 110 , and a primary solder resist 130a is applied on the insulating layer 110 so that the circuit layer 120 is covered. At this time, the solder resist is a component formed on the outermost layer of the printed circuit board, and the drawing shows a state in which the outermost layer to which the solder resist is applied is mainly shown. Although not specifically shown on the drawing, the insulating layer 110 A plurality of circuit layers and insulating layers are alternately formed below.

Next, a part of the primary solder resist is developed as shown in FIG. 4 . That is, the development is made so that the height of the primary solder resist is equal to or lower than that of the circuit layer 120 . Accordingly, the surface or upper portion of the circuit layer 120 may be exposed to the upper portion of the primary solder resist 130a.

The development of the primary solder resist 130a can be performed by two methods. Only a part of the solder resist can be developed using a specific developing agent, and only a part of the solder resist can be developed by shortening the development time. can do.

The developing method using a specific developing agent is a method for slowing down the development speed compared to the general developing process and may be referred to as a flat plug developing method. Specifically, _{instead of Na 2} CO ₃ 1wt% aqueous solution mainly used as a developing agent Na ₂ using CO aqueous solution increased the _third content to 2wt%, 5wt%, 10wt%, or using a divalent cation such as Mg ^{2 +} which are capable of inhibiting the dissolution reaction of the solder resist while delaying the development speed of the solder resist uniform A developing surface can be made to appear.

In addition, in the case of shortening the development time, Na ₂ CO ₃ 1 wt% aqueous solution is used, but the development time is adjusted to about 1 minute to lower a part of the solder resist, that is, the overall height of the solder resist, so that the upper surface of the circuit layer 120 is It may be exposed to the upper side of the primary solder resist 130a.

Next, as shown in FIG. 5 , the primary solder resist 130a is exposed, and as shown in FIG. 6 , a secondary solder resist 130b is applied on the upper portion of the primary solder resist 130a. In this case, the thickness of the secondary solder resist is preferably applied to a thickness similar to that of the primary solder resist, and accordingly, the upper surface of the circuit layer 120 is covered with the secondary solder resist 130b.

After that, the secondary solder resist 130b is exposed as shown in FIG. 7 . At this time, the exposure of the secondary solder resist 130b is performed in the region except for the region A to which the pad 120 is to be exposed, and the secondary solder resist 130b is developed as shown in FIG. 8 , and thereafter The solder resist in which the opening 131 is formed may be cured to form the solder resist layer 130 .

In this case, in the solder resist layer 130 , a portion of the pad 121 constituting the circuit layer 120 and the circuit pattern 122 are covered, and a portion of the upper surface of the pad 121 may be exposed through the opening 131 . have. In addition, when the opening 131 of the solder resist layer 130 forms a step with the top surface of the pad 121 , the opening wall on one side is formed with a step with the top surface of the pad 121 , and the other side The opening wall of the pad 121 may be formed with a step difference outside the pad 121 .

Meanwhile, FIGS. 9 to 12 are cross-sectional views illustrating a method of manufacturing a printed circuit board according to the present invention. is a cross-sectional view during exposure of , FIG. 11 is a cross-sectional view of a partially developed solder resist opening, and FIG. 12 is a cross-sectional view of a solder resist layer having an opening formed by curing the solder resist.

As shown, in the printed circuit board of this embodiment, first, a circuit layer 120 is formed on the insulating layer 110 , and a solder resist 130a is formed on the insulating layer 110 so that the circuit layer 120 is covered. Apply. The manufacturing method of this embodiment also shows that the solder resist is a component formed on the outermost layer of the printed circuit board, and the drawing shows a state in which the solder resist is applied mainly on the outermost layer. Although not specifically shown on the drawing, the insulating layer A plurality of circuit layers and insulating layers are alternately formed under 110 .

Next, the solder resist is exposed as shown in FIG. 10 . In this case, exposure of the solder resist 130a is performed in a region except for the region A to which the pad 121 is to be exposed. In addition, the solder resist 130a is exposed to the bottom surface in contact with the insulating layer 110 , but the edge portion in contact with the pad 121 is not exposed. This is because, as described above, when the solder resist 130a is exposed, the UV light used for the exposure does not reach due to the circuit pattern 122 formed at the position adjacent to the pad 121 , so that the exposure cannot be performed.

Next, the solder resist is developed as shown in FIG. 11 . An opening 131 is formed in the solder resist 130a by development of the solder resist 130a. In this case, when the solder resist 130a is developed, the unexposed solder resist 131 of the opening 131 is not all developed so that the insulating layer 110 on one side of the pad 121 is exposed, but the opening is controlled by controlling the development speed. It is developed so that only the upper surface of the pad 121 in 131 is exposed.

That is, in the development of the solder resist 130a, only a part of the solder resist is developed using a specific developer, as described in the developing process of the first embodiment, or by using a common developer but by shortening the development time. Only some of them can be developed. Here, the detailed description of the developing condition is the same as the developing condition of the first embodiment, and thus the overlapping detailed description will be omitted.

Next, as shown in FIG. 12 , the solder resist in which the opening 131 is formed may be cured to form the solder resist layer 130 .

At this time, in the printed circuit board according to this embodiment, like the printed circuit board of the above-described embodiment, the solder resist layer 130 includes a part of the pad 121 and the circuit pattern 122 constituting the circuit layer 120 are covered. , a portion of the upper surface of the pad 121 may be exposed through the opening 131 . In addition, when the opening 131 of the solder resist layer 130 forms a step with the top surface of the pad 121 , the opening wall on one side is formed with a step with the top surface of the pad 121 , and the other side The opening wall of the pad 121 may be formed with a step difference outside the pad 121 .

Preferred embodiments of the present invention described above are disclosed for the purpose of illustration, and for those of ordinary skill in the art to which the present invention pertains, various substitutions, modifications and changes within the scope not departing from the technical spirit of the present invention This would be possible, but such substitutions, changes, etc. should be regarded as belonging to the following claims.

100. Printed Circuit Board
110. Insulation layer
120. Circuit layer
121. Pad
122. Circuit Pattern
130. Solder resist layer
131. Opening

Claims (18)

insulating layer;
a circuit layer formed on the insulating layer and including a pad and a circuit pattern formed with an interval of 16.5 μm or less from the pad; and
It is laminated on the insulating layer, and an opening through which a part of the pad is exposed is formed, so that one opening wall of the opening is located on the pad, the other opening wall is located outside the pad, and a bottom surface of the opening is located on the outside of the pad. a solder resist layer spaced apart from the insulating layer;
A printed circuit board comprising a.
According to claim 1,
A printed circuit board in which a plurality of circuit layers and an insulating layer are alternately stacked under the insulating layer, and the plurality of circuit layers are electrically connected through vias formed in the insulating layer.
According to claim 1,
The circuit pattern is a printed circuit board that is protected by being buried in a solder resist layer laminated on the insulating layer.
3. The method of claim 2,
The plurality of insulating layers is made of an insulating resin material impregnated with glass cloth or fabric cross, and an inorganic filler is impregnated into the insulating resin material.
According to claim 1,
The pad is a printed circuit board further formed with a plating layer using nickel or gold on the upper surface.
According to claim 1,
A printed circuit board having a width of an opening formed in the solder resist layer smaller than a width of the pad.
delete forming a circuit layer including a pad and a circuit pattern with an interval of 16.5 μm or less from the pad on the insulating layer;
applying a first solder resist on the insulating layer;
developing a portion of the primary solder resist to expose an upper surface of the circuit layer on the primary resist;
exposing the first solder resist;
applying a second solder resist on top of the first solder resist;
exposing a secondary solder resist except for an opening region on the pad;
developing the secondary solder resist to form an opening through which a portion of an upper surface of the pad is exposed; and
forming a solder resist layer by curing the first solder resist and the second solder resist;
includes,
A method of manufacturing a printed circuit board wherein the bottom surface of the opening forming region is spaced apart from the insulating layer.
9. The method of claim 8,
In the step of developing the first solder resist,
A method of manufacturing a printed circuit board for developing so that the height of the primary solder resist is lower than that of the circuit layer.
9. The method of claim 8,
In the step of applying the secondary solder resist,
The method of manufacturing a printed circuit board in which the secondary solder resist is applied to a thickness similar to that of the exposed primary solder resist.
9. The method of claim 8,
In the step of exposing the secondary solder resist,
The opening forming region is formed to be smaller than the width of the pad, and one side is positioned on the pad, and the other side is positioned outside the pad to expose the secondary solder resist outside the opening region. .
10. The method of claim 9,
In the step of developing the first solder resist,
The first solder resist, Na ₂ CO ₃ Method of manufacturing a printed circuit board is developed using an aqueous solution having a content of 2wt%, 5wt%, 10wt%.
13. The method of claim 12,
In the step of developing the first solder resist,
The first solder resist is Na ₂ CO _{3 A} method of manufacturing a printed circuit board that is developed using an aqueous solution containing more divalent cations of Mg ^{2 + in an aqueous solution.}
forming a circuit layer including a pad and a circuit pattern formed with an interval of 16.5 μm or less from the pad on the insulating layer;
applying a solder resist on the insulating layer;
exposing a solder resist except for an area for forming an opening on the pad;
developing the solder resist so that only a portion of the opening region is removed so that the upper surface of the pad is exposed and the bottom surface of the opening region is spaced apart from the insulating layer; and
curing the solder resist to form a solder resist layer;
A method of manufacturing a printed circuit board comprising a.
15. The method of claim 14,
The method of manufacturing a printed circuit board, wherein the opening forming region is formed to be smaller than a width of the pad, and exposing a solder resist outside the opening forming region so that one side is positioned on the pad and the other side is positioned outside the pad.
15. The method of claim 14,
In the step of developing the solder resist,
A method of manufacturing a printed circuit board, wherein a height of a solder resist in contact with a side surface of the pad exposed in the opening formation region is formed to be lower than that of the pad, thereby forming a step on a side surface of the solder resist.
17. The method of claim 16,
In the step of developing the solder resist,
The method of manufacturing a printed circuit board in which the solder resist in the opening region is _{developed using an aqueous solution having Na 2} CO ₃ content of 2 wt%, 5 wt%, and 10 wt%.
18. The method of claim 17,
The solder resist of the opening-forming area is, Na ₂ method for producing a printed circuit board 2 CO ₃ aqueous solution of Mg ^{+ 2} to be developed using an aqueous solution further containing a cation.

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