KR102254376B1 - Producing method of mask - Google Patents

Abstract

The present invention relates to a method of manufacturing a mask. The method of manufacturing a mask according to the present invention is a method of manufacturing the mask 100 by electroforming, comprising: (a) providing a conductive substrate 21, (b) using the conductive substrate 21 as a cathode body. Forming a plated film 100 on at least one surface of the conductive substrate 21 by using as a (Cathode Body) and electroforming, and (c) heat treating the plated film 100 (H) Including, in step (c), characterized in that the heat treatment (H) of the plating film 100 in a state in which at least a portion of the conductive substrate 21 is compressed (F) to flatten the conductive substrate (F). .

Description

Manufacturing method of mask {PRODUCING METHOD OF MASK}

The present invention relates to a method of manufacturing a mask. More specifically, it relates to a method of manufacturing a mask capable of preventing peeling, deformation, etc. of the mask when heat treatment is performed on a plated film produced by the electroplating method.

In recent years, research on an electroforming method in manufacturing a thin plate is being conducted. The electroplating method is a method of immersing an anode body and a cathode body in an electrolyte solution, and applying power to deposit a metal thin plate on the surface of the cathode body, so that an ultra-thin plate can be manufactured and mass production can be expected.

Meanwhile, as a technology for forming pixels in the OLED manufacturing process, a Fine Metal Mask (FMM) method is mainly used in which an organic material is deposited at a desired location by attaching a thin metal mask to a substrate.

1 is a schematic diagram showing a conventional FMM (Fine Metal Mask) manufacturing process.

Referring to FIG. 1, in the conventional mask manufacturing method using plating, a substrate 4 (FIG. 1A) is prepared, and a PR 2 having a predetermined pattern is coated on the substrate 4. [Fig. 1 (b)]. Subsequently, plating is performed on the substrate 4 to form a thin metal plate 3 [Fig. 1(c)]. Subsequently, the PR 2 is removed [Fig. 1(d)], and the mask 3 (or the thin metal plate 3) on which the pattern P is formed is separated from the substrate 4 to complete the manufacturing.

As shown in FIG. 1, the thin metal plate 3 produced by plating has a higher coefficient of thermal expansion than the thin metal plate produced by rolling. When a thin metal plate is used as an FMM, the lower the coefficient of thermal expansion is, the less the deformation of the pattern due to heat is reduced, so that a pixel process of high quality can be performed. Therefore, by performing the heat treatment (H) on the thin metal plate 3 produced by plating, it is possible to lower the coefficient of thermal expansion. However, when the heat treatment (H) is performed as shown in (e) of FIG. 1, the thin metal plate 3 on the substrate 4 is peeled (3'). Even peeling (3') torn, finely broken, folded or wrinkled, the shape of the pattern (P') becomes unclear, and there is a problem that it cannot be used as a product.

In the ultra-high-definition OLED manufacturing process, even a minute alignment error of several µm can lead to pixel deposition failure.Therefore, it is necessary to manufacture an FMM with a low coefficient of thermal expansion to prevent deformation due to heat in the pixel deposition process. to be.

In addition, there is a problem in that the thin metal plate 3 is not plated only on the upper surface of the desired substrate 4, and the thin metal plate 3 is plated with a non-uniform thickness on the side and rear surfaces of the substrate 4.

Accordingly, the present invention has been devised to solve the problems of the prior art as described above, and it is possible to manufacture a mask having a low coefficient of thermal expansion through heat treatment, and to prevent peeling and deformation of the mask during the heat treatment process. It is an object of the present invention to provide a method for manufacturing a mask.

The above object of the present invention is a method of manufacturing a mask by electroforming, comprising the steps of: (a) providing a conductive substrate; (b) using a conductive substrate as a cathode body and forming a plated film on at least one surface of the conductive substrate by electroforming; And (c) heat-treating the plated film, and in step (c), at least a portion of the conductive substrate is compressed to heat-treat the plated film while the conductive substrate is flattened.

In step (b), a plating film may be formed on the upper surface, the side surface, and at least a portion of the lower surface of the mother plate.

The plated film may be heat-treated by compressing the edge region of the conductive substrate.

Heat treatment can be performed at 300 ℃ to 800 ℃.

(d) It may further include the step of separating the plating film from the conductive substrate.

Between steps (c) and (d), it may further include cutting the edge region of the plating film.

(e) forming a mask pattern on the plated layer may be further included.

In step (a), a patterned insulating portion may be formed on one surface of the conductive substrate, and in step (b), a plating film may be formed on at least one surface of the conductive substrate excluding the portion in which the insulating portion is formed.

The conductive substrate may be a doped single crystal silicon material.

The insulating portion may be made of any one of photoresist, silicon oxide, and silicon nitride.

The insulating portion may have a tapered shape or an inverted tapered shape.

The plating film may be made of Invar or Super Invar.

According to the present invention configured as described above, there is an effect of accurately forming a plated film on a desired portion with a uniform thickness.

In addition, according to the present invention, a mask having a low coefficient of thermal expansion can be manufactured through heat treatment, and there is an effect of preventing peeling of the mask and preventing deformation of the mask pattern during the heat treatment process.

1 is a schematic diagram showing a conventional FMM (Fine Metal Mask) manufacturing process.
2 is a schematic diagram showing an OLED pixel deposition apparatus using a frame-integrated mask according to an embodiment of the present invention.
3 is a schematic diagram showing an electroplating apparatus according to an embodiment of the present invention.
4 is a schematic diagram showing a mask according to an embodiment of the present invention.
5 is a schematic diagram showing deformation of a conductive substrate in a process of heat treatment of a plated film.
6 is a schematic diagram showing a heat treatment process of a plated film according to an embodiment of the present invention.
7 is a schematic diagram showing a heat treatment process of a plated film according to another embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The detailed description of the present invention described below refers to the accompanying drawings, which illustrate specific embodiments in which the present invention may be practiced. These embodiments are described in detail sufficient to enable a person skilled in the art to practice the present invention. It should be understood that the various embodiments of the present invention are different from each other, but need not be mutually exclusive. For example, specific shapes, structures, and characteristics described herein may be implemented in other embodiments without departing from the spirit and scope of the present invention in relation to one embodiment. In addition, it should be understood that the location or arrangement of individual components within each disclosed embodiment may be changed without departing from the spirit and scope of the present invention. Accordingly, the detailed description to be described below is not intended to be taken in a limiting sense, and the scope of the present invention, if appropriately described, is limited only by the appended claims, along with all ranges equivalent to those claimed by the claims. In the drawings, similar reference numerals refer to the same or similar functions over various aspects, and the length, area, thickness, and the like may be exaggerated and expressed for convenience.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings in order to enable those of ordinary skill in the art to easily implement the present invention.

2 is a schematic diagram illustrating an OLED pixel deposition apparatus 1000 using the frame-integrated masks 100 and 200 according to an exemplary embodiment of the present invention.

Referring to FIG. 2, the OLED pixel deposition apparatus 1000 includes a magnet plate 300 in which a magnet 310 is accommodated and a cooling water line 350 is disposed, and an organic material source 600 from a lower portion of the magnet plate 300. It includes a deposition source supply unit 500 to supply ).

A target substrate 900 such as glass on which the organic material source 600 is deposited may be interposed between the magnet plate 300 and the source deposition unit 500. The frame-integrated masks 100 and 200 (or the FMM 100) for allowing the organic material source 600 to be deposited for each pixel may be disposed on the target substrate 900 so as to be in close contact or very close to each other. The magnet 310 generates a magnetic field, and the frame-integrated masks 100 and 200 (or the FMM 100) may be in close contact with the target substrate 900 by the attraction of the magnetic field.

For example, the mask 100 needs to be aligned before it is in close contact with the target substrate 900. One mask or a plurality of masks may be coupled to the frame 200. The frame-integrated masks 100 and 200 may be fixedly installed in the OLED pixel deposition apparatus 1000. In the present invention, it is assumed that a plurality of masks 100 having one cell C are used in combination with the frame 200.

The deposition source supply unit 500 may reciprocate the left and right path to supply the organic material source 600, and the organic material sources 600 supplied from the deposition source supply unit 500 pass through the pattern P formed on the FMM mask 100. Thus, it may be deposited on one side of the target substrate 900. The deposited organic material source 600 passing through the pattern of the FMM mask 100 may function as the pixel 700 of the OLED.

In order to prevent non-uniform deposition of the pixel 700 due to the shadow effect, the pattern P of the FMM mask 100 may be formed to be inclined (S) (or formed in a tapered shape (S)). . Since the organic material sources 600 passing through the pattern P in a diagonal direction along the inclined surface may also contribute to the formation of the pixel 700, the pixel 700 may be deposited with a uniform thickness as a whole.

3 is a schematic view showing an electroplating apparatus 10 according to an embodiment of the present invention. 3 shows a flat electroplating device 10, but the present invention is not limited to the form shown in FIG. Put it.

Referring to FIG. 3, the electroplating apparatus 10 according to an embodiment of the present invention includes a plating bath 11, a cathode body 20, an anode body 30, and a power supply unit 40. ). In addition, a means for moving the cathode body 20, a means for separating the plated film 100 (or thin metal plate 100) to be used as the mask 100 from the cathode body 20, and a means for cutting And the like (not shown) may further be included.

The plating liquid 12 is accommodated in the plating bath 11. The plating solution 12 is an electrolytic solution, and may be a material of the plating film 100 to be used as the mask 100. In an embodiment, when an Invar thin plate, which is an iron nickel alloy, is manufactured as the plating film 100, a mixture of a solution containing Ni ions and a solution containing Fe ions may be used as the plating solution 12. In another embodiment, in the case of manufacturing a super Invar thin plate, which is an iron nickel cobalt alloy, as the plating film 100, as an example, a solution containing Ni ions, a solution containing Fe ions, and a Co ions. A mixed solution of the solution may be used as the plating solution 12. In addition, the plating solution 12 for the desired plating film 100 may be used without limitation. In this specification, manufacturing of the Invar thin plate 100 (or Invar mask 100) is assumed as a main example.

The plating solution 12 may be supplied to the plating bath 11 from an external plating solution supply means (not shown), and in the plating bath 11, a circulation pump (not shown) for circulating the plating solution 12, and the plating solution 12 A filter (not shown) for removing impurities of) may be further provided.

The cathode body 20 has a flat plate shape, etc. on one side thereof, and a part or all of the cathode body 20 may be immersed in the plating solution 12. 3 shows a form in which the cathode body 20 and the anode body 30 are arranged vertically, but may be arranged horizontally. In this case, at least part or all of the cathode body 20 in the plating solution 12 Can be immersed.

The positive electrode body 30 is installed at a predetermined interval to face the negative electrode body 20, has a flat plate shape, etc. on one side corresponding to the negative electrode body 20, and the entire anode body 30 in the plating solution 12 is Can be immersed. The anode body 30 may be made of an insoluble material such as titanium (Ti), iridium (Ir), ruthenium (Ru), or the like. The cathode body 20 and the anode body 30 may be spaced apart from each other by several centimeters.

The power supply unit 40 may supply current required for electroplating to the cathode body 20 and the anode body 30. The (-) terminal of the power supply unit 40 may be connected to the negative electrode body 20, and the (+) terminal may be connected to the positive electrode body 30.

4 is a schematic diagram showing a mask 100 (100a, 100b) according to an embodiment of the present invention.

A plurality of mask patterns P may be formed on each mask 100. In FIG. 4, a stick-type mask 100a and a plate-type mask 100b including a plurality of cells C are shown, but the mask 100 of the present invention includes one cell ( It is preferable to include C), or a few cells (C). 4C is a side cross-sectional view of the mask 100.

One mask cell C may correspond to one display such as a smartphone. When the cell C is enlarged, a plurality of mask patterns P (or pixel patterns P) corresponding to R, G, and B can be identified. The mask patterns P may have an inclined side portion and a tapered shape. A number of mask patterns P may be clustered to form one cell C (or display pattern).

In order to form a thin thickness, the mask 100 may be formed by electroforming. Mask 100 may be a coefficient of thermal expansion of about 1.0 X 10 ^-6 / ℃ of invar (invar), about 1.0 X 10 ^-7 / ℃ Super Invar (super invar) material. Since the mask 100 made of this material has a very low coefficient of thermal expansion, it is less likely to change the shape of the mask pattern (P) by thermal energy, so it can be used as a FMM (Fine Metal Mask) and a shadow mask in high-resolution OLED manufacturing. I can. In addition, considering the recent development of technologies for performing the pixel deposition process in a range where the temperature change value is not large, the mask 100 is made of nickel (Ni) and nickel-cobalt (Ni-Co) having a slightly larger coefficient of thermal expansion than this. ), etc. The width of the mask pattern P may be less than 40 μm, and the thickness of the mask 100 may be about 2 to 50 μm.

5 is a schematic diagram showing the deformation of the conductive substrate 21 in the process of heat-treating (H) the plated film 100.

Referring to FIG. 5A, the conductive substrate 21 is used as a cathode body (or mother plate), and a plated film 100: 110, 120, 130 by electroplating on the surface of the cathode body Can be formed. The plating film 100 may be formed only on the upper surface 110 of the conductive substrate 21, but may be formed on the side surface 120 and the lower surface 130 in order to increase adhesion.

In addition, before separating the plating film 100 (or the mask 100) from the conductive substrate 21, a heat treatment (H) may be performed. In the present invention, heat treatment (H) may be performed before separation from the conductive substrate 21 in order to reduce the thermal expansion coefficient of the mask 100 and prevent deformation of the mask 100 and the mask pattern P by heat. . The heat treatment may be performed at a temperature of 300°C to 800°C.

In general, compared to the Invar sheet produced by rolling, the Invar sheet produced by electroplating has a higher coefficient of thermal expansion. Thus, by performing heat treatment on the Invar thin plate, the coefficient of thermal expansion can be lowered.

However, as shown in (b) of FIG. 5, a case in which the conductive substrate 21 is bent (21->21') without maintaining a flat state occurs during the high-temperature heat treatment (H) process. As shown in (b) of FIG. 5, when the conductive substrate 21' is bent, a void V is created between the plated film 100 and the surface of the conductive substrate 21', so that the plated film 100 is peeled off. Or, there is a problem in that deformation such as wrinkles occurs. Alternatively, as the conductive substrate 21 ′ is bent in the middle of the heat treatment (H) process and the plating film 100 is peeled or deformed, there is a problem in that uniform heat treatment (H) does not proceed to the plated film 100.

Therefore, the present invention maintains the conductive substrate 21 in a flat state during the heat treatment (H) process so that the plated film 100 bonded on the conductive substrate 21 is not deformed and can be stably heat treated (H). It is characterized by that.

6 is a schematic diagram showing a heat treatment process of the plated film 100 according to an embodiment of the present invention.

Referring to FIG. 6A, the present invention uses the conductive substrate 21 as a cathode body (or mother plate), and when forming a plated film by electroplating on the surface of the cathode body, the conductive substrate Plating films 100 (110, 120, 130) may be formed on all of the upper and side surfaces of (21) and at least a portion of the lower surface.

As described above with reference to FIG. 1, since the thin metal plate 3 is formed only on the upper surface of the substrate 4 in the conventional plating process, the thin metal plate 3 is peeled off when the heat treatment (H) is performed ( 3') can be. In order to prevent this, the present invention forms a plated film 110 on the upper surface of the conductive substrate 21, and additionally forms a plated film 120 and 130 on the side and lower surfaces of the conductive substrate 21 to be plated. It can be made to be integral with the film 110. It may be difficult to withstand the stress applied in the heat treatment (H) process only by the adhesive force between the conductive substrate 21 and the upper plating layer 110. Therefore, as the plated films 120 and 130 on the side and bottom surfaces reinforce the adhesion with the conductive substrate 21 on the side and lower surfaces of the conductive substrate 21, the entire plated film 100 in the heat treatment (H) process There is an advantage in that it is not peeled off and can be fixedly adhered to the conductive substrate 21.

The conductive substrate 21 may be a conductive material. As a conductive material, in the case of metal, metal oxides may be generated on the surface, impurities may be introduced during the metal manufacturing process, in the case of a polycrystalline silicon substrate, inclusions or grain boundaries may exist, and conductive polymers In the case of the substrate, it is highly likely to contain impurities, and the strength. Acid resistance may be weak. An element that prevents uniform formation of an electric field on the surface of the substrate 21, such as metal oxide, impurities, inclusions, grain boundaries, and the like, is referred to as “defect”. Due to defects, a uniform electric field may not be applied to the cathode body made of the above-described material, so that a part of the plating film 100 may be formed unevenly.

In implementing ultra-high definition pixels of the UHD level or higher, non-uniformity of the mask metal layer and the mask metal layer pattern (mask pattern P) may adversely affect the formation of the pixel. For example, in the case of current QHD quality, the size of the pixel reaches about 30-50㎛ at 500~600 PPI (pixel per inch), and in the case of 4K UHD and 8K UHD high quality, ~860 PPI, ~1600 PPI, which is higher. It has the same resolution. Micro-displays directly applied to VR devices, or micro-displays inserted into VR devices, aim for ultra-high quality of about 2,000 PPI or higher, and the size of pixels reaches about 5 to 10 μm. The pattern width of the FMM and shadow mask applied to this can be formed in a size of several to several tens of µm, preferably smaller than 30 µm, so that even defects of several µm can occupy a large proportion of the pattern size of the mask. to be. In addition, in order to remove the defects in the cathode material of the above-described material, an additional process for removing metal oxide, impurities, etc. may be performed, and in this process, another defect such as etching of the cathode material may be caused. have.

Accordingly, in the present invention, the substrate 21 (or a cathode body) made of a single crystal material can be used. In particular, it is preferably made of single crystal silicon. In order to have conductivity, a ^{high-concentration doping of 10 19} /cm ³ or more may be performed on the mother plate made of single crystal silicon. Doping may be performed on the entire parent plate, or may be performed only on the surface portion of the parent plate. For example, the substrate 21 made of a single crystal material may be a silicon wafer.

Meanwhile, as a single crystal material, metals such as Ti, Cu, and Ag, semiconductors such as GaN, SiC, GaAs, GaP, AlN, InN, InP, Ge, and carbon-based materials such as graphite and graphene _{, CH 3 NH 3 PbCl 3,} CH 3 NH 3 PbBr 3, CH 3 NH 3 PbI 3, SrTiO 3 , etc. page containing the perovskite (perovskite) superconductor single crystalline ceramic, aircraft single crystal second heat-resistant alloy for components for such structures Etc. can be used. Metal and carbon-based materials are basically conductive materials. In the case of a semiconductor material, ^{doping with a high concentration of 10 19} or more may be performed to have conductivity. In the case of other materials, doping may be performed or oxygen vacancy may be formed to form conductivity. Doping may be performed on the entire parent plate, or may be performed only on the surface portion of the parent plate.

Since there are no defects in the case of a single crystal material, there is an advantage in that a uniform plating film 100 can be generated due to the formation of a uniform electric field over the entire surface during electroplating. The frame-integrated masks 100 and 200 manufactured through a uniform mask metal film can further improve the image quality of OLED pixels. In addition, since there is no need to perform an additional process for removing and eliminating defects, there is an advantage in that process cost is reduced and productivity is improved.

In addition, the side and bottom surfaces of the substrate 21 made of single crystal silicon have a uniform surface state without inclusions or grain boundaries, similar to the top surface, so the plating films 100: 110, 120, 130 formed on the side, bottom, and top surfaces There is an advantage of being able to better adhere to the substrate 21 without this surface defect. Due to the improved adhesion, peeling and deformation during the heat treatment (H) process can be further prevented.

In addition, as the substrate 21 made of silicon is used, there is an advantage in that the insulating portion 25 can be formed only by oxidizing and nitriding the surface of the substrate 21 as needed. The insulating part 25 serves to prevent electrodeposition of the plating film 100 and may form a pattern P of the plating film 100.

Next, referring to FIG. 6B, at least a portion of the conductive substrate 21 may be compressed (F) to flatten the conductive substrate 21. Since bending (21->21') may occur in the conductive substrate 21 due to heat in the heat treatment (H) process to be described later, the occurrence of bending in the conductive substrate 21 is prevented by physically applying force.

It is possible to prevent the occurrence of warpage by pressing (F) both sides of the conductive substrate 21. A known crimping means 80 can be used without limitation, and in particular, when a wafer is used as the conductive substrate 21, a crimping means 80 used in a semiconductor process may be employed.

The pressing means 80 may press (F) the edge region of the conductive substrate 21. Damage such as scratches to the edge area of the plating layer 100 by pressing (F) the edge area of the conductive substrate 21, that is, the edge area 115, 120, and 130 of the plating layer 100 (excluding 111) Even if this occurs, the quality of the mask 100 is not affected. These border area portions 115, 120, and 130 are portions to be cut and removed later, and the portion of the plating film 100 used as the mask 100 corresponds to the inner area 111 than the border, so that it is compressed. It is preferable to press (F) the edge region of the conductive substrate 21 with the means 80. However, the present invention is not limited thereto, and as long as it is within a range that does not adversely affect the plating film 100, the pressing means 80 may press (F) at least a part or the entire area of the conductive substrate 21.

Next, referring to FIG. 6C, a heat treatment (H) may be performed on the plating film 100 (or the mask 100). Since the conductive substrate 21 is compressed (F) by the pressing means 80 to maintain a flat state, deformation does not occur in the conductive substrate 21 during the heat treatment (H) process, and is in close contact with the plating film 100. It can keep in contact. In addition, since the plated film 100 is formed not only on the upper surface of the conductive substrate 21 but also on the side and lower surfaces, there is an advantage in that the coefficient of thermal expansion is lowered through the heat treatment (H) while maintaining a tighter contact state.

7 is a schematic diagram showing a heat treatment process of the plated film 100 ′ according to another embodiment of the present invention. In FIG. 7, only differences from FIG. 6 will be described.

Referring to Figure 7 (a), the present invention uses the conductive substrate 21 on which the insulating part 25 is formed as a cathode body (or a mother plate), and electroplating on the surface of the cathode body When forming the plated film, it is characterized in that the plated film 100': 110, 120, 130 is formed on all of the upper and side surfaces of the conductive substrate 21, and at least a part of the lower surface. In other words, the plating film 110 is formed by electroplating on the surface where the conductive substrate 21 is exposed, excluding the portion where the insulating part 25 is formed on the upper surface of the conductive substrate 21, and at the same time, the conductive substrate 21 ), it is characterized in that the plating films 120 and 130 are formed by electroplating on the side and the lower surface.

The insulating part 25 may be formed of any one of photoresist, silicon oxide, and silicon nitride. The insulating part 25 may form a photoresist using a printing method or the like. Alternatively, the insulating part 25 may form silicon oxide or silicon nitride by a method such as vapor deposition on the substrate 21, and oxidation (Thermal Oxidation) and thermal nitridation (Thermal Nitiridation) based on the substrate 21 You can also use the method. The insulating part 25 may have a thickness of about 5 μm to 20 μm to be thicker than the plating layer 100 ′.

It is preferable that the insulating portion 25 has a tapered shape or an inverted tapered shape. When forming a tapered or inverted tapered pattern using a photoresist, a multiple exposure method, a method of varying exposure intensity for each region, or the like may be used.

In the electroplating process, the formation of the plating film 100 ′ is prevented in the area where the insulating part 25 having the reverse taper shape is disposed, and plating on at least a portion of the exposed upper, side, and lower surfaces of the conductive substrate 21 Films 100': 110, 120, 130 may be formed.

Next, referring to FIG. 7B, when the insulating portion 25 is removed, a portion of the space 26 occupied by the insulating portion 25 may become the mask pattern P.

Next, referring to (c) of FIG. 7, at least a portion of the conductive substrate 21 may be compressed (F) to flatten the conductive substrate 21. It is possible to use a crimping means 80 for crimping (F). Since it is the same as step (b) of FIG. 6, a detailed description is omitted.

Next, referring to (d) of FIG. 7, before separating the plating film 100 ′ from the conductive substrate 21, a heat treatment (H) may be performed. Since the conductive substrate 21 is compressed (F) by the pressing means 80 to maintain a flat state, deformation does not occur in the conductive substrate 21 during the heat treatment (H) process, and is in close contact with the plating film 100. It can keep in contact.

In the embodiment of FIG. 7, since heat treatment is performed in a state in which the conductive substrate 21 and the plating film 100 ′ on which the mask pattern P is formed are closely adhered, the mask pattern formed in the space occupied by the insulating part 25 ( There is an advantage in that the shape of P) is kept constant, and peeling and deformation due to heat treatment (H) can be prevented.

After the heat treatment (H) of the plated film 100 is completed, an edge region of the plated film 100 may be cut to separate the plated film 100 from the conductive substrate 21. For cutting, cutting means such as a knife or a laser may be used without limitation, and an etching process may be performed. After cutting, the plating film 100 may be adhered to the conductive substrate 21 in a state separated into the inner region 111 and the edge regions 115, 120, and 130. Subsequently, after cutting, only the portion of the plated film 111 can be separated and used as a mask.

Meanwhile, after the plating layer 100 is manufactured or after cutting, only a portion of the plating layer 111 is separated, and then an etching process is performed to form the mask pattern P, which may be used as a mask.

As described above, the present invention can manufacture the mask 100 having a low coefficient of thermal expansion (CTE) through heat treatment (H), while preventing deformation of the conductive substrate 21 in the heat treatment (H) process, plating By maintaining intimate contact with the film 100, there is an effect of preventing peeling of the plated film 100 and preventing deformation of the mask pattern P.

Although the present invention has been illustrated and described with reference to a preferred embodiment as described above, it is not limited to the above embodiment, and within the scope not departing from the spirit of the present invention, various It can be transformed and changed. Such modifications and variations should be viewed as falling within the scope of the present invention and the appended claims.

10: electroplating device
21: conductive substrate
25: insulation
80: crimping means
100: mask, plated film
200: frame
1000: 200: OLED pixel deposition apparatus
C: cell
F: Pressing the conductive substrate
P: mask pattern, pixel pattern
V: void

Claims (12)

As a method of manufacturing a mask by electroforming,
(a) preparing a conductive substrate;
(b) using a conductive substrate as a cathode body, and forming a plating film on a portion of the upper surface, the side surface, and at least the lower surface of the conductive substrate by electroforming; And
(c) heat-treating the plated film
Including,
In step (b), an upper surface, a side surface, and at least a portion of the lower surface of the conductive substrate are integrally connected to form a plating film to increase the adhesion area between the conductive substrate and the plating film
In step (c), at least a portion of the conductive substrate is compressed to heat-treat the plated film while the conductive substrate is flattened. delete The method of claim 1,
A method of manufacturing a mask in which a plated film is heat-treated by compressing an edge region of a conductive substrate. delete The method of claim 1,
(d) separating the plating film from the conductive substrate
The method of manufacturing a mask further comprising a. The method of claim 5,
Between (c) and (d) steps, further comprising the step of cutting the edge region of the plated film, the manufacturing method of the mask. The method of claim 6,
(e) forming a mask pattern on the plated film
The method of manufacturing a mask further comprising a. The method of claim 1,
In step (a), forming a patterned insulating portion on one side of the conductive substrate,
In step (b), a plating film is formed on at least one surface of the conductive substrate excluding the portion in which the insulating portion is formed, a method of manufacturing a mask. The method of claim 1,
The conductive substrate is a doped single crystal silicon material, a method of manufacturing a mask. delete delete delete

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