KR102204871B1 - Liquid crystal display panel and method of manufacturing the same - Google Patents

Abstract

The present invention provides a liquid crystal display panel including a lower substrate and a column spacer formed between the lower substrate and an upper substrate opposite to the lower substrate, and including alignment layers formed on the lower substrate and the upper substrate so that a region in which the column spacer is formed is opened. To provide is a technical problem.
In the liquid crystal display panel according to the present invention, a lower substrate, an upper substrate facing the lower substrate and having a black matrix and a column spacer formed thereon, is formed on the lower substrate, and a first region facing the column spacer is opened. A first alignment layer formed on the upper substrate, a second alignment layer in which a second region in which the column spacer is formed is open, and a liquid crystal layer provided between the first alignment layer and the second alignment layer.
According to the present invention, since the alignment layers are formed on the lower substrate and the upper substrate so that the region in which the column spacer is formed is opened, a light leakage defect occurring in the liquid crystal display panel can be prevented.

Description

Liquid crystal display panel and its manufacturing method {LIQUID CRYSTAL DISPLAY PANEL AND METHOD OF MANUFACTURING THE SAME}

The present invention relates to a display panel, and more particularly, to a liquid crystal display panel in which a region in which a column spacer is formed is opened and an alignment layer is selectively patterned, and a method of manufacturing the same.

As the era develops into an information society, the importance of a flat panel display device (FPD) having excellent characteristics such as thinner, lighter, and low power consumption is increasing. Flat panel displays include a liquid crystal display device (LCD), a plasma display panel device (PDP), an organic light emitting display device (OLED), and the like, and an electrophoretic display device. (EPD: Electrophoretic Display Device) is also widely used.

Among them, a liquid crystal display device including a thin film transistor is widely commercialized as a display device for a television, a notebook computer, a tablet computer, or a desktop computer because it is excellent in resolution, color display, and image quality.

1 is a cross-sectional view showing the structure of a conventional general liquid crystal display panel.

As shown in FIG. 1, a conventional general liquid crystal display panel 10 includes a lower substrate 11 in which a pixel is formed at each intersection area of gate lines (not shown) and data lines (not shown), and the Alignment layers 15a, 15b facing the lower substrate 11 and covering the upper substrate 12 on which the column spacer 13 is formed, the upper surface of the lower substrate 11 and the lower surface of the upper substrate 12, and the It includes a liquid crystal layer 14 formed between the lower substrate 11 and the upper substrate 12. Among the alignment layers 15a and 15b, a lower alignment layer 15a is formed to cover the lower substrate 11. In addition, among the alignment layers 15a and 15b, the upper alignment layer 15b is formed to cover the entire lower surface of the upper substrate 12 including the column spacer 13.

In the conventional liquid crystal display panel 10 as described above, when pressure is applied from the outside (for example, when the panel is pressed or the panel is bent), the column spacer 13 is Pressing or moving may occur.

As the column spacer 13 moves, the alignment layers 15a and 15b covering the column spacer 13 are damaged.

In addition, as the alignment layers 15a and 15b are damaged, the alignment force of the alignment layers 15a and 15b decreases, and a light leakage defect may occur in which light is emitted to the damaged portion of the alignment layers 15a and 15b. have.

In addition, as the alignment layers 15a and 15b are damaged, foreign matters may come off from the alignment layers 15a and 15b into the liquid crystal layer 14 of the display panel, and light leakage defects may occur due to the foreign matters. I can.

In addition, as the column spacer 13 moves, an alignment material used as an alignment layer may be concentrated in a contact hole portion in which the thin film transistor formed on the lower substrate and the pixel electrode are connected.

The present invention has been proposed in order to solve the above-described problem, and an object of the present invention is to provide a liquid crystal display panel including alignment layers formed on a lower substrate and an upper substrate so that a region in which a column spacer is formed is opened.

In the liquid crystal display panel according to the present invention, a lower substrate, an upper substrate facing the lower substrate and having a black matrix and a column spacer formed thereon, is formed on the lower substrate, and a first region facing the column spacer is opened. A first alignment layer formed on the upper substrate, a second alignment layer in which a second region in which the column spacer is formed is open, and a liquid crystal layer provided between the first alignment layer and the second alignment layer.

In addition, in the liquid crystal display panel according to the present invention, forming a switching element on a lower substrate, forming a column spacer on an upper substrate, and opening a first region facing the column spacer are provided on the lower substrate. Forming a first alignment layer, forming a second alignment layer on the upper substrate so that the second region in which the column spacer is formed is opened, and bonding the lower substrate and the upper substrate with a liquid crystal layer therebetween. Include.

According to the present invention, by forming alignment layers on the lower substrate and the upper substrate so that the area in which the column spacer is formed is opened, damage to the alignment layers covering the column spacer can be prevented according to the movement of the column spacer. By preventing damage to the alignment layers, it is possible to prevent a decrease in the alignment force of the alignment layers.

In addition, a phenomenon in which foreign substances generated from the alignment layers flow into the liquid crystal layer may be prevented. By preventing damage to the alignment layer and inflow of foreign substances into the liquid crystal layer, defects in light leakage occurring in the liquid crystal display panel may be prevented.

In addition, concentration of an alignment material used as an alignment layer can be prevented in a portion of the contact hole where the thin film transistor and the pixel electrode are connected.

1 is a cross-sectional view showing the structure of a conventional general liquid crystal display panel.
2 is an exemplary view schematically showing a configuration of a display device to which a liquid crystal display panel according to the present invention is applied.
3 is a cross-sectional view showing the structure of a liquid crystal display panel according to the present invention.
4A to 4C are exemplary views for explaining a method of manufacturing a display panel according to the present invention.
5A to 5D are exemplary views illustrating a method of manufacturing an alignment layer applied to a display panel according to the present invention.

Advantages and features of the present invention, and a method of achieving them will become apparent with reference to the embodiments described below in detail together with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various forms different from each other, and only these embodiments make the disclosure of the present invention complete, and common knowledge in the technical field to which the present invention pertains. It is provided to completely inform the scope of the invention to those who have it, and the invention is only defined by the scope of the claims.

The shapes, sizes, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present invention are exemplary, and the present invention is not limited to the illustrated matters. The same reference numerals refer to the same components throughout the specification. In addition, in describing the present invention, when it is determined that a detailed description of related known technologies may unnecessarily obscure the subject matter of the present invention, the detailed description thereof will be omitted.

When'include','have','consists of' and the like mentioned in the present specification are used, other parts may be added unless'only' is used. In the case of expressing the constituent elements in the singular, it includes the case of including the plural unless specifically stated otherwise.

In interpreting the constituent elements, it is interpreted as including an error range even if there is no explicit description.

In the case of a description of the positional relationship, for example, if the positional relationship of two parts is described as'upper','upper of','lower of','next to','right' Or, unless'direct' is used, one or more other parts may be located between the two parts.

In the case of a description of a temporal relationship, for example, when a temporal predecessor relationship is described as'after','following','after','before', etc.,'right' or'direct' It may also include cases that are not continuous unless this is used.

First, second, etc. are used to describe various elements, but these elements are not limited by these terms. These terms are only used to distinguish one component from another component. Accordingly, the first component mentioned below may be a second component within the technical idea of the present invention.

Each of the features of the various embodiments of the present invention can be partially or entirely combined or combined with each other, technically various interlocking and driving are possible, and each of the embodiments can be implemented independently of each other or can be implemented together in a related relationship. May be.

Hereinafter, the present invention will be described in detail with reference to the accompanying drawings.

2 is an exemplary view schematically showing a configuration of a display device to which a liquid crystal display panel according to the present invention is applied.

In the display device to which the liquid crystal display panel according to the present invention is applied, as shown in FIG. 2, a pixel P 110 is provided at each intersection area between the gate lines GL1 to GLg and the data lines DL1 to DLd. A gate driver 200 for sequentially supplying scan pulses to the panel 100 formed on the panel 100, the gate lines GL1 to GLg formed on the panel 100, and formed on the panel 100 A data driver 300 for supplying a data voltage to the data lines DL1 to DLd and a timing controller 400 for controlling functions of the gate driver 200 and the data driver 300 .

First, on a lower substrate (not shown) of the panel 100, a plurality of data lines DL1 to DLd, a plurality of gate lines GL1 to GLg crossing the data lines DL1 to DLd, Oxide Thin Film Transistors formed on the pixels P 110 formed at each intersection of the data lines DL1 to DLd and the gate lines GL1 to GLg, and the pixel P )(110), pixel electrodes for charging a data voltage to each of the pixels, and common electrodes for driving a liquid crystal charged in the pixel together with the pixel electrodes are formed. The pixels are arranged in a matrix form by an intersection structure between the data lines DL1 to DLd and the gate lines GL1 to GLg.

A black matrix (BM) and a color filter are formed on an upper substrate (not shown) of the panel 100.

A polarizing plate is attached to each of the upper and lower substrates of the panel 100, and an alignment layer for setting the pretilt angle of the liquid crystal is formed on an inner surface in contact with the liquid crystal. A column spacer (CS) for maintaining a cell gap may be formed between the upper glass substrate and the lower glass substrate of the panel 100. The panel 100 will be described in detail below with reference to FIGS. 3 to 5.

Second, the panel driver 200, 300, 400, as shown in FIG. 2, a data driver for supplying a data voltage to the data lines DL1 to DLd formed in the panel 100 ( 300), a gate driver 200 and the data driver 300 for sequentially supplying the scan pulses to the gate lines GL1 to GLg formed on the panel 100 while the data voltage is being output And a timing controller 400 for controlling the gate driver 200.

The timing controller 400 receives timing signals such as a data enable signal (Data Enable, DE) and a dot clock (CLK) from an external system, and the operation timing of the data driver 300 and the gate driver 200 It generates control signals (GCS, DCS) to control.

The data driver 300 converts the image data input from the timing controller 400 into the data voltage, and converts the data voltage for one horizontal line into the data voltage for every horizontal period in which a scan pulse is supplied to the gate line. Supply to the lines.

The gate driver 200 shifts a gate start pulse (GSP) transmitted from the timing controller 400 according to a gate shift clock (GSC), and sequentially shifts the gate lines GL1 A scan pulse having a gate-on voltage (Von) is supplied to ~GLg). In addition, the gate driver 200 supplies a gate-off voltage Voff to the gate lines GL1 to GLn during the remaining period when the scan pulse having the gate-on voltage Von is not supplied.

In the above description, the data driver 300, the gate driver 200, and the timing controller 400 have been described as being independently configured, but at least one of the data driver 300 or the gate driver 200 May be configured in the timing controller 400.

3 is a cross-sectional view showing the structure of a liquid crystal display panel according to the present invention.

The liquid crystal display panel according to the present invention includes a lower substrate 160, an upper substrate 180 facing the lower substrate 160 and on which a black matrix 183 and a column spacer 185 are formed, and the lower substrate ( 160, the first alignment layer 151 in which the first region A facing the column spacer 185 is open, is formed on the upper substrate 180, and the column spacer 185 is formed. A second alignment layer 152 in which the second region B is open and a liquid crystal layer 140 between the first alignment layer 151 and the second alignment layer 152 are included.

First, a pixel is formed on the lower substrate 160 in each crossing region of gate lines (not shown) and data lines (not shown). The pixel includes a thin film transistor 162, a common electrode 167 and a pixel electrode 165.

Although not shown in detail in the drawings, the thin film transistor 162 includes a gate formed on the first substrate 161, a gate insulating layer (GI) formed on the gate, an active layer formed on the gate insulating layer, and And a first electrode and a second electrode connected to the active.

The thin film transistor 162 serves as a switching function to transmit and control an electric signal to each pixel. A first protective layer 163 and a planarization layer 164 covering the thin film transistor 162 are formed on the first electrode and the second electrode. A first contact hole 166 for exposing the second electrode of the thin film transistor 162 is formed in the first protective layer 163 and the planarization layer 164.

The common electrode 167 is formed on the planarization layer 164. A common voltage Vcom for driving the liquid crystal is applied to the common electrode 167. A second protective layer 168 covering the common electrode 167 is formed on the common electrode 167.

The pixel electrode 165 is formed on the second protective layer 168 covering the common electrode 167. In this case, the pixel electrode 165 is connected to the second electrode of the thin film transistor 162.

The upper substrate 180 includes a black matrix (BM) 183 and a color filter 182. The color filter 182 has R(Red), G(Green), and B(Blue) patterns formed thereon. The black matrix (BM) 183 is disposed between the R, G, and B patterns of the color filter 182, respectively. In addition, the upper substrate 180 includes a column spacer 185 for maintaining a cell gap between the upper substrate 180 and the lower substrate 160.

In the lower substrate 160 and the upper substrate 180, as shown in FIG. 3, a first alignment layer 151 and a second alignment layer for aligning the liquid crystals 141 provided in the liquid crystal layer 140 152) is formed.

The first alignment layer 151 is formed on the lower substrate 160 so that the first area A facing the column spacer 185 is opened. The second alignment layer 152 is formed on the upper substrate 180 so that the second region B in which the column spacer 185 is formed is opened.

The first alignment layer 151 and the second alignment layer 152 are formed by a patterning mold in which an alignment material is formed. The first alignment layer 151 and the second alignment layer 152 may be formed by transferring an alignment material formed by the patterning mold to the upper and lower substrates.

The first area A is an area in which the column spacer 185 can be moved by an external force. For example, an area in which the column spacer 185 can be moved by an external force is about 20 μm to about 30 μm, but is not limited thereto.

The second region B is a region excluding a region in which the column spacer 185 formed on the upper substrate 180 and the second alignment layer 152 contact each other.

Accordingly, the first area A is larger than an area corresponding to the column spacer 185, and the second area B is larger than an area in which the column spacer 185 is formed.

Further, the first region A and the second region B are smaller than or equal to the region in which the black matrix 183 is formed. In this case, the first region A is a first contact hole in which a first contact hole 166 for connecting the thin film transistor 162 formed on the lower substrate 160 and the pixel electrode 165 is formed. It includes the area A1.

As described above, as the first alignment layer 151 and the second alignment layer 152 are formed so that the first area A and the second area B are open, the column spacer 185 by an external force Damage to the alignment layers 151 and 152 caused by movement of the alignment layers 151 and 152 may be prevented. As damage to the alignment layers 151 and 152 is prevented, a light leakage defect occurring in the liquid crystal display panel may be improved.

In addition, as described above, as the first alignment layer 151 and the second alignment layer 152 are formed, the alignment force of the alignment layers 151 and 152 may be improved. In addition, a phenomenon in which a foreign material falls off the liquid crystal layer 140 from the alignment layers 151 and 152 may be prevented, and light leakage due to the foreign material may be improved.

In addition, since the first contact hole area A1 included in the first area A is opened and the first alignment layer 151 is formed, the alignment material used as the first alignment layer 151 is used as the first contact. A phenomenon concentrated in the hole area A1 can be prevented.

A method of forming the first alignment layer 151 and the second alignment layer 152 will be described in detail below with reference to FIGS. 4A to 4C and FIGS. 5A to 5D.

A liquid crystal layer 140 is provided between the first alignment layer 151 and the second alignment layer 152. For example, the liquid crystal layer 140 may be formed by dropping the liquid crystal 141 on the lower substrate including the first alignment layer 151. In the liquid crystal display panel 100, among various properties of the liquid crystal 141 provided in the liquid crystal layer 140, an image is displayed using the property of changing the arrangement of molecules when a voltage is applied to the liquid crystal 141. do.

4A to 4C are exemplary views illustrating a method of manufacturing a display panel according to the present invention, and FIGS. 5A to 5D are exemplary diagrams illustrating a method of manufacturing an alignment layer applied to a display panel according to the present invention.

In the method of manufacturing a display panel according to the present invention, as shown in FIGS. 4A to 4C and 5A to 5D, forming a switching element on the lower substrate 160, on the upper substrate 180 Forming a column spacer 185, forming a first alignment layer 151 on the lower substrate 160 so that the first area A facing the column spacer 185 is opened, the column spacer The step of forming a second alignment layer 152 on the upper substrate 180 so that the second region B with 185 is provided therebetween and the lower substrate 160 with the liquid crystal layer 140 interposed therebetween And bonding the upper substrate 180 to each other.

First, on the lower substrate 160, as shown in FIG. 4A, a thin film transistor 162, a common electrode 167, and a pixel electrode 165 are formed.

The thin film transistor 162, although not shown in detail in the drawing, is a gate formed on the first substrate 161, a gate insulating film (GI) formed on the gate, an active formed on the gate insulating film, And an inter-layer dielectric (ILD) formed on the active layer and a first electrode and a second electrode formed on the interlayer insulating layer and connected to the active. The thin film transistor 162 is a switching element that transmits and controls an electrical signal to each pixel.

In the liquid crystal display panel according to the present invention, a thin film transistor is formed in a bottom gate method, but the present invention is not limited thereto, and the thin film transistor may be formed in a top gate method.

Further, the thin film transistor may be an amorphous silicon thin film transistor (a-Si TFT), a polycrystalline silicon thin film transistor (poly-Si TFT), an oxide thin film transistor (Oxide TFT), or the like. In addition, the transistors may be N-type or P-type thin film transistors.

A first protective layer 163 and a planarization layer 164 covering the thin film transistor 162 are formed on the thin film transistor 162. The planarization layer 164 may be formed of photoacryl having a thickness of 2.0 μm to 3.0 μm, and functions to planarize the lower substrate 160. A first contact hole 166 exposing the second electrode of the thin film transistor 162 is provided in the first protective layer 163 and the planarization layer 164. The second electrode and the pixel electrode 165 are connected through the first contact hole 166.

The common electrode 167 is formed on the planarization layer 164. A common voltage Vcom for driving the liquid crystal is applied to the common electrode 167. The common electrode 167 may be formed of, for example, a transparent conductive material such as Indium Tin Oxide (ITO). A second protective layer 168 covering the common electrode 167 is formed on the common electrode 167. The common electrode 167 may be formed in a linear shape or a finger pattern (finger pattern or comb-shaped) or in a rectangular shape, and has a zig-zag shape having at least one curvature. It may be formed, and is not limited to the shape of the pixel electrode or the common electrode.

The pixel electrode 165 is formed on the second protective layer 168 covering the common electrode 167. The pixel electrode 165 may be formed to have a linear shape or a finger pattern or comb-shaped, or may be formed in a zig-zag shape having at least one curvature. The pixel electrode 165 may be formed of, for example, a transparent conductive material such as indium tin oxide (ITO).

The pixel electrode 165 and the common electrode 167 may be formed in a pixel electrode on the common electrode in which the pixel electrode 165 is formed on the common electrode 167. However, the present invention is not limited thereto, and the common electrode 167 may also be formed in a common electrode on the pixel electrode formed on the pixel electrode 165.

Next, on the upper substrate 180, a black matrix (BM) 183 and a color filter 182 are formed as shown in FIG. 4B. The black matrix (BM) 183 is formed on the second substrate 181, and the color filter 182 is formed on the black matrix (BM) 183. The color filter 182 has R(Red), G(Green), and B(Blue) patterns formed thereon. The color filter 182 is used to implement colors in the display panel 100. The black matrices (BM) 183 are positioned between the R, G, and B patterns of the color filter 182, respectively, and perform a function of classifying or blocking the R, G, and B light. As the black matrix 183 is formed, a contrast of the display panel may be improved, and a leakage current of the thin film transistor 162 may be reduced.

An overcoat layer 187 is formed on the color filter 182 to planarize the second substrate 181 on which the black matrix 183 and the color filter 182 are formed.

A column spacer 185 is formed on the second substrate 181 including the overcoat layer 187. By forming the column spacer 185, the upper substrate 180 is completed. The column spacer 185 functions to maintain a cell gap between the upper substrate 180 and the lower substrate 160. The column spacer 185 may be formed by patterning a resin or the like. In the present invention, the present invention has been described by taking the column spacer 185 formed on the upper substrate as an example, but the column spacer 185 may be formed on the lower substrate 160.

Next, a first alignment layer 151 for aligning the liquid crystals 141 provided in the liquid crystal layer 140 is formed on the lower substrate 160 as shown in FIG. 4A.

In the forming of the first alignment layer 151, as shown in FIGS. 5A to 5D, the step of preparing a patterning mold 600 in which a pattern 620 is formed, and an alignment material in the patterning mold 600 Forming 153, and transferring the alignment material 153 formed on the pattern 620 to the lower substrate 160.

The patterning mold 600 includes a base mold 610 and a pattern 620 formed on the base mold 610. The pattern 620 is formed on the base mold 610 so that a portion corresponding to the first region A of the lower substrate 160 is formed.

The first area A is an area in which the column spacer 185 can be moved by an external force. For example, an area in which the column spacer 185 can be moved by an external force is about 20 μm to about 30 μm, but is not limited thereto. Accordingly, the first area A is larger than the area corresponding to the column spacer 185. In addition, the first region A is smaller than or equal to the region in which the black matrix 183 is formed. In this case, the first region A includes a first contact hole region A1 in which a first contact hole 166 for connecting the thin film transistor 162 and the pixel electrode 165 is formed.

The pattern 620 is convexly protruded from the base mold 600, as shown in FIG. 5A. In addition, in the portion of the lower substrate 160 corresponding to the first region A, no patterns are formed, so that the shape is concave.

An alignment material 153 is coated on the entire surface of the patterning mold 600 as shown in FIG. 5B. For example, the alignment material 153 may be formed using a spin coating method. Polyimide (PI) may be used as the alignment material 153.

The alignment material 153 coated on the patterning mold 600 is transferred to the lower substrate 160 as shown in FIG. 5C. In this case, only the alignment material 153 coated on the protruding portion of the pattern 620 is transferred to the lower substrate 160. The alignment material 153 is transferred onto the lower substrate 160 at any one of 50°C to 150°C. As the alignment material 153 is transferred to the lower substrate 160, the first alignment layer 151 is formed on the lower substrate 160 with the first region A open.

In this case, a contact angle between the pattern 620 and the alignment material 153 is greater than a contact angle between the lower substrate 160 and the alignment material 153. In this case, a contact angle between the pattern 620 and the alignment material 153 may be any one of 25° to 50°, and a contact angle between the lower substrate 160 and the alignment material 153 ( Contact angle) may be any one of 5° to 20°. The contact angle is defined as the angle between the liquid surface and the solid surface when the liquid is in contact with the solid. The larger the contact angle, the lower the adhesion.

The patterning mold 600 is removed after the alignment material 153 is transferred to the lower substrate.

Next, a second alignment layer 152 for aligning the liquid crystals 141 provided in the liquid crystal layer 140 is formed on the upper substrate 180, as shown in FIG. 4B.

The step of forming the second alignment layer 152 is the same as the step of forming the first alignment layer 151. However, there is a difference between the patterning mold 600 used in forming the second alignment layer 152 and the patterning mold 600 used in forming the first alignment layer 151.

The patterning mold 600 includes a base mold 610 and a pattern 620 formed on the base mold 610. A pattern 620 is formed on the base mold 610 such that a portion corresponding to the second region B of the upper substrate 180 is opened.

Here, the second area B is an area in which the column spacer 185 formed on the upper substrate 180 is open. Accordingly, the second region B is larger than the region in which the column spacer 185 is formed. Also, the second region B is smaller than or equal to the region in which the black matrix 183 is formed.

The pattern 620 is convexly protruded from the base mold 600. In addition, a portion of the upper substrate 160 corresponding to the second region B is formed to be concave between the patterns 620.

Since the second region B, that is, the region in which the column spacer 185 is formed, is opened, and the second alignment layer 152 must be transferred to the upper substrate 180, the height of the pattern 620 is, It is formed larger than the height of the column spacer 185. Since the height of the pattern 620 is formed larger than the height of the column spacer 185, the alignment material 153 is not transferred to the column spacer 185.

In addition, since the regions covered by the second alignment layer 152 and the first alignment layer 151 are different from each other, the pattern included in the patterning mold 600 used in the step of forming the second alignment layer 152 ( The shape 620 is formed differently from the shape of the pattern 620 included in the patterning mold 600 used in the step of forming the first alignment layer 151.

An alignment material 153 is coated on the entire surface of the patterning mold 600. For example, the alignment material 153 may be formed using a spin coating method. Polyimide (PI) may be used as the alignment material 153.

The alignment material 153 coated on the patterning mold 600 is transferred to the upper substrate 180. In this case, only the alignment material 153 coated on the portion where the pattern 620 is formed is transferred to the upper substrate 180. The alignment material 153 is transferred onto the upper substrate 180 at any one of 50°C to 150°C. Alternatively, the alignment material 153 may be transferred onto the upper substrate 180 in a prebaking temperature range of the alignment material 153, but is not limited thereto. Accordingly, the second alignment layer 152 is formed on the upper substrate 180 to open the second region A.

A contact angle between the pattern 620 and the alignment material 153 is greater than a contact angle between the upper substrate 180 and the alignment material 153. In this case, a contact angle between the pattern 620 and the alignment material 153 may be any one of 25° to 50°, and a contact angle between the upper substrate 180 and the alignment material 153 ( Contact angle) may be any one of 5° to 20°. The contact angle is defined as the angle between the liquid surface and the solid surface when the liquid is in contact with the solid. The larger the contact angle, the lower the adhesion.

The patterning mold 600 is removed after the alignment material 153 is transferred to the upper substrate 180.

Through the above-described method, the first alignment layer 151 and the second alignment layer 152 may be patterned on the lower substrate 160 and the upper substrate 180, respectively, without a separate etching process or mask.

Finally, liquid crystals 141 forming a liquid crystal layer 140 are dropped onto the lower substrate 160 or the upper substrate 180. In this case, liquid crystals 141 may not be dropped in the first region A and the second region B.

The lower substrate 160 and the upper substrate 180 are bonded together using a sealant. In this case, a liquid crystal layer 140 formed by the dropped liquid crystals 141 is provided between the lower substrate 160 and the upper substrate 180. The actual material may be formed on the lower substrate 160 or the upper substrate 180. The display area of the liquid crystal panel is shielded from the outside by the sealant.

Those skilled in the art to which the present invention pertains will appreciate that the present invention can be implemented in other specific forms without changing the technical spirit or essential features thereof. Therefore, it should be understood that the embodiments described above are illustrative in all respects and not limiting. The scope of the present invention is indicated by the claims to be described later rather than the detailed description, and all changes or modified forms derived from the meaning and scope of the claims and their equivalent concepts should be interpreted as being included in the scope of the present invention. do.

100: panel 200: gate driver
300: data driver 400: timing controller

Claims (9)

Lower substrate;
An upper substrate facing the lower substrate and having a black matrix and a column spacer formed thereon;
A first alignment layer formed on the lower substrate and having a first region facing the column spacer open;
A second alignment layer formed on the upper substrate and in which a second region in which the column spacer is formed is open; And
A liquid crystal layer between the first alignment layer and the second alignment layer,
The first alignment layer and the second alignment layer are formed to be spaced apart from the column spacer,
The first region includes a first contact hole region,
In the first contact hole region, a first contact hole for connecting a pixel electrode to a thin film transistor formed on the lower substrate is formed. The method of claim 1,
The first area and the second area are smaller than or equal to the area in which the black matrix is formed. delete Forming a switching element on the lower substrate;
Forming a black matrix and a column spacer on the upper substrate;
Forming a first alignment layer on the lower substrate so that the first area facing the column spacer is opened;
Forming a second alignment layer on the upper substrate so that the second region including the column spacer is opened; And
A liquid crystal layer interposed therebetween, comprising the step of bonding the lower substrate and the upper substrate,
The first alignment layer and the second alignment layer are formed to be spaced apart from the column spacer,
The first region includes a first contact hole region,
A method of manufacturing a liquid crystal display panel, wherein the first contact hole region has a first contact hole for connecting the switching element and the pixel electrode. The method of claim 4,
Forming the first alignment layer or the second alignment layer,
Manufacturing a patterning mold in which a pattern is formed;
Forming an alignment material in the patterning mold;
And transferring the alignment material formed on the pattern to the lower substrate or the upper substrate. The method of claim 5,
The alignment material is formed on the entire surface of the patterning mold. The method of claim 5,
A method of manufacturing a liquid crystal display panel, wherein a contact angle between the pattern and the alignment material is greater than a contact angle between the lower or upper substrate and the alignment material. The method of claim 5,
The method of manufacturing a liquid crystal display panel, wherein the height of the pattern is greater than the height of the column spacer. The method of claim 4,
The first region and the second region are smaller than or equal to the region in which the black matrix is formed.

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