KR102130219B1 - Non-linear switching device, method of fabricating the same, and non-volatile memory device having the same - Google Patents

Abstract

The present invention relates to a nonlinear switch element, a method for manufacturing the same, and a nonvolatile memory element including the same. According to an embodiment of the present invention, the first electrode; A second electrode; And a switching thin film disposed between the first electrode and the second electrode and having Ga _1-x Te _x (0≤x<1).

Description

Non-linear switching device, method of manufacturing the same, and non-volatile memory device including the same{Non-linear switching device, method of fabricating the same, and non-volatile memory device having the same}

The present invention relates to semiconductor technology, and more particularly, to a nonlinear switch element, a method of manufacturing the same, and a nonvolatile memory device including the same.

In recent years, as the demand for portable digital application devices such as digital cameras, MP3 players, personal digital assistants (PDAs), and cellular phones has increased, the non-volatile memory market is rapidly expanding. As a programmable nonvolatile memory device, a NAND flash memory is a representative example, and integration is improving through a multilevel cell (MLC) implementation. However, as the NAND flash memory also reaches the limit of scaling, a resistive memory device (ReRAM) using a variable resistor capable of reversibly changing a resistance value as a non-volatile memory device that can replace it has attracted attention. Since the physical property of the resistance value of the variable resistor can be used as a data state by itself and can be driven with low power, it has been widely studied as a low power memory device with a simple configuration.

In general, the next-generation memory device has been developed to have an array of cross-point structures in order to increase the degree of integration, but in the cross-point structure, writing to cell information is caused by a leakage current generated between adjacent cells. There is a possibility of crosstalk between cells such as errors and read errors. To this end, research is being conducted to apply a switch element such as a selection element in a cell array. As such a switch element, a device such as a transistor, a diode, a tunnel barrier device, or an ovonic threshold switch has been proposed.

In the case of a switch element for application to a next-generation memory device, unlike a diode, it has a symmetrical current-voltage (IV) characteristic with respect to an external electric field of + and-polarity, a low current flows in a low external electric field, and a high current in a high external electric field. Excellent non-linear properties are preferred.

The technical problem to be achieved by the present invention is to have a low power and highly integrated resistive memory device having a symmetric IV characteristic in an external electric field, a low current flowing in a low external electric field, a high current flowing in a high external electric field, and high on/off It is to provide a switch element having a nonlinear characteristic having a current ratio (Ion/Ioff).

In addition, another technical problem to be achieved by the present invention is to provide a method for manufacturing a switch element having a nonlinear characteristic having the above-described advantages.

In addition, another technical problem to be achieved by the present invention is to provide a nonvolatile memory device including a switch device having a nonlinear characteristic having the above-described advantages.

According to an embodiment of the present invention, the first electrode; A second electrode; And a switching thin film disposed between the first electrode and the second electrode and having a composition ratio according to Formula 1 below.
[Formula 1]
Ga _1-x Te _x (0 ≤ x <1)
The x has a range of 0.5 ≤ x <1, and the nonlinear switching element may have an Ovonic Threshold Switch (OTS) characteristic.
In one embodiment, the non-linear switching element is 0.8 × 10 defined as the on current at the threshold voltage (= I _on @ V _th ) for the off current (= I _off @ V _th ) at a threshold voltage of 1/2 ^It may have a selection ratio of ⁴ or more. The switching thin film includes at least a portion of a conductive region, and an electric field applied through the conductive region may form a conductive path between the first electrode and the second electrode. Can.
In one embodiment, at least one of the first electrode and the second electrode is titanium (Ti), tantalum (Ta), copper (Cu), aluminum (Al), nickel (Ni), platinum (Pt), gold ( Au), platinum (Pt), palladium (Pd) or rhodium (Rh) tungsten (W), TiN or TaN silicon (Si) or any of WSix, NiSix, CoSix or TiSix, mixtures, alloys or two or more thereof It may include a laminated structure. The thickness of the switching thin film may range from 5 nm to 80 nm.
According to another embodiment of the present invention, a first step of forming a first electrode; A second step of forming a switching thin film having Ga _1-x Te _x (0≤x<1) on the first electrode; And a third step of forming a second electrode on the switching thin film. The x may have a range of 0.5 ≤ x <1. The switching thin film may have an amorphous structure. The thickness of the switching thin film may range from 5 nm to 80 nm.

According to another embodiment of the present invention, the non-linear switching element according to claim 1; And an information storage member for implementing a phase change memory, magnetic memory, or resistance change memory electrically connected in series to the nonlinear switching element, wherein the information storage member includes a phase change material, a variable resistive material, and a programmable metallization. Non-volatile memory devices can be provided that include a cell material, a magnetic material, or a combination thereof. The information storage member may be formed of a single layer or a plurality of stacked structures.

delete

According to an embodiment of the present invention, by using a switching thin film having Ga _1-x Te _x (0≤x<1), it has a symmetric IV characteristic in an external electric field, a low current flows in a low external electric field, and a high external electric field. In the high current flow, a non-linear switch element having a high on/off current ratio (I _on /I _off ) may be provided.

Further, according to another embodiment of the present invention, a method of manufacturing a reliable nonlinear switch element capable of easily manufacturing a nonlinear switch having the above advantages can be provided.

In addition, according to another embodiment of the present invention, by implementing a non-volatile memory array of a cross-point structure including a memory cell of the 1S-1R structure using a non-linear switch element having the above-described advantages, the highly integrated low-power non-volatile A memory element can be provided.

1A is a perspective view of a non-volatile memory device having a cross-point array according to an embodiment of the present invention, FIG. 1B is a cross-sectional view of a memory cell of an embodiment of the present invention, and FIG. 1C is according to an embodiment of the present invention A cross-sectional view of a nonlinear switch element, and FIG. 1D is a flowchart illustrating a method of manufacturing a nonlinear switch element according to an embodiment of the present invention.
2A and 2D are graphs showing current-voltage behavior of a nonvolatile memory device to which a GaTe-based switch device according to an embodiment of the present invention is applied.
3 is a block diagram illustrating an electronic system including a nonvolatile memory device according to one embodiment of the present invention.
4 is a block diagram illustrating a memory card including a nonvolatile memory device according to embodiments of the present invention.

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

The embodiments of the present invention are provided to more fully describe the present invention to those of ordinary skill in the art, and the following embodiments can be modified in various other forms, and the scope of the present invention is as follows. It is not limited to the Examples. Rather, these examples are provided to make the present disclosure more faithful and complete, and to fully convey the spirit of the present invention to those skilled in the art.

The same reference numbers in the drawings refer to the same elements. Also, as used herein, the term “and/or” includes any combination of any one or more of the listed items.

Terms used in the present specification are used to describe the embodiments, and are not intended to limit the scope of the present invention. In addition, even if it is described as a singular in this specification, a plural form may be included unless the singular is clearly indicated in context. Also, the terms “comprise” and/or “comprising” as used herein specify the shapes, numbers, steps, actions, elements, elements and/or the presence of these groups. Does not exclude the presence or addition of other shapes, numbers, actions, elements, elements and/or groups.

Reference herein to a layer formed "on" a substrate or other layer refers to a layer formed directly on the substrate or other layer, or formed on an intermediate layer or intermediate layers formed on the substrate or other layer. It may also refer to a layer. In addition, for those skilled in the art, a structure or shape disposed “adjacent” to another shape may have portions overlapping or disposed below the adjacent shape.

In this specification, "below", "above", "upper", "lower", "horizontal" or "vertical" Relative terms such as can be used to describe the relationship of one component, layer or region with another component, layer or region, as shown on the figures. It should be understood that these terms encompass not only the directions indicated in the figures, but also other directions of the device.

In the following, embodiments of the present invention will be described with reference to cross-sectional views schematically showing ideal embodiments (and intermediate structures) of the present invention. In these drawings, for example, the size and shape of members may be exaggerated for convenience and clarity of description, and in actual implementation, deformations of the illustrated shape can be expected. Accordingly, embodiments of the present invention should not be construed as limited to the specific shapes of the regions shown herein. In addition, reference numerals for members of the drawings refer to the same members throughout the drawings.

1A is a perspective view of a nonvolatile memory device 100 having a cross point array according to an embodiment of the present invention, FIG. 1B is a cross-sectional view of a memory cell MC in one embodiment of the present invention, and FIG. 1C is the present invention 1D is a cross-sectional view of a non-linear switch element according to an embodiment, and FIG. 1D is a flowchart illustrating a method of manufacturing a non-linear switch element according to an embodiment of the present invention.

Referring to FIG. 1A, the nonvolatile memory device 100 may include an array of memory cells MC arranged in a plurality of rows and columns. A set of conductive electrodes (herein referred to as word lines; WL1-WL4) extends on one end of the array of memory cells MC. Each word line WL1-WL4 may be electrically connected to memory cells MC of a corresponding row. Another set of conductive electrodes (herein referred to as bit lines; BL1-BL5) may extend over the other end of the array of memory cells MC. Each bit line BL1-BL5 may be electrically connected to memory cells MC of a corresponding column.

In the nonvolatile memory device 100, each memory cell MC may be disposed at the intersection of one word line and one bit line. The read and write operations of a specific memory cell (called a selected memory cell) may be performed by activating word lines and bit lines associated with the selected memory cell. The nonvolatile memory device 100 further includes a word line control circuit, for example, a row decoder, which is coupled to the memory cells MC through each word line and activates the selected word line for reading or writing the selected memory cell. It can contain. The nonvolatile memory device 100 may be connected to a bit line control circuit, for example, a column decoder or page buffer, coupled to the memory cells MC through respective bit lines BL1-BL5.

The word line control circuit and the bit line control circuit can selectively access a specific memory cell by activating the corresponding word line and bit line coupled to the selected memory cell. During the write operation, the word line control circuit writes information to the selected memory cell by applying a predetermined voltage to the selected word line. In this case, a logic value is recorded while a current affecting the characteristics of the memory cell flows to the selected memory cell.

Each memory cell includes an information storage member RL, and each memory may be determined according to the information storage member RL. The information storage member RL is a phase change material, a variable resistance phase material, a programmable metallization cell material, a magnetic material, or these for providing a nonvolatile memory cell such as a phase change memory, a magnetic memory, or a resistance change memory. It may include a combination of.

The phase change material can be reversibly converted from an amorphous state to a crystalline state or vice versa, and thus is a material having different resistance values. Generally, the phase change material has high resistance in an amorphous state and low resistance in a crystalline state. The phase change material may include, for example, a GeSbTe-based material, that is, a chalcogenide-based compound such as any one of GeSb ₂ Te ₃ , Ge ₂ Sb ₂ Te ₅ , GeSb ₂ Te ₄ , or a combination thereof. have. Or, there is a different phase change material, GeTeAs, GeSnTe, SeSnTe, GaSeTe, GeTeSnAu, SeSb _2, InSe, GeTe, BiSeSb, PdTeGeSn, InSeTiCo, InSbTe, In ₃ SbTe _2, GeTeSb _2, GeTe ₃ Sb, GeSbTePd or AgInSbTe , These are merely examples, and the present invention is not limited thereto. Further, a material doped with a non-metal element such as B, C, N, or P may be applied to the aforementioned materials.

As another embodiment, the information storage member RL may include the variable resistive material whose electrical resistance value can be reversibly changed by an electrical signal. The variable resistive material is a material that can be reversibly converted between a low resistance state and a high resistance state, similar to the phase change material described above. As an example of the variable resistance _{material, SrTiO 3, SrZrO 3, Nb} : Fe lobe, such as SrTiO ₃ Sky teugye oxide or TiOx, NiO, TaOx, HfOx, AlOx, ZrOx, CuOx, NbOx, and TaOx, GaOx, GdOx, MnOx , PrCaMnO, and transition metal oxides such as ZnONIOx. The perovskite-based oxide and transition metal oxide may be stoichiometric or non-stoichiometric, and the present invention is not limited thereto, and the listed materials may be implemented by mixing or stacking two or more. In one embodiment, the variable resistive material may be formed through a sputtering or atomic layer deposition process.

To explain the resistance switching properties of the variable resistive material, various mechanisms related to conductive filaments, interfacial effects, and trap charges have been proposed, but these mechanisms are still not clear and the invention is not limited thereby. For application to a non-volatile memory device, it can be used as the information storage member RL of the present invention, as long as it has a factor having a kind of hysterisis that affects the current caused by charge in the microstructure. In one embodiment, the materials may constitute the information storage member RL in a single layer or in multiple layers of two or more materials stacked for energy band engineering.

Further, the history may have distinct characteristics according to a unipolar switching characteristic independent of the polarity of the applied voltage and a bipolar switching characteristic depending on the polarity of the applied voltage, but the present invention is not limited thereto. Does not. For example, the information storage member RL may be made of only a monopolar resistance material, or only a bipolar resistance material. Alternatively, the information storage member RL may provide a memory cell that performs multi-bit driving by using a stacked structure of a film made of the monopolar resistance material and a film made of the bipolar resistance material.

In other embodiments, the information storage member RL may include a programmable metallization cell material. For example, a plurality of conductive lines WL1 and WL2 are electrochemically active, for example, oxidizable silver (Ag), tellurium (Te), copper (Cu), tantalum (Ta), titanium (Ti) ), or a metal electrode such as tungsten (W), gold (Au), platinum (Pt), palladium (Pd), and rhodium (Rh), which are relatively inert, and a plurality of conductive lines Between the fields W1 and W2 and the channel film CH, a programmable metallization cell material including an electrolyte material having super ion regions may be disposed to implement the information storage member RL.

The programmable metallization cell material may exhibit resistance change or switching characteristics through physical rearrangement of super ion regions in the electrolyte material. The electrolyte material having the super ion region may be, for example, a base glass material such as a germanium selenium compound (GeSe) material. The GeSe compound may be referred to as chalcogenide glass or chalcogenide material. Such GeSe compounds include Ge3Se ₇ , Ge ₄ Se ₆ or Ge ₂ Se ₃ . In other embodiments, other known materials may be used.

In another embodiment, the information storage member RL may include the magnetic material. The magnetic material may be, for example, a composition including a combination of Mg, Ni, Co, and/or Fe. In this case, the information storage member RL may include a Giant Magneto Resistive (GMR) structure or a Tunneling Magneto Resistance (TMR) structure. In the case of the tunneling magnetoresistive structure, the information storage member RL may include a magnetic tunneling junction obtained by a laminated structure of a suitable insulating film together with a film made of these magnetic materials, and known spin torque transmission You can also implement memory.

The materials described above with respect to the above-described information storage member RL may have a single layer or a plurality of stacked structures. For example, the information storage member RL may include two or more films selected from the phase change material, variable resistive material, programmable metallization cell material, and magnetic material described above. These stacked structures can be combined with each other and connected in series or in parallel between the conductive line and the channel film.

For programming or reading the selected memory cell, the width and/or magnitude of the voltage pulse across the memory cell is adjusted, and accordingly the resistance value of the selected memory cell is adjusted so that a specific logic state can be written or read. Since the read operation may be affected by a leak current generated by memory cells adjacent to another selected memory cell, each memory cell is a nonlinear switch element electrically connected in series to the information storage member RL ( SL). 1B, the nonlinear switch element SL may be electrically coupled between the information storage member RL and the bit line BL, but this is only an example, and the nonlinear switch element SL stores information. It may be electrically coupled between the member RL and the word line WL.

In one embodiment, the threshold voltage Vth of the nonlinear switch element SL may have a value smaller than the write voltage. In this case, while writing to the selected memory cell, current flows through the selected memory cell, and the current flowing in the reverse direction may be blocked by the nonlinear switch element SL by the voltage applied to adjacent unselected memory cells. . The magnitude of the read voltage may be smaller than the threshold voltage Vth of the nonlinear switch element SL. For example, the magnitude of the read voltage may be performed by a half selection method that is half of the threshold voltage Vth of the nonlinear switch element SL, and the present invention is not limited to this example.

The nonvolatile memory device 100 according to the above-described embodiment has a memory cell array of one layer, but this is only an example and the present invention is not limited thereto. For example, a nonvolatile memory device in which two or more memory cell arrays are stacked on a substrate and integrated in three dimensions may be provided.

Referring back to FIG. 1B, the memory cell MC may include a first electrode EL1 and a second electrode EL2. In one embodiment, the third electrode EL3 may also be provided between the information storage member RL and the nonlinear switch element SL. These electrodes EL1, EL2, EL3 may be the same material or different materials. In one embodiment, these electrodes EL1, EL2, EL3 are reactive metals titanium (Ti), tantalum (Ta), copper (Cu), aluminum (Al), nickel (Ni), Schottky barrier as needed In order to form a layer, platinum (Pt), gold (Au), platinum (Pt), palladium (Pd) or rhodium (Rh) having a large work function may be included, but the present invention is not limited thereto. For example, an inert metal such as tungsten (W), a conductive nitride such as TiN or TaN, or a conductive oxide such as (InSn) ₂ O ₃ may be used as materials for the electrodes EL1, EL2, and EL3. In another embodiment, the electrodes EL1, EL2, EL3 may include silicon (Si) or a silicon metal compound such as WSix, NiSix, CoSix or TiSix. Also, the listed electrode materials may be applied singly, mixed or alloyed, or two or more electrodes stacked.

The first electrode EL1 and the second electrode EL2 are electrically coupled to the word line and the bit line, respectively. In one embodiment, the first electrode EL1 and the second electrode EL2 may be formed of the same material as the word line and the bit line, respectively, and may be integrated with each other.

In one embodiment, the nonlinear switch element SL may include a GaTe-based switching thin film. The GaTe-based switching thin film may include Ga _1-x Te _x (0≤x<1). Preferably, the range of x may include 0.5≤x<1.

The non-linear switching device including the GaTe-based switching thin film (SL) has an optical threshold switch (OTS) characteristic to implement a low-power and high-density resistive memory device, and has a higher non-linear characteristic than a conventional selection device. It can have a IV characteristic symmetric to the external electric field. In addition, the non-linear switching elements (EL2, SL, EL3) of the present invention have a low current in a low external electric field and a high current in a high external electric field so as to have superior non-linear characteristics, and a high on/off current ratio (Ion/Ioff). Have

In an embodiment of the present invention, the non-linear switching element is from a voltage that is half of the threshold voltage (Vth) to an on current (= I _on @ Vth) at a threshold voltage for an off current (= I _off @ 1/2 V _th ). It may have a selectivity of 0.8 × 10 ⁴ or more defined.

In addition, the GaTe-based switching thin film SL includes at least a part of a conductive region, and a conductive path between a second electrode and a third electrode by an electric field applied through the conductive region. Can form.

In addition, the GaTe-based switching thin film SL may have amorphous properties as a whole or some nano crystals may be formed, but may have generally amorphous properties. In one embodiment, the GaTe-based thin film SL may be formed in the GaTe-based thin film during the forming process.

As described above, in the non-linear switch element including the GaTe-based thin film of the present invention, a non-linear switch element can be formed with only a low voltage even if a forming process for applying a high voltage is omitted or a forming process is required. Therefore, power consumption at the time of initialization of a memory device to which a nonlinear switch element is applied is reduced, and operation efficiency can be improved since operation is possible with only a low voltage to improve an operation speed.

In one embodiment, the GaTe-based switching thin film (SL) may have a thickness of 5 nm to 80 nm. When the GaTe-based thin film has a thickness of 5 nm to 80 nm, onyx threshold switch (OTS) characteristics appear in the nonlinear switch element, and may have an effect of having superior nonlinear characteristics than in the prior art. If the thickness of the thin film is less than 5 nm, even if the electric field applied to the GaTe material is small, the current is greatly increased due to the tunnel effect or tunneling, resulting in the characteristic of the obonic threshold switch (OTS). It is difficult to express, and when the thickness of the thin film exceeds 80 nm, there is a possibility that heat generated from the electrode is greatly increased, so that the non-linear characteristics of the nonlinear switch element (OTS) or the nonlinear characteristics superior to the conventional one may not appear. .

Referring to Figure 1c, the switching element of the present invention may be a T-plug type switching element. Specifically, a W layer is disposed on a silicon (Si) substrate, and a first stacked structure of a stop nitride and an oxide layer may be spaced apart on the W layer. The W layer is used as a bottom electrode and can be arranged in a small plug shape to reduce the electrode size.

In addition, a lower electrode TiN may be disposed in a separation space between the first stacked structures. The second stacked structure of the upper electrode (TiN) and the switching film including the GaTe-based material may be spaced apart on the first stacked structure by contacting the lower electrode (TiN) in a space between the first stacked structures. . Further, a GaTe-based material may be filled between the sidewall of the first stacked structure and the sidewall of the lower electrode (TiN), and may be extended in the vertical direction to be connected to the switching film.

Referring to FIG. 1D, a lower electrode (which may be the third electrode EL3 of FIG. 1B) is first formed for the manufacture of a nonlinear switch element (S10 ). The formation of the lower electrode may be formed by sputtering or chemical vapor deposition, and the present invention is not limited thereto. Then, a GaTe-based thin film is formed on the lower electrode (S20). The GaTe-based thin film may be formed by sputtering using Ga and Te alloy targets. In one embodiment, when ion assist is required in the process of forming a thin film of Ga1-xTex (0.5≤x<1), a process such as plasma enhanced sputtering may be applied. In another embodiment, the target for sputtering may be formed by cosputtering using two types of targets including respective elements. In another embodiment, the alloy layer of Ga1-xTex may be formed through chemical vapor deposition using a Ga or Te precursor or atomic layer deposition process, which is a self-limiting process.

Thereafter, according to an embodiment, an upper electrode (see the second electrode EL2 of FIG. 1B) is formed on the GaTe-based thin film (S30 ). The upper electrode may also be formed through sputtering or chemical vapor deposition. At least one of the upper electrode and the lower electrode is titanium (Ti), tantalum (Ta), copper (Cu), aluminum (Al), nickel (Ni), platinum (Pt), gold (Au), platinum (Pt) ), palladium (Pd) or rhodium (Rh) tungsten (W), TiN or TaN silicon (Si), or any one of WSix, NiSix, CoSix, or TiSix, mixtures, alloys, or two or more laminate structures. have.

2A and 2D are graphs showing current-voltage behavior of a GaTe-based switch device according to an embodiment of the present invention.

Referring to FIG. 2A, the switch element is composed of a TiN thin film of upper and lower electrodes, and a GaTe-based switching thin film of Ga _0.18 Te _0.19 . In the case of Ga _0.18 Te _0.19 , the switch element exhibits an asymmetric current-voltage behavior (step 2) after the forming process (step 1). The threshold voltage V _th represents about 0.6 V.

Referring to FIG. 2B, the switch element is composed of a TiN thin film of upper and lower electrodes, and a GaTe-based switching thin film of Ga _0.63 Te _0.37 . In the case of Ga _0.63 Te _0.37 , the switch element exhibits an asymmetric current-voltage behavior (step 2) after the forming process (step 1). The threshold voltage V _th represents about 1.5 V. In addition, in the case of FIGS. 2A and 2B, the switch element does not exhibit an obonic threshold switch (OTS) characteristic.

Referring to Figure 2c, the switch element is composed of a TiN thin film upper and lower electrodes, the GaTe-based switching thin film is composed of a thin film containing Ga _0.5 Te _0.5 . In the case of Ga _0.5 Te _0.5 , the switch element exhibits symmetrical current-voltage behavior (step 2) after the forming process (step 1). The threshold voltage V _th represents about 1.35 V. In addition, at a 0.68 V threshold voltage, about 5 uA on current is shown, at a half of 0.68 V threshold voltage, about 100 nA off current is shown, and the value of I _on /I _off (selectivity) is about 0.05. It has excellent nonlinear properties up to 10 ³ .

Referring to Figure 2d, the switch element is composed of a TiN thin film of the upper and lower electrodes, and a GaTe-based switching thin film of Ga _0.3 Te _0.7 . In the case of Ga _0.3 Te _0.7 , the switch element exhibits a symmetrical current-voltage behavior (step 2) after the forming process (step 1). The threshold voltage V _th represents about 0.75 V. In addition, at a 0.75 V threshold voltage, about 500 uA on current is shown, at a half of 0.375 V threshold voltage, about 50 nA off current is shown, and I _on /I _off value is about 10 It has excellent nonlinear properties up to 10 ³ .

Referring to FIG. 2E, the switch element is composed of a TiN thin film of upper and lower electrodes, and a GaTe-based switching thin film of Ga _0.17 Te _0.83 . In the case of Ga _0.17 Te _0.83 , the switch element exhibits a symmetrical current-voltage behavior (step 2) after the forming process (step 1). The threshold voltage V _th represents about 0.76 V. In addition, at a 0.76 V threshold voltage, about 0.35 mA on current is shown, at a half of 0.38 V threshold voltage, about 43 nA off current is shown, and the value of I _on /I _off (selectivity) is about 0.8. It has excellent nonlinear properties up to 10 ⁴ .

According to an embodiment of the present invention, when using a GaTe-based thin film containing Ga1-xTex (0.5≤x<1), it has an Ovonic Threshold Switch (OTS) characteristic, and is more than a conventional selection device. It can be seen that high nonlinear characteristics and symmetrical IV characteristics appear in the external electric field.

In addition, the non-linear current-voltage characteristics of the nonlinear switch element including at least some crystallized GaTe-based thin film may provide a nonlinear switch element having a relatively low voltage required during the forming process by the crystallized GaTe material. Accordingly, a process of applying a high voltage compared to the operating voltage required during the conventional forming process can be eliminated by using this, thereby reducing the power consumption and improving the operating efficiency by increasing the operating speed. Can be.

The nonvolatile memory device disclosed with reference to the accompanying drawings in this specification may be implemented as a single memory device, or other heterogeneous devices in one wafer chip, for example, other devices such as a logic processor, an image sensor, and an RF device. In addition, it may be implemented in the form of a system on chip (SOC). In addition, a wafer chip on which a nonvolatile memory device is formed and another wafer chip on which heterogeneous devices are formed may be implemented in a single chip form by bonding using adhesive, soldering, or wafer bonding techniques.

Further, the nonvolatile memory devices according to the above-described embodiments may be implemented in various types of semiconductor packages. For example, non-volatile memory devices according to embodiments of the present invention include PoP (Package on Package), Ball grid arrays (BGAs), Chip scale packages (CSPs), Plastic Leaded Chip Carrier (PLCC), Plastic Dual In- Line Package (PDIP), Die in Waffle Pack, Die in Wafer FoSM, Chip On Board (COB), Ceramic Dual In-Line Package (CERDIP), Plastic Metric Quad Flat Pack (MQFP), Thin Quad Flatpack (TQFP), Small Outline (SOIC), Shrink Small Outline Package (SSOP), Thin Small Outline (TSOP), Thin Quad Flatpack (TQFP), System In Package (SIP), Multi Chip Package (MCP), Wafer-level Fabricated Package (WFP) or It can be packaged in a manner such as Wafer-Level Processed Stack Package (WSP). The package in which the nonvolatile memory device according to embodiments of the present invention is mounted may further include a controller and/or a logic device to control the package.

3 is a block diagram illustrating an electronic system 1000 including a nonvolatile memory device according to embodiments of the present invention.

Referring to FIG. 3, the electronic system 1000 according to an embodiment of the present invention includes a controller 1010, an input/output device (I/O) 1020, a storage device 1030, an interface 1040, and a bus ( bus; 1050). The controller 1010, the input/output device 1020, the memory device 1030, and/or the interface 1040 may be coupled to each other through the bus 1050.

The controller 1010 may include at least one of a microprocessor, a digital signal process, a microcontroller, and logic elements capable of performing similar functions. The input/output device 1020 may include a keypad, a keyboard, or a display device. The storage device 1030 may store data and/or instructions, and the storage device 1030 may include the three-dimensional non-volatile memory device disclosed herein.

In some embodiments, the memory device 1030 may have a hybrid structure that further includes other types of semiconductor memory devices (eg, DRAM devices and/or SRAM devices). The interface 1040 may perform a function of transmitting data to a communication network or receiving data from the communication network. The interface 1040 may be wired or wireless. To this end, the interface 1040 may include an antenna or a wired or wireless transceiver. Although not illustrated, the electronic system 1000 is an operation memory for improving the operation of the controller 1010 and may further include a high-speed DRAM and/or SRAM.

The electronic system 1000 includes a personal digital assistant (PDA) portable computer, a tablet PC, a wireless phone, a mobile phone, and a digital music player (digital). music player), a memory card, or any electronic product capable of transmitting and/or receiving information in a wireless environment.

4 is a block diagram illustrating a memory card 1100 including a nonvolatile memory device according to embodiments of the present invention.

Referring to FIG. 4, the memory card 1100 according to an embodiment of the present invention includes a storage device 1110. The memory device 1110 may include at least one of the nonvolatile memory elements according to the present invention. Also, the memory device 1110 may further include other types of semiconductor memory devices (eg, DRAM devices and/or SRAM devices). The memory card 1100 may include a memory controller 1120 that controls data exchange between the host and the storage device 1110.

The memory controller 1120 may include a central processing unit (CPU) 1122 that controls the overall operation of the memory card 1100. The memory controller 1120 may include an SRAM 1121 used as an operating memory of the central processing unit 1122. In addition to this, the memory controller 1120 may further include a host interface 1123 and a memory interface 1125. The host interface 1123 may include a data exchange protocol between the memory card 1100 and a host. The memory interface 1125 may connect the memory controller 1120 and the storage device 1110 to each other. Also, the memory controller 1120 may further include an error correction block (ECC) 1124. The error correction block 1124 can detect and correct errors in data read from the memory device 1110. Although not illustrated, the memory card 1100 may further include a ROM device that stores code data for interfacing with a host. The memory card 1100 may be used as a portable data storage card. The memory card 1100 includes a non-volatile memory device, and may also be implemented as a solid state disk (SSD) that can replace a hard disk in a computer system.

Although the above-described embodiments are mainly described with respect to a memory device, this is an example, and a person skilled in the art, a variable resistor according to an embodiment of the present invention is an on/off switch device of a logic circuit such as a fuse and an antifuse, or an FPGA It will be understood that it can also be applied.

The present invention described above is not limited to the above-described embodiments and the accompanying drawings, and various substitutions, modifications, and changes are possible within the scope of the technical spirit of the present invention. It will be clear to those who have knowledge.

Claims (13)

A first electrode;
A second electrode; And
It is disposed between the first electrode and the second electrode, and includes a switching thin film having a composition ratio according to the formula (1),
[Formula 1]
Ga _1-x Te _x (where x is in the range 0.5 ≤ x <1),
The first and second electrodes include at least one of a metal and a metal compound, and the Ovonic Threshold Switch (OTS) is provided by the switching thin film satisfying Formula 1 between the first and second electrodes. Nonlinear switching element with characteristics. delete delete According to claim 1,
The non-linear switching element has a selection ratio of 0.8 × 10 ⁴ or more defined as an on current (= I _on @ V _th ) at a threshold voltage to an off current (= I _off @ V _th ) at a threshold voltage of 1/2. Has a nonlinear switching element. According to claim 1,
The switching thin film includes at least a part of a conductive region, and an electric field applied through the conductive region forms a conductive path between the first electrode and the second electrode. Nonlinear switching element. According to claim 1,
At least one of the first electrode and the second electrode is titanium (Ti), tantalum (Ta), copper (Cu), aluminum (Al), nickel (Ni), platinum (Pt), gold (Au), platinum ( Pt), palladium (Pd) or rhodium (Rh) tungsten (W), TiN or TaN silicon (Si) or any one of WSix, NiSix, CoSix or TiSix, mixtures, alloys or two or more laminate structures Nonlinear switching element. According to claim 1,
The thickness of the switching thin film is a non-linear switching device in the range of 5 nm to 80 nm. In the manufacturing method of a non-linear switching element having the characteristics of the Ovonic Threshold Switch (OTS),
A first step of forming a first electrode;
A second step of forming a switching thin film on the first electrode having a composition ratio of Ga _1-x Te _x (where x is in the range 0.5 ≤ x <1); And
And a third step of forming a second electrode on the switching thin film,
The first and second electrodes include at least one of a metal and a metal compound, and a non-linear switching device is manufactured by using the switching thin film disposed between the first and second electrodes and having an optical threshold switch (OTS) characteristic. Way. delete The method of claim 8,
The switching thin film manufacturing method of a non-linear switching device having an amorphous structure. The method of claim 8,
The thickness of the switching thin film is a method of manufacturing a non-linear switching device within a range of 5 nm to 80 nm. The nonlinear switching element according to claim 1; And
And an information storage member for implementing a phase change memory, a magnetic memory, or a resistance change memory electrically connected in series to the nonlinear switching element,
The information storage member includes a phase change material, a variable resistive material, a programmable metallized cell material, a magnetic material, or a combination thereof. The method of claim 12,
The information storage member is a non-volatile memory device formed of a single layer or a plurality of stacked structures.

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