KR102114941B1 - 입력/출력 메모리 맵 유닛 및 노스브리지 - Google Patents

입력/출력 메모리 맵 유닛 및 노스브리지 Download PDF

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KR102114941B1
KR102114941B1 KR1020167013936A KR20167013936A KR102114941B1 KR 102114941 B1 KR102114941 B1 KR 102114941B1 KR 1020167013936 A KR1020167013936 A KR 1020167013936A KR 20167013936 A KR20167013936 A KR 20167013936A KR 102114941 B1 KR102114941 B1 KR 102114941B1
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processor
access
bit
gasket
memory
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KR20160076532A (ko
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비드햐나탄 카리아나순드하람
필립 엔지
매기 찬
빈센트 쿠에바
앤쏘니 아사로
짐쉐드 미르자
그리고리 더글라스 돈리
브라이언 브로우싸드
벤자민 치엔
야니브 아디리
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어드밴스드 마이크로 디바이시즈, 인코포레이티드
에이티아이 테크놀로지스 유엘씨
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1009—Address translation using page tables, e.g. page table structures
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/0802—Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
    • G06F12/0806—Multiuser, multiprocessor or multiprocessing cache systems
    • G06F12/0815—Cache consistency protocols
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/10—Address translation
    • G06F12/1027—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
    • G06F12/1045—Address translation using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB] associated with a data cache
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/02—Addressing or allocation; Relocation
    • G06F12/08—Addressing or allocation; Relocation in hierarchically structured memory systems, e.g. virtual memory systems
    • G06F12/12—Replacement control
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/20—Handling requests for interconnection or transfer for access to input/output bus
    • G06F13/24—Handling requests for interconnection or transfer for access to input/output bus using interrupt
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F12/00—Accessing, addressing or allocating within memory systems or architectures
    • G06F12/14—Protection against unauthorised use of memory or access to memory
    • G06F12/1416—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights
    • G06F12/145—Protection against unauthorised use of memory or access to memory by checking the object accessibility, e.g. type of access defined by the memory independently of subject rights the protection being virtual, e.g. for virtual blocks or segments before a translation mechanism
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/10—Providing a specific technical effect
    • G06F2212/1004—Compatibility, e.g. with legacy hardware
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/65—Details of virtual memory and virtual address translation
    • G06F2212/655—Same page detection
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F2212/00—Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
    • G06F2212/68—Details of translation look-aside buffer [TLB]
    • G06F2212/684—TLB miss handling

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
KR1020167013936A 2013-10-27 2014-10-24 입력/출력 메모리 맵 유닛 및 노스브리지 Active KR102114941B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201361896092P 2013-10-27 2013-10-27
US61/896,092 2013-10-27
PCT/US2014/062249 WO2015061731A1 (en) 2013-10-27 2014-10-24 Input/output memory map unit and northbridge

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KR20160076532A KR20160076532A (ko) 2016-06-30
KR102114941B1 true KR102114941B1 (ko) 2020-06-08

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US (2) US10025721B2 (enExample)
EP (1) EP3060992B1 (enExample)
JP (1) JP6552512B2 (enExample)
KR (1) KR102114941B1 (enExample)
CN (1) CN105814547B (enExample)
WO (1) WO2015061731A1 (enExample)

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Publication number Publication date
CN105814547B (zh) 2019-12-03
EP3060992B1 (en) 2019-11-27
KR20160076532A (ko) 2016-06-30
JP2017502435A (ja) 2017-01-19
EP3060992A4 (en) 2017-06-28
US20180307619A1 (en) 2018-10-25
CN105814547A (zh) 2016-07-27
US10025721B2 (en) 2018-07-17
WO2015061731A1 (en) 2015-04-30
EP3060992A1 (en) 2016-08-31
US20150120978A1 (en) 2015-04-30
JP6552512B2 (ja) 2019-07-31
US10223280B2 (en) 2019-03-05

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