KR102097532B1 - power amplifier - Google Patents

Abstract

Provided is a package type small-sized power amplifier provided with a high power transistor chip, a bond wire and a matching circuit including an SLC, wherein an output side matching circuit is formed by connecting the high power transistor chip, the SLC and a package output lead wire to one another by the bond wire, and a dual SLC is used as the SLC in the output side matching circuit. A Pi-type matching circuit may be formed or a short circuit for suppressing a secondary harmonic wave may be further provided in connection to the bond wire while the outside matching circuit is formed. The small-sized power amplifier according to the present invention is provided with the high power transistor chip, the bond wire and the matching circuit including the SLC to increase operational bandwidth or improve secondary harmonic wave suppression characteristics while providing high output power.

Description

Compact power amplifier

The present invention relates to a small power amplifier in which a high power transistor chip and a matching circuit are mounted inside a package as a kind of high power semiconductor device package.

In recent years, high integration and high performance are important in various mobile communication systems, broadcasting systems, and other communication systems. Therefore, the importance of high-power amplifiers with higher power in the same area is increasing day by day.

When designing a semiconductor package for a high-power amplifier as described above, when a transistor die is used in a highly integrated circuit such as a microwave monolithic integrated circuit (MMIC) process and a low temperature co-fired ceramic (LTCC) process, the package is directly formed on the substrate without making a package. Used through wire connections. In general, however, transistors are packaged and used on a printed circuit board (PCB).

Even in a small power amplifier, a high power transistor chip and a matching circuit are usually mounted inside the package. In particular, it is an important task to match the output impedance of the high-power transistor chip to the load side in the package using a bond wire and a single layer capacitor (SLC), and at the same time, improve the frequency characteristics.

That is, in order to supply high output power in such a small power amplifier, it is necessary to match the transistor chip output to the optimal load impedance point using a matching circuit inside the package. The matching circuit inside the package is usually composed of an alumina circuit board, bond wire, SLC, etc., and converts a typical reference impedance of 50 ohms into a low optimum load impedance point when viewed from the transistor chip output side.

1 and 2 are a plan view and a side view of one embodiment of a small power amplifier in the form of a package, and FIG. 3 is a simplified circuit showing the configuration from the output side of the transistor to the package output side terminal in this configuration of the small power amplifier. It is an internal matching circuit diagram.

1 and 2, a capacitor (SLC: 20) on the output side centered on the transistor (TR) die 10 to realize a small power amplifier package using a conventional high-power transistor (TR), OMN (Output) Matching Network (30), package lead wire (40) and input side capacitor (SLC: 50), IMN (Input Matching Network: 60) and package lead wire (70) are symmetrically installed.

A high output transistor for amplifying and outputting power is arranged in the transistor (TR) die 10.

The IMN 60 forms an input impedance matching circuit together with the bond wire and the SLC 50, and serves as a branch circuit that distributes the input power of the input side package lead wire 70 to each of the arranged transistors.

Likewise, OMN forms an output impedance matching circuit together with bond wires and SLCs, and serves as an integrated circuit that integrates the output power of each arranged transistor and delivers the output power to the package output lead wire.

FIG. 3 is a circuit diagram showing the configuration from the output side of the transistor of the small power amplifier package of FIGS. 1 and 2 to the package output lead side (here, substantially OMN) as a simple internal matching equivalent circuit.

In the equivalent circuit, the connection lines shown in FIG. 1 are replaced by corresponding inductors L1 and L2, and the capacitor SLC in the package is replaced by C1.

However, in the conventional small power amplifier as described above, the matching circuit as shown in FIG. 3 has a problem that it is difficult to increase the impedance for external matching due to the inductor-capacitor coupling configuration, the operation bandwidth is small, and the second harmonic due to LC resonance (second The problem of poor harmonic suppression has been continuously pointed out.

Republic of Korea Registered Patent No. 10-0878708 Republic of Korea Patent Publication No. 10-2018-0001851

An object of the present invention is to provide a small power amplifier capable of providing high output power and increasing the operating bandwidth with a matching circuit including a bond wire and SLC together with a high output transistor chip.

The present invention provides a small power amplifier capable of providing a high output power and improving a second harmonic suppression characteristic while providing a matching circuit including a bond wire and an SLC together with a high power transistor chip. It aims to do.

The compact power amplifier of the present invention for achieving the above object is a first configuration,

In a package configuration comprising a matching circuit comprising a bond wire and SLC together with a high output transistor chip,

It is characterized in that a dual SLC is used as the SLC for the matching circuit, and it is transformed into a Pi-type matching circuit instead of a conventional T-type matching circuit when connecting the bond wires.

In this case, the matching circuit having the characteristics of the present invention may be limited to an output-side matching circuit between a transistor chip and a package output lead wire.

In the present invention, in the Pi type matching circuit, when the dual SLC has two parallel capacitor upper electrodes from the transistor to the output lead wire, connect the transistor output side to the transistor side capacitor upper electrode and a bond wire, and the transistor output side capacitor upper electrode. It can be achieved by connecting the upper electrode of the capacitor on the output lead wire side with a bond wire, and connecting the upper electrode of the capacitor on the output lead wire side to the output lead wire side with a bond wire.

A small power amplifier of another aspect of the present invention for achieving the above object, as a second configuration,

In a package configuration comprising a matching circuit comprising a bond wire and SLC together with a high output transistor chip,

A dual SLC is used as the SLC in the matching circuit, and a secondary harmonic short circuit is further provided when connecting the dual SLC and the bond wires to suppress harmonic frequency components in connecting the bond wires. It characterized in that it is made.

Here too, the matching circuit having the features of the present invention can be specifically limited to the output-side matching circuit between the transistor chip and the package output lead wire.

Here, in order to further include a short circuit for suppressing secondary harmonics, when the dual SLC has two parallel capacitor upper electrodes from the transistor to the output lead wire, the transistor output side passes over the transistor side upper electrode and first the output lead side capacitor top Connect with electrode and bond wire,

It can be made by connecting the capacitor upper electrode on the output lead wire side to the transistor side capacitor upper electrode with a bond wire, and on the other hand with a bond wire to the output lead wire side.

According to the first configuration of the small power amplifier of the present invention, a high output transistor chip is provided with a matching circuit including a bond wire and an SLC, and a high output power can be provided, and the operating bandwidth can be increased.

According to the second configuration of the small power amplifier of the present invention, a high output transistor chip and a matching circuit including a bond wire and an SLC can be provided, and high output power can be provided, and second harmonics suppression characteristics are also provided. Can improve.

1 is a schematic plan view conceptually showing an example of a conventional small power amplifier,
Figure 2 is a schematic side cross-sectional view conceptually showing an example of a conventional small power amplifier,
3 is a circuit diagram showing the configuration from the output side of the transistor of the small power amplifier package of FIGS. 1 and 2 to the package output lead wire as a simple internal matching equivalent circuit;
Figure 4 is a schematic plan view conceptually showing a small power amplifier according to an embodiment of the present invention,
Figure 5 is a schematic side cross-sectional view conceptually showing a small power amplifier according to an embodiment of the present invention,
FIG. 6 is a circuit diagram showing the configuration from the output side of the transistor of the small power amplifier package of FIGS. 4 and 5 to the package output lead wire as a simple equivalent circuit;
7 is a graph showing the effect according to an embodiment of the present invention,
8 is a schematic plan view conceptually showing a small power amplifier according to another embodiment of the present invention;
9 is a schematic side cross-sectional view conceptually showing a small power amplifier according to another embodiment of the present invention,
FIG. 10 is a circuit diagram showing the configuration from the output side of the transistor of the small power amplifier package of FIGS. 8 and 9 to the package output lead wire as a simple equivalent circuit;
11 is a graph showing an effect according to another embodiment of the present invention.

Hereinafter, the present invention will be described in more detail with reference to drawings.

4 and 5, a small power amplifier package using a high-power transistor that shares a significant portion of the conventional and basic elements is disclosed. Capacitor 120, output matching network (OMN) 30, and package lead wire 40 are installed while going to the output side centering on the transistor (TR) die 10, and also going to the input side, the capacitor 50 and input matching (IMN) Network: 60) and the package lead wire 70 are installed symmetrically with the output side. These elements are connected by bond wires.

In the transistor die 10, a high-power transistor that amplifies and outputs power is arranged, and when viewed from the transistor die to the input side, SLC is used as the capacitor 50, and the IMN 60 is matched with the input impedance along with the bond wire and SLC. It forms a circuit and serves as a branch circuit that distributes the input power of the package input lead wire to each arranged transistor.

However, when viewed from the transistor die 10 to the output side, dual SLC (D-SLC: 120) is used as a capacitor instead of a simple SLC. Compared to a conventional SLC with the dielectric layer at the center and both the upper and lower electrodes being integrally formed, the dual SLC has the dielectric layer and the lower electrode intact, while the upper electrode is the transistor die side upper electrode 121 and the package output lead side upper It is made of a separate electrode 123. These separated upper electrodes 121 and 123 are installed side by side.

The OMN 30 forms an output impedance matching circuit together with the bond wire and the dual SLC 120, and integrates the output power of each arranged transistor to transfer the output power to the package output lead wire 40 side.

Here, since the output side uses a dual SLC 120 as a capacitor, the connection configuration of the bond wire also has a difference accordingly.

In this embodiment, the transistor output side (terminal) is connected to the transistor side capacitor upper electrode 121 with a bond wire, and the transistor side capacitor upper electrode 121 is connected to the output lead wire side capacitor upper electrode 123 with a bond wire, The capacitor lead electrode 123 on the output lead wire side is connected to the element on the output lead wire 40 side, directly with the OMN 30 and a bond wire.

This can be seen as a modified form of a Pi-type matching circuit instead of a conventional T-type matching circuit when connecting bond wires as compared to the previous conventional FIGS. 1 and 2.

FIG. 6 is a circuit diagram showing the configuration from the output side of the transistor of the small power amplifier package of FIGS. 4 and 5 to the package output lead wire side as a simple internal matching equivalent circuit.

In comparison with the circuit diagram of FIG. 3, in FIG. 6, a dual SLC 120 in which the upper electrode is divided into two parts is used as a capacitor, and the transistor-side upper electrode 121 and the output lead wire-side upper electrode 123 of the dual SLC are connected. As more bond wires are installed, L3 is further installed between L1 corresponding to a bond wire connecting an existing transistor and a capacitor, and L2 corresponding to a bond wire connecting a capacitor and an output lead wire side.

C1 corresponding to a conventional single capacitor is divided into C1 corresponding to the upper electrode on the transistor side and C2 corresponding to the upper electrode on the lead wire side. The new C1 is located between the positions between L1 and L3 and the board corresponding to ground, and C2 is located between the positions between L3 and L2 and the board corresponding to ground.

In the equivalent circuit as shown in FIG. 6, it is easier to take the Q value of the matching circuit lower than the equivalent circuit configuration as shown in FIG. 3 by the configuration of the capacitors and inductors constituting it, thereby making the frequency of the output matching circuit The bandwidth becomes wider.

Figure 7 is a graph showing the effect according to this embodiment, according to the conventional small output amplifier frequency-output graph, which appeared as a narrow peak at the 3.0 GHz position, according to the small output amplifier of this embodiment, relatively flat for a certain period around 3 GHz You can see that it has been converted to a frequency output graph with the maximum range.

In Fig. 7, m3, m7, and m8 are the output peaks of the conventional graph, the start and end points of the valid output section according to a certain reference, and m2, m5, m6 are the output peaks of the graph according to this embodiment, and the effective output section according to a predetermined reference It represents the start and end points of. The output vertices are displayed as almost overlapping in the prior art and this embodiment, but the output values expressed in dB are different, and the effective output by a certain standard is almost the same level.

And the frequency bandwidth of the effective output section according to a certain criterion according to this embodiment is 3.44 GHz to 2.47 GHz, which is approximately 1 GHz, compared to 3.92 GHz to 2.16 GHz, to approximately 1.8 GHz, 1.8 times much You can see it widened.

Referring to the second embodiment of FIGS. 8 and 9, a small power amplifier package using a high output transistor is disclosed, which is mostly identical in terms of basic components to the first embodiment.

That is, a capacitor, an output matching network (OMN) 30, and a package lead wire 40 are installed while going to the output side around the transistor die 10, and also going to the input side, a capacitor 50 and an input matching network (IMN) 60 And the package lead wire 70 is installed symmetrically with the output side.

A simple SLC is used as the capacitor 50 on the input side, and a dual SLC 120 is used as a capacitor instead of the simple SLC on the output side. That is, the dielectric layer and the lower electrode are the same as the simple SLC, but the upper electrode is separated into the upper electrode 121 on the transistor side and the upper electrode 123 on the output lead wire, and the separated upper electrodes are installed side by side.

However, here, since the output side uses a dual SLC 120 as a capacitor, the connection configuration of the bond wire is different from that of the conventional FIGS. 1 and 2 as well as the previous embodiments of FIGS. 4 and 5. That is, in this second embodiment, the output terminal of the transistor passes over the capacitor upper electrode 121 on the transistor side and is first connected to the output lead wire capacitor upper electrode 123 and a bond wire, and the output lead wire side capacitor upper electrode 123 ) On the one hand and the upper electrode 121 of the capacitor-side capacitor with a bond wire, and on the other hand, it has a bond wire connection form connected with a bond wire on the output lead wire side.

In order to suppress harmonic frequency components, this type of connection configuration may be considered to further install a second harmonic short circuit when connecting a dual SLC and its peripheral components to a bond wire.

FIG. 10 is a circuit diagram showing the configuration from the output side of the transistor of the small power amplifier package of FIGS. 8 and 9 to the package output lead wire as a simple equivalent circuit.

In comparison with the circuit diagram of FIG. 3, in FIG. 10, one more capacitor C1 corresponding to the transistor-side capacitor upper electrode 121 is generated by conversion from simple SLC to dual SLC, and this transistor-side capacitor upper electrode C1 As a bond wire connecting the upper electrode 123 of the capacitor on the output lead wire side is further installed, L1 'corresponding to the bond wire connecting the transistor side and the capacitor C2 in the drawing, and a bond wire connecting the capacitor C2 and the output lead wire side In addition to the path through C2 as a path connecting to the ground substrate at the branch location between L2 corresponding to, a path through C1 is formed in parallel, and L3 corresponding to a new bond wire is further installed between C1 and the branch location.

In the equivalent circuit as shown in FIG. 10, secondary harmonic suppression performance can be achieved by installing a second harmonic short circuit in the matching circuit by the configuration of capacitors and inductors constituting this.

Figure 11 is a graph showing the effect according to this embodiment, from a secondary harmonic point of view, according to the conventional small-scale output amplifier, the frequency-output graph, which appeared at a peak at 3.0 GHz and a gentle low point at the location of 6.0 GHz, is According to the small-sized output amplifier of the embodiment, it can be seen that the low point is dramatically lowered at the same frequency position, so that the secondary harmonic suppression performance is improved by about 57 dB compared to the conventional one and converted into a frequency output graph having a very low output.

In Fig. 7, m3 and m5 represent the peaks and bottoms of the conventional graph, and m4 and m6 represent the peaks and bottoms of the graph according to this embodiment. According to this embodiment, although the output of the vertex is at the same level, the influence of the secondary harmonics is reliably reduced to form a low point at which the output of the low point is clearly distinguished, thereby improving the output efficiency.

In the above, the present invention has been described through limited embodiments, but the present invention is not limited to these specific embodiments, which are merely illustratively described to help understanding of the present invention.

Therefore, a person having ordinary knowledge in the field to which the present invention pertains can make various changes or application examples based on the present invention, and it is natural that such modifications and application examples belong to the appended claims.

Claims (5)

delete delete delete delete In a small power amplifier in the form of a package comprising a matching circuit including a bond wire and an SLC together with a high output transistor chip,
Connect the output lead wires of the high output transistor chip, the SLC, and the package with the bond wire to form an output side matching circuit,
Dual SLC is used as the SLC in the matching circuit on the output side,
When connecting the bond wire, a second harmonic short circuit for suppressing a second harmonic is further provided.
To further include the short circuit for suppressing the second harmonic,
The dual SLC includes two parallel capacitor upper electrodes from the high output transistor chip to the output lead wire side,
The output side of the high output transistor chip passes over the transistor side upper electrode of the dual SLC and is connected to the upper electrode of the output lead wire side of the dual SLC with a bond wire,
The output lead wire side upper electrode is connected to the transistor side capacitor upper electrode on the one hand and a bond wire, and on the other hand, a small power amplifier, characterized in that connected to the output lead wire side of the package.

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