KR102071238B1 - Mother of oganic electro-luminesence display device substate and manufactucring metod of the same - Google Patents

Abstract

The present invention discloses a mother substrate of an organic light emitting display panel and a method of manufacturing the same. A mother substrate of an organic light emitting display panel according to an embodiment of the present invention includes a plurality of organic light emitting display panels including gate pads formed in pad regions, connecting all or part of the gate pads, and connecting the plurality of organic light emitting display panels. And a shorting bar positioned to overlap the cutting line for cutting each unit organic light emitting display panel.
Through this, the present invention can implement a uniform shorting bar workability during the cell cutting process using a laser.

Description

Mother board of organic light emitting display panel and manufacturing method thereof {MOTHER OF OGANIC ELECTRO-LUMINESENCE DISPLAY DEVICE SUBSTATE AND MANUFACTUCRING METOD OF THE SAME}

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a mother substrate of an organic light emitting display panel and a method of manufacturing the same. It is about.

An organic electroluminescence device (OLED) is a device that emits light when excitons formed by a combination of electrons and holes injected into the light emitting layer from each of the electron injection electrode and the hole injection electrode fall from the excited state to the ground state.

In this manner, the organic light emitting diode has a self-luminous property and, unlike a liquid crystal display, does not require a separate light source, thereby reducing thickness and weight. In addition, the organic light emitting display device has high quality characteristics such as low power consumption, high luminance, and high response speed, and thus is considered as a next generation display device of mobile electronic devices. In addition, the organic light emitting device has an advantage of reducing the production cost much more than the conventional liquid crystal display because the manufacturing process is simple.

In the organic light emitting display panel, pixels composed of three color (R, G, B) sub-pixels are arranged in a matrix to display an image. Each sub-pixel includes an organic light emitting diode and a cell driver for driving the organic light emitting diode.

The cell driver includes at least two thin film transistors and a storage capacitor connected between a gate line for supplying a gate signal, a data line for supplying a data signal, and a common power supply line for supplying a common power signal. To drive.

The organic light emitting display panel is formed by forming a plurality of organic light emitting display panels on one mother substrate and then separating them by a scribing process.

1 is a plan view illustrating a mother substrate of a general organic light emitting display panel.

Referring to FIG. 1, in general, the mother substrate 10 of the organic light emitting display panel includes a plurality of organic light emitting display panels arranged in a matrix type, and a shorting bar for preventing static electricity generated during the manufacturing process thereof. 32) and a cutting line 50 for cutting the plurality of organic light emitting display panels into unit panels.

Each of the organic light emitting display panels includes a display area AA for displaying an image and a non-display area NA other than the display area AA, and one side of the non-display area NA is a pad area PA. Is defined as

A gate line, a data line, and a thin film transistor connected thereto are formed in the display area AA, and the pad pad PA includes a gate pad 30 connected to the gate line and a data pad connected to the data line. (Not shown) is formed.

The shorting bar 32 prevents static electricity generated during the manufacturing process of the organic light emitting display panels. Specifically, static electricity is distributed to each gate line or data line to create an equipotential to prevent static electricity. The shorting bar 32 is connected to both the gate pad 30 or the data pad (not shown), and is generally formed at the same time as the gate line or the data line.

The shorting bar 32 exists outside the cutting line 50. In the scribing process, the mother substrate 10 of the organic light emitting display panel is electrically disconnected when being cut into the unit panel along the cutting line 50.

However, when the lower substrate 20 of the mother substrate 10 of the organic light emitting display panel is made of a rigid material such as glass, it may be cleanly cut by a laser method or a wheel scribing method in the final cutting process. In addition, the cutting surface can be cleanly finished by grinding after cutting.

However, when the lower substrate 20 is a flexible substrate, the wheel scribing method cannot be applied due to scribing margin and reliability problems. In addition, the laser cutting method introduced to replace it also causes problems such as cracking of the substrate.

One object of the present invention is to provide a mother substrate of an organic light emitting display panel including a shorting bar for securing reliability of a cell cutting process using a laser and a method of manufacturing the same.

In order to achieve the above technical problem, an aspect of the present invention provides a mother substrate of an organic light emitting display panel. The mother substrate of the organic light emitting display panel includes a plurality of organic light emitting display panels including gate pads formed in pad regions, all or a portion of the gate pads, and each of the plurality of organic light emitting display panels. And a shorting bar positioned to overlap the cutting line for cutting into the organic light emitting display panel.

In order to achieve the above technical problem, another aspect of the present invention provides a method of manufacturing a mother substrate of an organic light emitting display panel. The method of manufacturing a mother substrate of the organic light emitting display panel includes preparing a lower substrate in which a plurality of unit organic light emitting display panel formation regions are defined, forming gate pads in each unit organic light emitting display panel formation region; And forming a shorting bar connecting the gate pads, wherein the shorting bar is positioned to overlap with a cutting line for cutting the plurality of organic light emitting display panels into respective unit organic light emitting display panels.

According to the present invention, it is possible to secure uniform processability in a mother substrate cutting process of an organic light emitting display panel using a laser by improving a shorting bar.

1 is a plan view illustrating a mother substrate of a general organic light emitting display panel.
2A is a plan view illustrating a mother substrate of an organic light emitting display panel according to a first embodiment of the present invention.
FIG. 2B is an enlarged view for explaining a portion C shown in FIG. 2A.
FIG. 2C is a cross-sectional view taken along the line II ′ of FIG. 2A.
FIG. 2D is an enlarged view illustrating an enlarged portion D shown in FIG. 2A.
3A to 3D are cross-sectional views illustrating a method of manufacturing a mother substrate of an organic light emitting display panel according to a first embodiment of the present invention.
4 is a plan view illustrating a mother substrate of an organic light emitting display panel according to a second exemplary embodiment of the present invention.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings illustrating a mother substrate of an organic light emitting display panel and a method of manufacturing the same. The following embodiments are provided as examples to ensure that the spirit of the invention to those skilled in the art will fully convey. Accordingly, the present invention is not limited to the embodiments described below and may be embodied in other forms. In the drawings, the size and thickness of the device may be exaggerated for convenience. Like numbers refer to like elements throughout the specification.

2A is a plan view illustrating a mother substrate of an organic light emitting display panel according to a first embodiment of the present invention.

Referring to FIG. 2A, the mother substrate 100 of the organic light emitting display panel according to the first embodiment uses the flexible substrate as the lower substrate 200. At this time, it is preferable to use polyimide.

The mother substrate 100 of the organic light emitting display panel includes a plurality of organic light emitting display panels arranged in a matrix type, cutting lines 400 for cutting them into respective unit panels, and the plurality of organic light emitting display panels. And a shorting bar 302 for preventing static electricity generated during the manufacturing process of the display panel.

The shorting bar 302 distributes static electricity to each gate line GL to make an equipotential. The shorting bar 302 is connected to all or part of the gate pads 300. The shorting bar 302 may be integrally formed with the gate pad 300 on the same layer, or may be formed on a separate layer. In addition, the shorting bar 302 may be connected to a shorting bar of a neighboring unit panel.

The shorting bar 302 is formed on the cutting line 400. This is to ensure uniform shorting bar workability in the cell cutting process using a laser.

On the other hand, each of the organic light emitting display panel includes a display area AA for displaying an image and a non-display area NA other than the display area AA, and one side of the non-display area NA is a pad area ( PA).

In the display area AA, a plurality of gate lines GL, a data line DL, and a power line PL are formed to cross each other to define a plurality of pixel areas. Each pixel area includes sub pixel areas of red (R), green (G), and blue (B). Each of the red (R), green (G), and blue (B) sub-pixel regions is provided with a cell driver and an organic light emitting diode connected to the cell driver.

A gate pad 300 connected to the gate line GL and a data pad connected to the data line DL are formed in the pad region PA. The gate pads 300 are connected to each other through the shorting bar 302. The data pad (not shown) may also be connected by another shorting bar (not shown).

The cell driver formed in each sub-pixel area of the display area AA includes a switch thin film transistor TS and a driving thin film transistor TD connected thereto. The driving thin film transistor TD serves to drive the organic light emitting diode of the sub-pixel selected by the switch thin film transistor TS.

In detail, the switch thin film transistor TS is connected to the gate line GL and the data line DL. The driving thin film transistor TD is connected to the switch thin film transistor TS, the power line PL, and the organic light emitting diode. The storage capacitor C is connected between the power line PL and the switch thin film transistor TS.

FIG. 2B is an enlarged view for explaining a portion C shown in FIG. 2A. Specifically, it is an enlarged view showing a cell driver formed in each sub pixel area of the display area AA of FIG. 2A and a part of the organic light emitting diode connected to the cell driver.

Referring to FIG. 2B, in the switch thin film transistor TS forming the cell driver, the gate electrode 215 'is branched from the gate line GL, and the source electrode 219a' is branched from the data line DL. The drain electrode 219b 'is connected to the lower electrode 225 of the storage capacitor C.

In the case of the driving thin film transistor TD, the source electrode 219a is branched from the power line PL, the gate electrode 215 is branched from the lower electrode 225 of the storage capacitor C, and the drain electrode 219b. ) Is connected to the first electrode 231 of the organic light emitting diode.

In the case of the storage capacitor C, the upper electrode 229 is branched from the power line PL, and the lower electrode 225 is the drain electrode 219b 'of the switch thin film transistor TS and the driving thin film transistor ( It is connected to the gate electrode 215 of the TD.

When the scan thin film transistor TS is turned on when a scan pulse is supplied to the gate line GL, the switch thin film transistor TS transmits a data signal supplied to the data line DL to the gate electrode of the storage capacitor C and the driving thin film transistor TD. 215). The driving thin film transistor TD controls the amount of light emitted by controlling a current supplied from the power line PL to the organic light emitting diode in response to a data signal supplied to the gate electrode 215. In addition, even when the switch thin film transistor TS is turned off, the driving thin film transistor TD supplies a constant current I until the data signal of the next frame is supplied by the voltage charged in the storage capacitor C. Keeps light emission.

FIG. 2C is a cross-sectional view taken along the line II ′ of FIG. 2A. More specifically, FIG. 2A is a cross-sectional view illustrating a cell driver formed in each sub pixel area of the display area AA, a part of the organic light emitting diode E connected thereto, and the shorting bar 302.

Referring to FIG. 2C, each unit panel constituting the mother substrate 100 (see FIG. 2A) of the organic light emitting display panel according to the first embodiment includes a display area AA and a non-display area NA.

A plurality of pixel areas are defined in the display area AA, and each pixel area includes sub pixel areas of red (R), green (G), and blue (B). Each of the subpixel regions includes a driving thin film transistor TD and an organic light emitting diode E formed thereon and connected to the driving thin film transistor TD.

The driving thin film transistor TD formed in the display area AA includes a buffer layer 201 formed on the entire surface of the lower substrate 200, an active layer 210 formed on the buffer layer 201, and an active layer 210. A gate insulating layer 214 formed on the upper front surface, a gate electrode 215 formed at a position corresponding to the active layer 210 on the gate insulating layer 214, and first and second layers formed on the upper front surface of the gate electrode 215 A second interlayer insulating layer 216 and 217, a source electrode 219a and a drain electrode 219b formed on the second interlayer insulating layer 217.

The active layer 210 includes a source region 213 and a drain region 211 and a channel region 212 connecting therebetween. The gate electrode 215 is specifically formed at a position corresponding to the channel region 212.

The source electrode 219a and the drain electrode 219b are formed of the active layer 210 through the first and second contact holes 218a and 218b formed in the gate insulating layer 214 and the first and second interlayer insulating layers 216 and 217. ). In detail, the source electrode 219a is connected to the source region 213 of the active layer 210 exposed through the first contact hole 218a. The drain electrode 219b is connected to the drain region 211 of the active layer 210 exposed through the second contact hole 218b.

The source electrode 219a is connected to the power line PL. The power line PL controls the current flowing to the organic light emitting diode E through the driving thin film transistor TD, and applies a power supply voltage Vdd to each of a plurality of pixels in common.

As described above, the coplanar structure has been described as the driving thin film transistor TD, but the present invention is not limited thereto. For example, the structure of all the thin film transistors known in the art, for example, an inverted coplanar structure and a zigzag Any of a staggered structure, an inverted staggered structure, and an equivalent structure thereof may be used.

Although not shown, a switch thin film transistor TS (see FIGS. 2A and 2B) is also formed.

The passivation layer 220 and the planarization layer 221 are sequentially formed on the driving thin film transistor TD. The passivation layer 220 and the planarization layer 221 may be formed only in the display area AA. A drain contact hole 230 exposing a portion of the drain electrode 219b is formed in the passivation layer 220 and the planarization layer 221.

The organic light emitting diode E is formed on the planarization layer 221 on which the first electrode 231 and the first electrode 231 are connected to the driving thin film transistor TD through the drain contact hole 230. An organic bank layer 232 formed on the organic bank layer 232 and an organic emission layer 233 formed on the first electrode 231 exposed through an opening formed in the organic bank layer 232. The second electrode 234 is formed on the entire surface of the display area AA. As a result, the driving thin film transistor TD and the organic light emitting diode E are formed in the display area AA. An encapsulation protective film 250 is formed on the second electrode 234.

On the other hand, a gate pad 300 and a data pad (not shown) are formed in the pad area PA, which is part of the non-display area NA. The gate pads 300 are connected to each other through a shorting bar 302.

The shorting bar 302 may be formed on the same layer as the gate pad 300 or may be formed on another layer. The shorting bar 302 is formed on a cutting line 400 for cutting the mother substrate 100 (refer to FIG. 2A) of the organic light emitting display panel into respective unit panels. Due to the shorting bar 302 formed on the cutting line 400, it is possible to ensure uniform shorting bar workability during laser cutting.

FIG. 2D is an enlarged view illustrating an enlarged portion D shown in FIG. 2A. Specifically, it is a perspective view for explaining the relationship between the diameter of the laser L beam and the width of the shorting bar 302.

Referring to FIG. 2D, the diameter a of the laser beam L used in the cell cutting process is equal to or smaller than the width b of the shorting bar 302. This is to allow the laser (L) beam to pass through a uniform area. However, when the diameter (a) of the laser (L) beam is smaller than the width (b) of the shorting bar 302, it must be reciprocated several times. Therefore, the diameter a of the laser beam L and the width b of the shorting bar 302 are preferably the same.

On the other hand, when the diameter (a) of the laser (L) beam is larger than the width (b) of the shorting bar 302, some of the laser (L) beam is the shorting bar 302 and the gate pad 300 (Fig. The shorting bar connecting lines 301 (refer to FIG. 2A) connecting to the second cross section are crossed. In this case, since the area | region through which the laser L beam passes is not uniform, it becomes difficult to obtain uniform shorting bar workability.

The laser L used in the cell cutting process is a CO 2 laser, a UV laser, an excimer laser, a picosecond / femtosecond laser, or the like.

3A to 3D are cross-sectional views illustrating a method of manufacturing a mother substrate of an organic light emitting display panel according to a first embodiment of the present invention.

Referring to FIG. 3A, first, a lower substrate 200 on which a plurality of organic light emitting display panels are to be formed is prepared. Each of the organic light emitting display panels includes a display area AA and a non-display area NA. A plurality of pixel areas are defined in the display area AA, and each pixel area includes sub pixel areas of red (R), green (G), and blue (B).

The lower substrate 200 is a flexible substrate, it is preferable to use a high temperature organic film that does not change properties even at high temperatures. Examples include polyethylene naphthalate (PEN), polyethylene terephthalate (PET), polycarbonate (PC), polyethylene sulfone (PES), transparent polyimide (PI), polyarylate (PAR), polycyclic olefin (PCO) ), Polymethyl methacrylate (PMMA), crosslinking type epoxy (crosslinking type epoxy), crosslinking type urethane film (crosslinking type urethane), and the like. Among them, polyimides are most preferred because they are excellent in mechanical properties and have heat resistance. Such polyimide shows thermal stability even in a high temperature process when the device is later formed on the plastic film.

A buffer layer 201 is formed on an upper front surface of the lower substrate 200. The buffer layer 201 prevents diffusion of impurities in the lower substrate 200 when the active layer 210 or the organic light emitting layer 233 (see FIG. 3D) is formed. An example of the buffer layer 201 is a silicon nitride (SiNx) layer or a multi layer (SiOx / SiNx / SiOx / SiNx / SiOx) formed by alternately stacking silicon nitride (SiNx) and silicon oxide (SiOx).

The driving thin film transistor TD is formed in the display area AA on the buffer layer 201. Although not shown, a switch thin film transistor TS (see FIG. 2A) is also formed. The driving thin film transistor TD includes an active layer 210, a source electrode 219a, a drain electrode 219b, and a gate electrode 215 formed on the buffer layer 201.

The material constituting the active layer 210 is selected from amorphous silicon (a-Si), an oxide semiconductor, an organic semiconductor, and polysilicon.

Thereafter, a gate insulating layer 214 is formed on the entire upper surface of the active layer 210. The gate insulating layer 214 may be formed of any one of an inorganic insulating material, silicon nitride (SiNx) or silicon oxide (SiO 2). In the case of a flexible substrate, it is preferable to form silicon oxide (SiO 2) resistant to bending stress.

The gate electrode 215 is formed at a position corresponding to the active layer 210 on the gate insulating layer 214. In detail, the gate electrode 215 is formed at the center of the active layer 210 through a photolithography process and an etching process after depositing a gate electrode material. The center portion of the active layer 210 corresponds to the channel region 212 described later. The gate electrode material may be a metal, for example, any one selected from MoW, Al, Cr, Ni, AlNd, and Al / Cr.

When the gate electrode 215 is formed, a gate line GL (see FIGS. 2A and 2B) and a gate pad 300 connected thereto are formed together. In addition, the shorting bar connecting line 301 extending from the gate pads 300 and the shorting bar 302 connecting across them are also formed. The shorting bar 302 may be formed on a layer different from the gate electrode 215 and the like.

The shorting bar 302 is formed on a cutting line 400 for cutting the mother substrate 100 (refer to FIG. 2A) of the organic light emitting display panel into respective unit panels. Through this, it is possible to realize uniform shorting bar workability when cutting a cell using a laser.

Thereafter, ions are implanted into the active layer 210. The ion implantation step includes a low concentration region formation step and a high concentration region formation step. In the low concentration region forming step, ion implantation is performed using the gate electrode 215 as a mask. In the forming of the high concentration region, ion implantation is performed using a photoresist pattern exposing portions to be the source and drain regions 213 and 211 as a mask. The low concentration region (not shown) serves to reduce the off current of the driving thin film transistor TD, and the high concentration region becomes the source and drain regions 213 and 211. In addition, a portion where ion implantation is blocked by the gate electrode 215 becomes the channel region 212.

Thereafter, first and second interlayer insulating layers 216 and 217 are formed on the entire upper surface of the gate electrode 215. The first interlayer insulating layer 216 may be silicon oxide (SiO 2), and the second interlayer insulating layer 217 may be silicon nitride (SiNx). Or both may be silicon oxide (SiO 2).

First and second contact holes 218a and 218b are formed in the gate insulating layer 214 and the first and second interlayer insulating layers 216 and 217. The source region 213 of the active layer 210 is exposed through the first contact hole 218a, and the drain region 211 of the active layer 210 is exposed through the second contact hole 218b. The source electrode 219a is connected to the exposed source region 213. The drain electrode 219b is connected to the drain region 211.

When the source and drain electrodes 219a and 219b are formed, a data line (DL, see FIGS. 2A and 2B) and a power line (PL, see FIGS. 2A and 2B) orthogonal to the gate line GL (see FIGS. 2A and 2B). Also formed together.

On the other hand, the source electrode 219a is branched from the power line PL. The power line PL controls the current flowing through the driving thin film transistor TD to the first electrode 231 (see FIG. 3C) of the organic light emitting diode E (see FIG. 3C). The power supply voltage Vdd is commonly applied to each of the plurality of pixels. The source electrode 219a and the drain electrode 219b may be made of metal, for example, Ti / Al or Ti / Al / Ti. The above driving thin film transistor TD is completed.

When the source and drain electrodes 219a and 219b are formed, a data pad (not shown) connected to the data line DL (see FIGS. 2A and 2B) and a power line PL (see FIGS. 2A and 2B) is formed in the pad area PA. C) is formed.

As described above, the coplanar structure has been described as the driving thin film transistor TD, but the present invention is not limited thereto. For example, the structure of all the thin film transistors known in the art, for example, an inverted coplanar structure and a zigzag Any of a staggered structure, an inverted staggered structure, and an equivalent structure thereof may be used.

Referring to FIG. 3B, the passivation layer 220 and the planarization layer 221 are sequentially formed on the display area AA in which the driving thin film transistor TD is formed. The passivation layer 220 and the planarization layer 221 may be formed only in the display area AA as described above to expose the pad area PA. A drain contact hole 230 exposing a part of the drain electrode 219b is formed in the passivation layer 220 and the planarization layer 221.

Referring to FIG. 3C, a first electrode 231 is formed for each pixel on the planarization layer 221. The first electrode 231 is electrically connected to the drain electrode 219b of the driving thin film transistor TD through the drain contact hole 230.

The first electrode 231 is formed through a photolithography process and an etching process after depositing a transparent conductive material. When the first electrode 231 is an anode, indium tin oxide (ITO), indium tin oxide (ITO) / Ag, indium tin oxide (ATO) / ag / ITO, and indium tin oxide (ITO) / ag / IZO (Indium Zinc Oxide) may be any one selected from. Indium Tin Oxide (ITO) is a transparent conductive film having a small hole injection barrier for the organic emission layer 233. However, the material of the first electrode 231 is not limited in the present invention.

Simultaneously with the formation of the first electrode 231, a gate pad terminal (not shown) connected to the gate pad 300 and a data pad terminal (not shown) connected to the data pad (not shown) are formed.

An organic bank layer 232 defining pixels is formed on the planarization layer 221 on which the first electrode 231 is formed. The organic bank layer 232 is formed through a photolithography process and an etching process after depositing an insulating material such as polyimide on the entire surface of the substrate. A portion of the first electrode 231 is exposed by the organic bank layer 232. The organic bank film 232 makes the emission boundary region between the red (R), green (G), and blue (B) pixels clear. In addition, the organic bank layer 232 electrically separates first electrodes (not shown) of adjacent pixels from each other.

The organic emission layer 233 is formed on the first electrode 231 exposed by the organic bank layer 232. The second electrode 234 covering the entire surface of the display area AA is formed on the organic emission layer 233.

On the other hand, the organic light emitting layer 233 is a light emitting layer (EMitting Layer, EML) that electrons and holes meet to form an exciton (Exciton), an electron transport layer (ETL), holes to properly control the movement speed of electrons, holes It may be composed of a hole transport layer (HTL) to properly control the moving speed of. In addition, an electron injection layer (EIL) is formed in the electron transport layer to improve electron injection efficiency, and a hole injection layer (HIL) is improved in the hole transport layer to improve hole injection efficiency. Can be formed.

When the second electrode 234 is a cathode, the second electrode 234 may be selected from Al, MgAg alloy, and MgCa alloy, but is not limited thereto.

As described above, the first electrode 231, the organic emission layer 233, and the second electrode 234 are sequentially formed to complete the organic light emitting diode E.

When voltage is applied between the first and second electrodes 231 and 234 of the organic light emitting diode (E), electrons generated from the second electrode 234 and holes generated from the first electrode 231 are organic light emitting layers. Is moved toward (233). Accordingly, in the organic light emitting layer 233, light is generated by collision of the supplied electrons and holes and recombination. As in the general case, the first electrode 231 is an anode, and the second electrode 234 is a cathode.

In the above process, the driving thin film transistor TD and the organic light emitting diode E are formed in the display area AA, and the gate pad 300 and the data pad (not shown) are cut in the pad area PA. A shorting bar 302 is formed on the line 400 (see FIG. 2A).

Thereafter, an encapsulation protective film 250 covering the entire area except the pad area PA is formed. The material forming the encapsulation protective layer 250 is at least one selected from silicon nitride (SiNx), silicon oxide (Si02), silicon oxynitride (SiON), alumina (Al2O3), and other inorganic materials for preventing moisture permeation.

Thereafter, the mother substrate 100 (see FIG. 2A) of the organic light emitting display panel is cut into respective unit panels along a cutting line 400 (see FIG. 2A) using a laser. Since the shorting bar 302 is positioned on the cutting line 400, the shorting bar 302 is also removed in the cell cutting process. In addition, since the laser does not pass through the shorting bar connecting line 301 and the lower substrate 200 alternately, but only the upper portion of the shorting bar 302, the uniform shorting bar workability may be realized.

4 is a plan view illustrating a mother substrate of an organic light emitting display panel according to a second exemplary embodiment of the present invention. The second embodiment of the present invention has the same configuration as the first embodiment described above except for the shorting bar. Therefore, in the second embodiment of the present invention, repeated description of the first embodiment of the present invention will be omitted, and the same reference numerals are assigned to the same components.

Referring to FIG. 4, the mother substrate of the organic light emitting display panel according to the second embodiment of the present invention includes a gate pad 300 and a gate pad terminal 301 ′ connected thereto. The gate pad terminal 301 'is simultaneously formed when the first electrode 231 (see FIG. 3C) is formed.

And a conductive tape 302 'connected to the gate pad terminal 301'. The conductive tape 302 'is connected to all or a portion of the gate pad terminal 301' and is removed before or after the cell cutting process. The conductive tape 302 'consequently connects the gate pads 300 to serve as a shorting bar.

20, 200: lower substrate 30, 300: gate pad
32, 302: shorting bar 231: first electrode
233: organic light emitting layer 234: second electrode
250: encapsulation protective film 301 ': gate pad terminal
302 ': conductive tape

Claims (8)

A plurality of organic light emitting display panels including a lower substrate and gate pads formed in pad regions of the lower substrate; And
A shorting bar connecting all or a part of the gate pads and overlapping a cutting line for cutting the plurality of organic light emitting display panels into respective unit organic light emitting display panels;
The shorting bar has a width equal to or greater than a diameter of a laser beam used when cutting the plurality of organic light emitting display panels into the unit organic light emitting display panel.
The lower substrate is a flexible substrate including a polyimide, a mother substrate of an organic light emitting display panel.
The method of claim 1,
The shorting bar is formed on the same layer as the gate pad and integrally with the gate pad, the mother substrate of the organic light emitting display panel.
The method of claim 1,
The shorting bar may be formed on a layer different from the gate pad, and the mother substrate of the organic light emitting display panel.
The method of claim 3, wherein
And the shorting bar is a conductive tape connecting all or part of the gate pad terminals connected to the gate pad.


delete Preparing a lower substrate on which a plurality of unit organic light emitting display panels are formed;
Forming gate pads in each unit organic light emitting display panel formation region; And
A shorting bar forming step of connecting the gate pads;
The shorting bar is positioned to overlap with a cutting line for cutting the plurality of organic light emitting display panels into respective unit organic light emitting display panels.
The shorting bar has a width equal to or greater than a diameter of a laser beam used when cutting the plurality of organic light emitting display panels into the unit organic light emitting display panel.
The lower substrate is a flexible substrate including a polyimide, the mother substrate manufacturing method of the organic light emitting display panel, characterized in that.
The method of claim 6,
And the shorting bar is integrally formed with the gate pad at the same time.
The method of claim 6,
And the shorting bar is a conductive tape connecting all or a part of the gate pad terminals connected to the gate pad.

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