KR102068089B1 - Oxide semiconductor thin film transistor, method for fabricating tft, array substrate for display device having tft and method for fabricating the same - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an oxide thin film transistor, a manufacturing method, an array substrate for a display device, and a method for manufacturing the same. A buffer insulating film formed on the semiconductor light blocking film; An oxide semiconductor layer formed on the buffer insulating film; A gate insulating film and a gate electrode stacked on the oxide semiconductor layer; An interlayer insulating layer formed on the buffer insulating layer including the gate electrode and the oxide semiconductor layer and exposing a source region and a drain region of the oxide semiconductor layer, respectively; And a source electrode and a drain electrode formed on the interlayer insulating film and electrically connected to the source region and the drain region, respectively.

Description

OXIDE SEMICONDUCTOR THIN FILM TRANSISTOR, METHOD FOR FABRICATING TFT, ARRAY SUBSTRATE FOR DISPLAY DEVICE HAVING TFT AND METHOD FOR FABRICATING THE SAME}

The present invention relates to a thin film transistor, and more particularly, to an oxide semiconductor thin film transistor, a manufacturing method, an array substrate for a display device having the same, and a manufacturing method thereof.

The largest application in the rapidly growing flat panel display market is TV (Television) products. Currently, liquid crystal displays (LCDs) are mainly used as TV panels, and organic light emitting displays are also being researched for application to TVs.

The current direction of TV display technology is focused on the key items required by the market. The market demands large TV or Digital Information Display (DID), low cost, high definition (video expression power, high resolution, brightness, contrast ratio). , Color reproduction).

In order to meet these requirements, a thin film transistor (TFT) to be used as a display switching and driving device having excellent performance without cost increase with the increase of a substrate such as glass can be seen above all.

Therefore, future technology development should focus on securing TFT manufacturing technology that can produce high-performance display panels at low cost in accordance with this trend.

An amorphous silicon thin film transistor (a-Si TFT), which is typically used as a driving and switching element of a display, is a device widely used as a device that can be uniformly formed on a large substrate of more than 2 m at a low cost.

However, with the trend toward larger displays and higher image quality, device performance is also required, and the existing a-Si TFT with a mobility of 0.5 cm ² / Vs is expected to reach its limit.

Therefore, there is a need for a high performance TFT and a manufacturing technology having higher mobility than a-Si TFT. In addition, a-Si TFTs suffer from reliability problems in that the device characteristics continue to deteriorate as they continue to operate as the greatest weakness and thus cannot maintain their initial performance.

This is the main reason why a-Si TFT is hard to be applied as an organic luminescence display (OLED) that operates by continuously flowing current rather than an AC driven LCD.

Poly-Si TFTs, which have significantly higher performance than amorphous silicon (a-Si) TFTs, have high mobility from tens to hundreds of cm ² / Vs, which makes them difficult to achieve in conventional a-Si TFTs. In addition to the performance that can be applied to the display, the deterioration of device characteristics due to operation compared to a-Si TFT is very small.

However, in order to manufacture such a poly-Si TFT, more processes are required than a-Si TFT, and additional equipment investment must also be preceded.

Therefore, the p-Si TFT is suitable for application to a product such as a high-definition display of the display or OLED, but in terms of cost is inferior to the existing a-Si TFT, the application is inevitably limited.

In particular, in the case of p-Si TFT, due to technical problems such as limitations of manufacturing equipment and poor uniformity, the manufacturing process using a large substrate of more than 1 m has not been realized until now, so that application to TV products is difficult. P-Si TFTs are becoming a factor that makes it difficult to position in the market.

Therefore, the demand for new TFT technology that can take advantage of both the advantages of a-Si TFT (large size, low price, uniformity) and the advantages of poly-Si TFT (high performance, reliability) is greater than ever. There is progress, and the representative one is an oxide semiconductor TFT.

Such oxide semiconductor TFTs have advantages of higher mobility than amorphous silicon (a-Si) TFTs, and simpler manufacturing processes and lower manufacturing costs than polycrystalline silicon (poly-Si) TFTs. High value for use in LCDs and organic light emitting diodes (OLEDs).

Among conventional oxide semiconductor TFTs, an oxide semiconductor transistor having a top gate structure has an advantage of minimizing parasitic capacitance between a gate and a source electrode / drain electrode compared to an etch stopper structure.

An oxide semiconductor thin film transistor structure according to an embodiment of the prior art having a top gate structure having such an advantage will be described with reference to FIGS. 1 and 2 as follows.

1 is a schematic cross-sectional view of an oxide semiconductor thin film transistor structure according to the prior art.

FIG. 2 is a schematic cross-sectional view of an oxide semiconductor thin film transistor according to the related art, and illustrates a state in which external light is reflected from side surfaces of a source electrode and a drain electrode and flows into an oxide semiconductor layer.

As shown in FIG. 1, the oxide semiconductor thin film transistor 10 according to the related art includes a buffer insulating film 13 formed on a substrate 11 and an oxide semiconductor layer 15 formed on the buffer insulating film 13. And a gate insulating film 17 and a gate electrode 19 stacked on the oxide semiconductor layer 15 and on the buffer insulating film 13 including the gate electrode 19 and the oxide semiconductor layer 15. An interlayer insulating film 21 (ILD; Inter-Layer Dielectric) having contact holes (not shown) for exposing the source region 15a and the drain region 15b of the oxide semiconductor layer 15, respectively, A source electrode 23a and a drain electrode 23b formed on the interlayer insulating film 21 and electrically connected to the source region 15a and the drain region 15b, respectively, and the source electrode 23a and the drain electrode. A passivation film 25 formed on the interlayer insulating film 21 including 23b. All.

Here, in the oxide semiconductor transistor 10 having the top gate structure, since the gate electrode 19 is on the oxide semiconductor layer 15, light is irradiated from the bottom of the oxide semiconductor layer 15. Is exposed to.

Therefore, since the oxide semiconductor thin film transistor 10 according to the related art is exposed to light emitted from the channel region 15c of the oxide semiconductor layer 15, the lower light is transmitted to the channel region 15c. The inflow of light by the light is increased so that the light reliability (that is, the negative voltage and the threshold voltage moves in the negative direction when the light comes in) becomes weak.

In addition, in the oxide semiconductor thin film transistor 10 according to the related art, as shown in FIG. 2, light irradiated from the lower side is reflected by the inner side surfaces of the source electrode 23a and the drain electrode 23b so that a channel is provided. The light reliability falls by flowing into the region 15c.

Meanwhile, an oxide semiconductor thin film transistor having a double gate structure according to another embodiment of the prior art will be described with reference to FIG. 3.

3 is a schematic cross-sectional view of an oxide semiconductor thin film transistor having a double gate structure according to another exemplary embodiment of the prior art.

As shown in FIG. 3, an oxide semiconductor thin film transistor 50 having a double gate structure according to another exemplary embodiment of the related art has a buffer insulating layer 53 formed on a substrate 51 and an upper portion of the buffer insulating layer 53. A lower gate insulating layer 57 formed on the lower gate electrode 55, a lower gate insulating layer 57 formed on the buffer insulating layer 53 including the lower gate electrode 55, and the lower gate insulating layer on the lower gate electrode 55 ( An oxide semiconductor layer 59 formed on the substrate 57, an upper gate insulating layer 61 and an upper gate electrode 63 stacked on the oxide semiconductor layer 59, the upper gate electrode 63 and the oxide semiconductor. An interlayer formed on the buffer insulating film 57 including the layer 59 and having contact holes (not shown) for exposing the source region 59a and the drain region 59b of the oxide semiconductor layer 59, respectively. An insulating film 65 (ILD; Inter-Layer Dielectric) and the interlayer A source electrode 67a and a drain electrode 67b formed on the insulating film 65 and electrically connected to the source region 59a and the drain region 59b, respectively, and the source electrode 67a and the drain electrode ( And a passivation film 69 formed on the interlayer insulating film 65 including 67b).

Here, the lower gate electrode 55 is formed to protrude toward the side surface by a width d than the upper gate electrode 63. In this case, the portion of the lower gate electrode 55 corresponding to the width d may overlap the source electrode 67a and the drain electrode 67b to form a parasitic capacitor Cgs.

The oxide semiconductor thin film transistor 50 having the double gate structure is effective in improving device characteristics. In particular, the amount of current increases and the rate of change of current decreases compared to a single-gate oxide semiconductor thin film transistor having the same TFT size, which is advantageous for driving a display device such as an organic light emitting diode (OLED).

In addition, since the lower gate electrode 55 is positioned below the oxide semiconductor layer 59, the channel region 59c is blocked to some extent from being exposed by light emitted from the bottom.

However, as shown in FIG. 3, the light irradiated from the lower side is reflected by the inner side surfaces of the source electrode 67a and the drain electrode 67b and flows into the channel region 59c, thereby degrading optical reliability.

On the other hand, the parasitic capacitor Cgs generated between the lower gate electrode, the source electrode, and the drain electrode may not be reduced due to the overlap between the lower gate electrode and the upper gate electrode of the oxide semiconductor thin film transistor having a double gate structure. As the size of the electrode increases, the design margin of the metallization region decreases, leading to a reduction in the aperture ratio.

SUMMARY OF THE INVENTION The present invention has been made to solve the problems of the prior art, and an object of the present invention is to stack a light blocking film and a semiconductor light blocking film having different refractive indices under the oxide semiconductor thin film transistor, thereby reducing the inflow of light into the channel portion, thereby reducing the light of the device. The present invention provides an oxide semiconductor thin film transistor, a manufacturing method, an array substrate for a display device having the same, and a method of manufacturing the same, which can improve reliability and improve visibility by lowering a reflectance of a back glass substrate.

An oxide semiconductor thin film transistor according to the present invention for achieving the above object is formed on a substrate, a low reflection light blocking film and a semiconductor light blocking film having a larger refractive index than the substrate; A buffer insulating film formed on the semiconductor light blocking film; An oxide semiconductor layer formed on the buffer insulating film; A gate insulating film and a gate electrode stacked on the oxide semiconductor layer; An interlayer insulating layer formed on the buffer insulating layer including the gate electrode and the oxide semiconductor layer and exposing a source region and a drain region of the oxide semiconductor layer, respectively; And a source electrode and a drain electrode formed on the interlayer insulating film and electrically connected to the source region and the drain region, respectively.

According to an aspect of the present invention, there is provided a method of fabricating an oxide semiconductor thin film transistor, the method including: forming a low reflection light blocking film and a semiconductor light blocking film having a larger refractive index than the substrate on a substrate; Forming a buffer insulating film on the semiconductor light blocking film; Forming an oxide semiconductor layer on the buffer insulating film; Forming a gate insulating film and a gate electrode on the oxide semiconductor layer; Forming an interlayer insulating film on the buffer insulating film including the gate electrode and the oxide semiconductor layer to expose a source region and a drain region of the oxide semiconductor layer, respectively; And forming a source electrode and a drain electrode electrically connected to the source and drain regions, respectively, on the interlayer insulating layer.

An array substrate for a display device including an oxide semiconductor thin film transistor according to the present invention for achieving the above object comprises: a low reflection light blocking film and a semiconductor light blocking film formed on a substrate and having a larger refractive index than the substrate; A buffer insulating film formed on the semiconductor light blocking film; An oxide semiconductor layer formed on the buffer insulating film; A gate insulating film and a gate electrode stacked on the oxide semiconductor layer; An interlayer insulating layer formed on the buffer insulating layer including the gate electrode and the oxide semiconductor layer and exposing a source region and a drain region of the oxide semiconductor layer, respectively; A source electrode and a drain electrode formed on the interlayer insulating film and electrically connected to the source and drain regions, respectively; A passivation film formed on the interlayer insulating film including the source electrode and the drain electrode and exposing the drain electrode; And a pixel electrode formed on the passivation film and electrically connected to the drain electrode.

In addition, an array substrate manufacturing method for a display device having an oxide semiconductor thin film transistor according to the present invention for achieving the above object, the step of forming a low reflection light blocking film and a semiconductor light blocking film having a larger refractive index than the substrate on the substrate; ; Forming a buffer insulating film on the semiconductor light blocking film; Forming an oxide semiconductor layer on the buffer insulating film; Forming a gate insulating film and a gate electrode on the oxide semiconductor layer; Forming an interlayer insulating film on the buffer insulating film including the gate electrode and the oxide semiconductor layer to expose a source region and a drain region of the oxide semiconductor layer, respectively; Forming a source electrode and a drain electrode electrically connected to the source region and the drain region, respectively, on the interlayer insulating layer; Forming a passivation film exposing the drain electrode on the interlayer insulating film including the source electrode and the drain electrode; And forming a pixel electrode electrically connected to the drain electrode on the passivation film.

According to the oxide semiconductor thin film transistor according to the present invention, a manufacturing method, an array substrate for a display device having the same, and a manufacturing method thereof have the following effects.

According to the oxide semiconductor thin film transistor according to the present invention, a manufacturing method, an array substrate for a display device having the same, and a method of manufacturing the same, a low reflection light shielding film among a low reflection light blocking film and a semiconductor light blocking film formed under the oxide semiconductor thin film transistor Low reflective materials having a higher refractive index than the substrate, for example, TiO ₂ , ZnS, ZnSe, SiC, TaOx, Al ₂ O ₃ , InGaZnO, SiNx, or a single layer composed of any one of At least ₂ having a low reflection layer composed of any one selected from reflective materials such as TaOx, Al ₂ O ₃ , InGaZnO, and SiNx as a lower layer, and a low reflection layer composed of any one selected from TiO ₂ , ZnS, ZnSe, and SiC as an upper layer. It can also be comprised with a low reflection light shielding film of more than a layer. At this time, in the case where the two or more low reflection layers are configured, the refractive index of the upper low reflection layer has a larger value than that of the lower low reflection layer.

Accordingly, the present invention provides a light reliability film of a device by forming a low reflection light blocking film and a semiconductor light blocking film having a refractive index greater than the refractive index of the substrate and having different refractive indices under the oxide semiconductor thin film transistor so as to block light flowing from the bottom of the oxide semiconductor thin film transistor. Can improve.

In particular, by forming a low reflection light blocking film and a semiconductor light blocking film having a refractive index larger than the refractive index of the substrate and having different refractive indices below the oxide semiconductor thin film transistor, it is possible to block the inflow of the oxide semiconductor layer into the channel region, thereby greatly improving the optical reliability. .

In addition, an oxide semiconductor thin film transistor according to the present invention, a manufacturing method, an array substrate for a display device having the same, and a method for manufacturing the same include a low reflection light blocking film and a semiconductor light blocking film having refractive indices greater than those of a substrate and having different refractive indices. By stacking the transistor under the transistor, the reflectivity of the back surface of the substrate can be reduced to improve visibility.

In addition, the present invention can apply a multi-layered light blocking film having a different refractive index to an oxide semiconductor thin film transistor having a double gate structure, and can reduce overlap between the lower gate electrode and the upper gate electrode of the oxide semiconductor thin film transistor having a double gate structure. The parasitic capacitor Cgs generated between the lower gate electrode, the source electrode, and the drain electrode can be reduced, and the aperture ratio is increased by increasing the design margin of the metallization region due to the size reduction of the lower gate electrode. . In other words. The length of the conductive region can be reduced by the reduction of the overlap between the lower gate electrode and the source electrode / drain electrode, thereby increasing the aperture ratio.

Furthermore, the present invention can apply the low reflection light blocking film and the semiconductor light blocking film having a different refractive index larger than the refractive index of the substrate to the oxide semiconductor thin film transistor of the double gate structure, thereby reducing the length of the conductive region of the lower gate electrode. The on-resistance increases due to the offset resistance decrease.

In addition, the present invention can apply a low reflection light shielding film and a semiconductor light blocking film having different refractive indices greater than the refractive index of the substrate to the oxide semiconductor thin film transistor having a double gate structure, so that the conductorization resistance is reduced when the length of the conductor area is reduced. Therefore, the on current of the device is increased, which is advantageous in terms of device characteristics.

1 is a schematic cross-sectional view of an oxide semiconductor thin film transistor structure according to the prior art.
FIG. 2 is a schematic cross-sectional view of an oxide semiconductor thin film transistor according to the related art, and illustrates a state in which external light is reflected from side surfaces of a source electrode and a drain electrode and flows into an oxide semiconductor layer.
3 is a schematic cross-sectional view of an oxide semiconductor thin film transistor having a double gate structure according to another exemplary embodiment of the prior art.
4 is a schematic cross-sectional view of an oxide semiconductor thin film transistor structure according to an embodiment of the present invention.
5A to 5K are cross-sectional views illustrating a process of manufacturing an oxide semiconductor thin film transistor according to an exemplary embodiment of the present invention.
FIG. 6 is a diagram illustrating a change in reflectance according to a wavelength when an oxide semiconductor thin film transistor according to an exemplary embodiment of the present invention is applied to a multilayer low reflection light blocking film and a semiconductor light blocking film.
7 is a schematic cross-sectional view of an oxide semiconductor thin film transistor having a double gate structure according to another exemplary embodiment of the present invention.
8 is a schematic cross-sectional view of an array substrate for a display device to which an oxide semiconductor thin film transistor according to an exemplary embodiment of the present invention is applied.
9A to 9O are cross-sectional views illustrating a process of manufacturing an array substrate for a display device to which an oxide semiconductor thin film transistor according to an exemplary embodiment of the present invention is applied.

Hereinafter, an oxide semiconductor thin film transistor structure according to an exemplary embodiment of the present invention will be described in detail with reference to the accompanying drawings.

4 is a schematic cross-sectional view of an oxide semiconductor thin film transistor structure according to an embodiment of the present invention.

As illustrated in FIG. 4, the oxide semiconductor thin film transistor 100 according to an embodiment of the present invention is formed on the substrate 101 and has at least one or more low reflection layers having a refractive index greater than that of the substrate 101. A light blocking film 103 and a semiconductor light blocking film 105 having a larger refractive index than the first light blocking film 103; A buffer insulating film 107 formed on the semiconductor light blocking film 105, an oxide semiconductor pattern 109 formed on the buffer insulating film 107, a gate insulating film 113a stacked on the oxide semiconductor pattern 109, and A gate electrode 115a and the buffer insulating layer 107 including the gate electrode 115a and the oxide semiconductor pattern 109 are formed on the source region 109a and the drain region of the oxide semiconductor pattern 109. An interlayer insulating film 119 (ILD; Inter-Layer Dielectric) having contact holes (not shown; refer to 123a and 123b of FIG. 5I) exposing 109b, respectively, and formed on the interlayer insulating film 119, An interlayer insulating layer 119 including a source electrode 125a and a drain electrode 125b electrically connected to the source region 109a and the drain region 109b, respectively, and the source electrode 125a and the drain electrode 125b. And a passivation film 129 formed on it.

Here, the oxide semiconductor thin film transistor 100 according to an embodiment of the present invention includes all of the thin film transistor structures that can be driven including a top gate, a bottom gate method, and the like. In addition, the oxide semiconductor thin film transistor 100 may be applied to a thin film transistor using an etch stop layer and a thin film transistor having a BCE structure.

The thin film transistor 100 according to an embodiment of the present invention is a driving element or switching of a flat panel display such as a liquid crystal display (hereinafter referred to as LCD), an organic luminescence diode (hereinafter referred to as OLED) It can be applied to various electronic devices such as devices or devices for configuring peripheral circuits of memory devices.

The substrate 101 may comprise silicon, glass, plastic or other suitable material. Here, the case where the glass substrate is applied as the substrate will be described as an example.

One or more low reflection light blocking films 103 having a refractive index larger than that of the substrate 101 may be formed of a single layer or at least two layers. In the present invention, a case in which two layers are formed, for example, the first and second low reflection layers 103a and 103b has been described as an example, but is not limited thereto.

The refractive index of the low reflection light blocking film 103 has a larger refractive index than the substrate 101, for example, a value in the range of about 1.51 to 3.0.

In this case, when the low reflection light blocking film 103 is composed of a single layer, the application material may be low reflective materials, for example, TiO ₂ , ZnS, ZnSe, SiC, TaOx, Al ₂ O ₃ , InGaZnO, Any one selected from SiNx may be used. In particular, the low reflection light blocking film 103 may be selected from a group of materials having a refractive index of the substrate 101, for example, a refractive index greater than 1.5, for example, 1.51 to 3.0, and having a low reflectance.

When TiO ₂ is used as the application material of the single layer, the thickness thereof is in the range of about 50 to 2000 mm 3, and preferably in the range of about 300 to 600 mm 3 is appropriate.

In addition, when the low reflection light shielding film 103 is composed of the first and second low reflection layers 103a and 103b of the double layer as shown in FIG. 4, the low reflection light blocking film 103 may be applied to the first low reflection layer 103a. Is a low reflection material, for example, any one selected from TaOx, Al ₂ O ₃ , InGaZnO, SiNx, and the material applied to the second low reflection layer 103b is any one selected from TiO ₂ , ZnS, ZnSe, and SiC. Can also be used. In particular, the low reflection light blocking film 103 may be selected from a group of materials having a refractive index greater than about 1.5, for example, a refractive index of the substrate 101.

In the case where the low reflection light blocking film 103 uses a multilayer, for example, a lower layer, the first low reflection layer 103a, which is a lower layer, uses TaO, and the second low reflection layer 103b uses TiO ₂ . The first low reflection layer 103a has a thickness in the range of about 50 to 2000 microseconds, preferably a thickness in the range of about 200 to 500 microseconds is appropriate, and the second low reflection layer 103b has a thickness in the range of about 50 to 2000 microseconds. Preferably a thickness range of about 200 to 500 mm 3 is appropriate.

On the other hand, the semiconductor light blocking film 105 has a larger refractive index than the substrate 101 and the low reflection light blocking film 103. In this case, the refractive index of the semiconductor light blocking film 105 may have a value ranging from about 2.6 to about 4.5 in the visible light wavelength band.

As an application material of the semiconductor light blocking film 105, a material selected from amorphous silicon, amorphous germanium, and amorphous copper oxide may be used, or nanocrystals of the materials may be used. Nanocrystalline, microcrystalline, polycrystalline, and single crystal states can also be included.

In the case of using amorphous silicon (a-Si) as an application material of the semiconductor light blocking film 105, the thickness thereof is in the range of about 500 to 4000 GPa, and preferably about 2000 GPa or more.

In addition, in the case of using amorphous germanium (a-Ge) as an application material of the semiconductor light blocking film 105, the thickness thereof is in the range of 500 to 4000 GPa, preferably about 1500 GPa or more.

In addition, when amorphous copper oxide is used as an application material of the semiconductor light blocking film 105, the thickness thereof is in a range of about 2000 to 10,000 GPa, and preferably about 5000 GPa or more.

Referring to FIG. 6, when only the semiconductor light blocking film 105 is used, the reflectance is about 30%. However, when the single light reflective light blocking film 103 and the semiconductor light blocking film 105 are used together, In this case, the reflectance was reduced to about 8% or less, and when the double-layer low reflection light blocking film 103 and the semiconductor light blocking film 105 were used together, the reflectance was further reduced to about 5% or less. It can be seen that it appears low.

In addition, the oxide semiconductor pattern 109 including the oxide semiconductor, together with the source region 109a and the drain region 109b which are in contact with the source electrode 125a and the drain electrode 125b, respectively, is provided with the source electrode 125a. And a channel region 109c for forming a channel through which electrons move between the drain electrode 125b and the drain electrode 125b.

The oxide semiconductor pattern 109 formed of the oxide semiconductor is a silicon (Si) -based semiconductor film or an IGZO-based oxide instead of a low temperature polysilicon (LTPS) or an amorphous silicon (a-Si) material. Semiconductor films, compound semiconductors, carbon nano tubes, graphenes and organic semiconductors are used.

In this case, the oxide semiconductor, at least one material selected from the group consisting of germanium (Ge), tin (Sn), lead (Pb), indium (In), titanium (Ti), gallium (Ga) and aluminum (Al). And silicon (Si) added to the oxide semiconductor including zinc (Zn). For example, the oxide semiconductor pattern 109a may be formed of silicon indium zinc oxide (Si-InZnO: SIZO) in which silicon ions are added to indium zinc composite oxide (InZnO).

When the oxide semiconductor pattern 109 is made of SIZO, the composition ratio of silicon (Si) atom content to the total content of zinc (Zn), indium (In), and silicon (Si) atoms in the active layer is about 0.001% by weight (wt %) To about 30 wt%. The higher the silicon (Si) atomic content, the stronger the role of controlling electron generation, so that the mobility may be lower, but the stability of the device may be better.

On the other hand, the oxide semiconductor pattern 109, in addition to the above-described materials, Group I elements such as lithium (Li) or potassium (K), Group II such as magnesium (Mg), calcium (Ca) or strontium (Sr) Element, Group III element such as gallium (Ga), aluminum (Al), indium (In) or yttrium (Y), titanium (Ti), zirconium (Zr), silicon (Si), tin (Sn) or germanium (Ge) Group IV elements such as), tantalum (Ta), vanadium (V), niobium (Nb) or antimony (Sb) Group V elements, or lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), Lanthanum (Ln) -based elements such as ytterbium (Yb) or ruthedium (Lu) may be further included.

In addition, the gate insulating layer 113a may be a silicon (Si) -based oxide film, a nitride film, or a compound including the same, a metal oxide including Al ₂ O ₃ , an organic insulating film, and a low dielectric constant (low −). k) material having a value. For example, the gate insulating film 107 may include silicon oxide (SiO ₂ ), silicon nitride (SiNx), zirconium oxide (ZrO ₂ ), hafnium oxide (HfO ₂ ), titanium oxide (TiO ₂ ), and tantalum oxide ( Ta ₂ O ₅ ), barium-strontium-titanium-oxygen compound (Ba-Sr-Ti-O) and bismuth-zinc-niobium-oxygen compound (Bi-Zn-Nb-O) Or combinations of two or more thereof or other suitable materials.

As the gate electrode 115a, aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), copper alloy, molybdenum (Mo), silver (Ag), silver alloy (Ag alloy) , Gold (Au), gold alloy (Au alloy), chromium (Cr), titanium (Ti), titanium alloy (Ti alloy), molybdenum tungsten (MoW), molybdenum (MoTi), copper / mortitanium (Cu / MoTi It may also comprise at least any one selected from the group of conductive metals, or a combination of two or more thereof, or other suitable material.

The oxide semiconductor pattern 109a formed of the oxide semiconductor is a layer for forming a channel through which electrons move between the source electrode 125a and the drain electrode 125b, and is made of low temperature polysilicon (LTPS). (Si) -based semiconductor film, IGZO-based oxide semiconductor film, compound semiconductor, carbon nano tube, graphene and organic semiconductor instead of amorphous silicon (a-Si) material Use

In this case, the oxide semiconductor, at least one material selected from the group consisting of germanium (Ge), tin (Sn), lead (Pb), indium (In), titanium (Ti), gallium (Ga) and aluminum (Al). And silicon (Si) added to the oxide semiconductor including zinc (Zn). For example, the oxide semiconductor pattern 109 may be formed of silicon indium zinc oxide (Si-InZnO: SIZO) in which silicon ions are added to indium zinc composite oxide (InZnO).

When the oxide semiconductor pattern 109 is made of SIZO, the composition ratio of silicon (Si) atom content to the total content of zinc (Zn), indium (In), and silicon (Si) atoms in the active layer is about 0.001% by weight (wt %) To about 30 wt%. The higher the silicon (Si) atomic content, the stronger the role of controlling electron generation, so that the mobility may be lower, but the stability of the device may be better.

On the other hand, the oxide semiconductor pattern 109, in addition to the above-described materials, Group I elements such as lithium (Li) or potassium (K), Group II such as magnesium (Mg), calcium (Ca) or strontium (Sr) Element, Group III element such as gallium (Ga), aluminum (Al), indium (In) or yttrium (Y), titanium (Ti), zirconium (Zr), silicon (Si), tin (Sn) or germanium (Ge) Group IV elements such as), tantalum (Ta), vanadium (V), niobium (Nb) or antimony (Sb) Group V elements, or lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), Lanthanum (Ln) -based elements such as ytterbium (Yb) or ruthedium (Lu) may be further included.

The source electrode 125a and the drain electrode 125b include aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), copper alloy, molybdenum (Mo), and silver (Ag). , Silver alloy (Ag), gold (Au), gold alloy (Au alloy), chromium (Cr), titanium (Ti), titanium alloy (Ti alloy), molybdenum tungsten (MoW), molybdenum (MoTi), copper It may also comprise at least any one selected from the group of conductive metals including / molitium (Cu / MoTi), or a combination of two or more thereof, or other suitable materials.

As described above, according to the oxide semiconductor thin film transistor according to the present invention, among the low reflection light blocking film and the semiconductor light blocking film formed under the oxide semiconductor thin film transistor, the low reflection light blocking film has a lower refractive index than the substrate, eg For example, it is composed of a single layer composed of any one selected from TiO ₂ , ZnS, ZnSe, SiC, TaOx, Al ₂ O ₃ , InGaZnO, SiNx, or low reflective materials having a higher refractive index than a substrate, for example, TaOx, Al ₂ At least two or more low-reflection light blocking films may be formed of a low reflection layer composed of any one selected from O ₃ , InGaZnO, and SiNx as a lower layer, and a low reflection layer composed of any one selected from TiO ₂ , ZnS, ZnSe, and SiC as an upper layer. . At this time, in the case where the two or more low reflection layers are configured, the refractive index of the upper low reflection layer has a larger value than that of the lower low reflection layer.

Accordingly, the present invention provides a light reliability film of a device by forming a low reflection light blocking film and a semiconductor light blocking film having a refractive index greater than the refractive index of the substrate and having different refractive indices under the oxide semiconductor thin film transistor so as to block light flowing from the bottom of the oxide semiconductor thin film transistor. Can improve.

In particular, by forming a low reflection light blocking film and a semiconductor light blocking film having a refractive index larger than the refractive index of the substrate and having different refractive indices below the oxide semiconductor thin film transistor, it is possible to block the inflow of the oxide semiconductor layer into the channel region, thereby greatly improving the optical reliability. .

In addition, the oxide semiconductor thin film transistor according to the present invention improves visibility by reducing the reflectivity of the back surface of the substrate by stacking a low reflection light shielding film and a semiconductor light blocking film having a different refractive index greater than the refractive index of the substrate under the oxide semiconductor thin film transistor. Can be.

An oxide semiconductor thin film transistor manufacturing method according to an exemplary embodiment of the present invention having the above configuration will be described in detail with reference to FIGS. 5A to 5K.

5A through 5K are cross-sectional views illustrating a process of manufacturing an oxide semiconductor thin film transistor according to an exemplary embodiment of the present invention.

Referring to FIG. 5A, the first low reflection layer 103a and the second low reflection layer 103b having a larger refractive index than the substrate 101 are sequentially stacked on the entire surface of the substrate 101 to form a low reflection light blocking film 103. In this case, the deposition method of the first and second low reflection layers 103a and 103b may be selected from an RF-sputtering method, a DC-sputtering method, a PECVD method, an ALD method, and an evaporation method.

The substrate 101 may comprise silicon, glass, plastic or other suitable material. Here, the case where the glass substrate is applied as the substrate will be described as an example.

One or more low reflection light blocking films 103 having a refractive index larger than that of the substrate 101 may be formed of a single layer or at least two layers. In the present invention, a case in which two layers are formed, for example, the first and second low reflection layers 103a and 103b has been described as an example, but is not limited thereto.

The refractive index of the low reflection light blocking film 103 has a larger refractive index than the substrate 101, for example, a value in the range of about 1.51 to 3.0.

In this case, when the low reflection light blocking film 103 is composed of a single layer, the application material may be low reflective materials, for example, TiO ₂ , ZnS, ZnSe, SiC, TaOx, Al ₂ O ₃ , InGaZnO, Any one selected from SiNx may be used. In particular, the low reflection light blocking film 103 may be selected from a group of materials having a refractive index of the substrate 101, for example, a refractive index greater than 1.5, for example, 1.51 to 3.0, and having a low reflectance.

When TiO ₂ is used as the application material of the single layer, the thickness thereof is in the range of about 50 to 2000 mm 3, and preferably in the range of about 300 to 600 mm 3 is appropriate.

In addition, in the case where the low reflection light shielding film 103 is composed of the first and second low reflection layers 103a and 103b of the double layer, the material for applying the first low reflection layer 103a is a low reflection material, for example For example, any one selected from TaOx, Al ₂ O ₃ , InGaZnO, and SiNx may be used, and as an applied material of the second low reflection layer 103b, any one selected from TiO ₂ , ZnS, ZnSe, and SiC may be used. In particular, the low reflection light blocking film 103 may be selected from a group of materials having a refractive index greater than about 1.5, for example, a refractive index of the substrate 101.

In the case where the low reflection light blocking film 103 uses a multilayer, for example, a lower layer, the first low reflection layer 103a, which is a lower layer, uses TaO, and the second low reflection layer 103b uses TiO ₂ . The first low reflection layer 103a has a thickness in the range of about 50 to 2000 microseconds, preferably a thickness in the range of about 200 to 500 microseconds is appropriate, and the second low reflection layer 103b has a thickness in the range of about 50 to 2000 microseconds. Preferably a thickness range of about 200 to 500 mm 3 is appropriate.

Next, referring to FIG. 5B, a semiconductor light blocking film 105 is formed on the low reflection light blocking film 103. In this case, the deposition method of the first and second low reflection layers 103a and 103b may be selected from an RF-sputtering method, a DC-sputtering method, a PECVD method, an ALD method, and an evaporation method.

The semiconductor light blocking film 105 has a larger refractive index than the substrate 101 and the low reflection light blocking film 103. In this case, the refractive index of the semiconductor light blocking film 105 may have a value ranging from about 2.6 to about 4.5 in the visible light wavelength band.

As an application material of the semiconductor light blocking film 105, a material selected from amorphous silicon, amorphous germanium, and amorphous copper oxide may be used, or nanocrystals of the materials may be used. Nanocrystalline, microcrystalline, polycrystalline, and single crystal states can also be included.

In the case of using amorphous silicon (a-Si) as an application material of the semiconductor light blocking film 105, the thickness thereof is in the range of about 500 to 4000 GPa, and preferably about 2000 GPa or more.

When amorphous copper oxide is used as an application material of the semiconductor light blocking film 105, the thickness thereof is in a range of about 2000 to 10,000 GPa, and preferably about 5000 GPa or more.

In addition, in the case of using amorphous germanium (a-Ge) as an application material of the semiconductor light blocking film 105, the thickness thereof is in the range of 500 to 4000 GPa, preferably about 1500 GPa or more.

Subsequently, referring to FIG. 5C, a buffer insulating film 107 is formed on the semiconductor light blocking film 105.

Next, referring to FIG. 5D, an oxide semiconductor layer 108 is formed on the buffer insulating layer 107. In this case, the oxide semiconductor layer 108 is a layer for forming a channel through which electrons move between a source electrode (not shown) and a drain electrode (not shown), which is referred to as Low Temperature Poly Silicon (LTPS). Instead of the amorphous silicon (a-Si) material, a silicon (Si) -based semiconductor film, an IGZO-based oxide semiconductor film, a compound semiconductor, a carbon nanotube, graphene, and an organic semiconductor are used. do.

In this case, the oxide semiconductor, at least one material selected from the group consisting of germanium (Ge), tin (Sn), lead (Pb), indium (In), titanium (Ti), gallium (Ga) and aluminum (Al). And silicon (Si) added to the oxide semiconductor including zinc (Zn). For example, the active layer 109 may be formed of silicon indium zinc oxide (Si-InZnO: SIZO) in which silicon ions are added to indium zinc complex oxide (InZnO).

When the oxide semiconductor layer 108 is made of SIZO, the composition ratio of silicon (Si) atom content to the total content of zinc (Zn), indium (In), and silicon (Si) atoms in the oxide semiconductor layer is about 0.001% by weight. (wt%) to about 30 wt%. The higher the silicon (Si) atomic content, the stronger the role of controlling electron generation, so that the mobility may be lower, but the stability of the device may be better.

On the other hand, the oxide semiconductor layer 108, in addition to the above-described materials, Group I elements such as lithium (Li) or potassium (K), Group II such as magnesium (Mg), calcium (Ca) or strontium (Sr) Element, Group III elements such as gallium (Ga), aluminum (Al), indium (In) or yttrium (Y), titanium (Ti), zirconium (Zr), silicon (Si), tin (Sn) or germanium (Ge) Group IV elements such as), tantalum (Ta), vanadium (V), niobium (Nb) or antimony (Sb) Group V elements, or lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), Lanthanum (Ln) -based elements such as ytterbium (Yb) or ruthedium (Lu) may be further included.

Subsequently, a first photoresist film (not shown) is coated on the oxide semiconductor layer 108, the first photoresist film is exposed and developed through a first mask process using a photolithography process technology, and then the first photoresist film ( (Not shown) is selectively patterned to form the first photoresist pattern 111.

Next, referring to FIG. 5E, the oxide semiconductor pattern 109 is selectively etched using the photoresist pattern 111 as an etch mask to form an oxide semiconductor pattern 109. In this case, the oxide semiconductor pattern 109 includes a source region 109a, a drain region 109b, and a channel region 109c spaced apart from each other.

Subsequently, referring to FIG. 5F, the first photoresist layer pattern 111 is removed, and the gate insulating layer 113 and the first conductive layer 115 are formed on the buffer insulating layer 107 including the oxide semiconductor pattern 109. Laminate in order. In this case, the gate insulating layer 113 may be a silicon (Si) -based oxide film, a nitride film, or a compound including the same, a metal oxide film including an Al ₂ O ₃ , an organic insulating film, a low dielectric constant (low −). k) material having a value. For example, the gate insulating film 107 may include silicon oxide (SiO ₂ ), silicon nitride (SiNx), zirconium oxide (ZrO ₂ ), hafnium oxide (HfO ₂ ), titanium oxide (TiO ₂ ), and tantalum oxide ( Ta ₂ O ₅ ), barium-strontium-titanium-oxygen compound (Ba-Sr-Ti-O) and bismuth-zinc-niobium-oxygen compound (Bi-Zn-Nb-O) Or combinations of two or more thereof or other suitable materials.

In addition, as the first conductive layer 115, aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), copper alloy, molybdenum (Mo), silver (Ag), silver alloy (Ag alloy), gold (Au), gold alloy (Au alloy), chromium (Cr), titanium (Ti), titanium alloy (Ti alloy), molybdenum tungsten (MoW), molybdenum (MoTi), copper / molity titanium It may also comprise at least any one selected from the group of conductive metals containing (Cu / MoTi) or a combination of two or more thereof or other suitable materials.

Next, a second photoresist film (not shown) is coated on the first conductive layer 115, and is exposed and developed through a second mask process using a photolithography process technology, and then selectively patterned to form a second photoresist film. Pattern 117 is formed.

Subsequently, referring to FIG. 5G, the first conductive layer 115 and the gate insulating layer 113 are selectively etched using the second photoresist layer pattern 117 as an etching mask to form a gate electrode 115a and a gate insulating layer pattern 113a. ).

Next, referring to FIG. 5H, the second photoresist layer pattern 117 is removed and an interlayer insulating layer 119 (ILD) is formed on the entire surface of the substrate including the gate electrode 115a. In this case, the gate insulating layer 119 may be a silicon (Si) -based oxide film, a nitride film, or a compound including the same, a metal oxide film including Al ₂ O ₃ , an organic insulating film, and a low dielectric constant (low −). k) material having a value. For example, the gate insulating film 107 may include silicon oxide (SiO ₂ ), silicon nitride (SiNx), zirconium oxide (ZrO ₂ ), hafnium oxide (HfO ₂ ), titanium oxide (TiO ₂ ), and tantalum oxide ( Ta ₂ O ₅ ), barium-strontium-titanium-oxygen compound (Ba-Sr-Ti-O) and bismuth-zinc-niobium-oxygen compound (Bi-Zn-Nb-O) Or combinations of two or more thereof or other suitable materials.

Subsequently, a third photoresist layer (not shown) is coated on the interlayer insulating layer 119, and is then exposed and developed through a third mask process using a photolithography process technology, and then selectively patterned to form a third photoresist layer pattern 121. ).

Subsequently, referring to FIG. 5I, the interlayer insulating layer 119 is selectively patterned using the third photoresist pattern 121 as an etch mask, so that the source region 109a and the drain region 109b of the oxide semiconductor pattern 109 are formed. ) Are formed to expose source contact holes 123a and drain contact holes 123b, respectively.

Next, referring to FIG. 5J, the second conductive layer 125 may be removed to cover the source region 109a and the drain region 109b on the interlayer insulating layer 119. Deposit.

In this case, as the second conductive layer 125, aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), copper alloy, molybdenum (Mo), silver (Ag), silver alloy (Ag alloy), gold (Au), gold alloy (Au alloy), chromium (Cr), titanium (Ti), titanium alloy (Ti alloy), molybdenum tungsten (MoW), molybdenum (MoTi), copper / molity titanium It may also comprise at least any one selected from the group of conductive metals containing (Cu / MoTi) or a combination of two or more thereof or other suitable materials.

Subsequently, a fourth photoresist film (not shown) is coated on the second conductive layer 125, and the fourth photoresist film (not shown) is exposed and developed through a fourth mask process using a photolithography process technology. The fourth photoresist layer (not shown) may be selectively patterned to form a fourth photoresist layer pattern 127.

Next, referring to FIG. 5K, the second conductive layer 125 is selectively removed by using the fourth photoresist pattern 127 as an etch mask to contact the source region 109a and the drain region 109b, respectively. The source electrode 125a and the drain electrode 125b are formed, respectively.

Subsequently, the passivation layer 129 is formed on the entire surface of the substrate including the source electrode 125a and the drain electrode 125b by removing the fourth photoresist pattern 127 and forming an oxide semiconductor thin film according to an embodiment of the present invention. Complete the transistor manufacturing process.

In this case, the passivation layer 121 may include a silicon (Si) -based oxide layer, a nitride layer, or a compound including the same, a metal oxide layer including an Al ₂ O ₃ , an organic insulating layer, and a low dielectric constant (low −). k) material having a value. For example, the gate insulating film 107 may include silicon oxide (SiO ₂ ), silicon nitride (SiNx), zirconium oxide (ZrO ₂ ), hafnium oxide (HfO ₂ ), titanium oxide (TiO ₂ ), and tantalum oxide ( Ta ₂ O ₅ ), barium-strontium-titanium-oxygen compound (Ba-Sr-Ti-O) and bismuth-zinc-niobium-oxygen compound (Bi-Zn-Nb-O) Or combinations of two or more thereof or other suitable materials.

As described above, according to the method of manufacturing an oxide semiconductor thin film transistor according to the present invention, among the low reflective light blocking film and the semiconductor light blocking film formed under the oxide semiconductor thin film transistor, the low reflective material having a higher refractive index than the substrate is used as the low reflective light blocking film. Low-reflective materials, such as, for example, TiO ₂ , ZnS, ZnSe, SiC, TaOx, Al ₂ O ₃ , InGaZnO, SiNx, or a single layer composed of one of the following, or having a higher refractive index than the substrate, such as TaOx, At least two or more low-reflection light blocking films having a low reflection layer composed of any one selected from Al ₂ O ₃ , InGaZnO, and SiNx as a lower layer, and a low reflection layer composed of any one selected from TiO ₂ , ZnS, ZnSe, and SiC as an upper layer. It may be. At this time, in the case where the two or more low reflection layers are configured, the refractive index of the upper low reflection layer has a larger value than that of the lower low reflection layer.

Accordingly, the present invention provides a light reliability film of a device by forming a low reflection light blocking film and a semiconductor light blocking film having a refractive index greater than the refractive index of the substrate and having different refractive indices under the oxide semiconductor thin film transistor so as to block light flowing from the bottom of the oxide semiconductor thin film transistor. Can improve.

In particular, by forming a low reflection light blocking film and a semiconductor light blocking film having a refractive index larger than the refractive index of the substrate and having different refractive indices below the oxide semiconductor thin film transistor, it is possible to block the inflow of the oxide semiconductor layer into the channel region, thereby greatly improving the optical reliability. .

In addition, the method of manufacturing an oxide semiconductor thin film transistor according to the present invention is to reduce the reflectivity of the back surface of the substrate by laminating a low reflection light blocking film and a semiconductor light blocking film having a different refractive index greater than the refractive index of the substrate under the oxide semiconductor thin film transistor It can be improved.

Meanwhile, a thin film transistor structure having a double gate structure according to another embodiment of the present invention will be described with reference to FIG. 7.

FIG. 7 is a schematic cross-sectional view of a thin film transistor having a double gate structure according to another embodiment of the present invention.

As illustrated in FIG. 7, the thin film transistor 200 having a double gate structure according to another embodiment of the present invention is formed on a substrate 201 and has a refractive index greater than that of the substrate 201. At least one low reflection light blocking film (203) and a semiconductor light blocking film (205) having a larger refractive index than the first light blocking film (203); A lower gate electrode 207 formed on the semiconductor light blocking film 205; The buffer insulating film 209 formed on the semiconductor light blocking film 205 including the lower gate electrode 207, the oxide semiconductor pattern 211 formed on the buffer insulating film 209, and the oxide semiconductor pattern 211. A gate insulating film 213 and a gate electrode 215 stacked on the buffer insulating film 209 including the gate electrode 215 and the oxide semiconductor pattern 211, and formed on the oxide semiconductor pattern 211. An interlayer insulating film 219 (ILD; Inter-Layer Dielectric) having a contact hole (not shown) exposing the source region 211a and the drain region 211b, respectively, and formed on the interlayer insulating film 219, An interlayer insulating layer 219 including a source electrode 22a and a drain electrode 221b electrically connected to the source region 211a and the drain region 211b, and the source electrode 221a and the drain electrode 221b, respectively. And a passivation film 223 formed on it.

Here, the oxide semiconductor thin film transistor 200 according to another embodiment of the present invention includes all of the thin film transistor structure that can be driven including a top gate, a bottom gate method, and the like. In addition, the oxide semiconductor thin film transistor 200 may be applied to a thin film transistor using an etch stop layer and a thin film transistor having a BCE structure.

The thin film transistor 200 according to an embodiment of the present invention is a driving device or switching of a flat panel display such as a liquid crystal display (hereinafter referred to as LCD), an organic light emitting diode (hereinafter referred to as OLED) It can be applied to various electronic devices such as devices or devices for configuring peripheral circuits of memory devices.

The substrate 201 may comprise silicon, glass, plastic or other suitable material. Here, the case where the glass substrate is applied as the substrate will be described as an example.

One or more layers of the low reflection light blocking films 203 having a refractive index larger than that of the substrate 201 may be formed of a single layer or at least two layers. In the present invention, a case in which two layers are formed, for example, the first and second low reflection layers 203a and 203b has been described as an example, but is not limited thereto.

The refractive index of the low reflection light blocking film 203 has a larger refractive index than the substrate 201, for example, a value in the range of about 1.51 to 3.0.

In this case, when the low reflection light blocking film 203 is composed of a single layer, the application material may be low reflective materials, for example, TiO ₂ , ZnS, ZnSe, SiC, TaOx, Al ₂ O ₃ , InGaZnO, Any one selected from SiNx may be used. In particular, the low reflection light blocking film 203 may be selected from a group of materials having a refractive index of the substrate 201, for example, a refractive index greater than 1.5, for example, 1.51 to 3.0, and having a low reflectance.

When TiO ₂ is used as the application material of the single layer, the thickness thereof is in the range of about 50 to 2000 mm 3, and preferably in the range of about 300 to 600 mm 3 is appropriate.

In addition, when the low reflection light shielding film 203 is composed of the first and second low reflection layers 203a and 203b of the double layer, the material for applying the first low reflection layer 203a is a low reflection material, for example For example, any one selected from TaOx, Al ₂ O ₃ , InGaZnO, and SiNx may be used, and one selected from TiO ₂ , ZnS, ZnSe, and SiC may be used as an applied material of the second low reflection layer 203b. In particular, the low reflection light blocking film 203 may be selected from a group of materials having a refractive index greater than about 1.5, for example, a refractive index of the substrate 201.

When the low reflection light blocking film 203 uses a multilayer, for example, a lower layer, the first low reflection layer 203a, which is a lower layer, uses TaO, and the second low reflection layer 203b uses TiO ₂ . The first low reflection layer 203a has a thickness in the range of about 50 to 2000 microseconds, preferably a thickness in the range of about 200 to 500 microseconds is appropriate, and the second low reflection layer 203b has a thickness in the range of about 50 to 2000 microseconds. Preferably a thickness range of about 200 to 500 mm 3 is appropriate.

The semiconductor light blocking film 205 has a larger refractive index than the substrate 201 and the low reflection light blocking film 203. In this case, the refractive index of the semiconductor light blocking film 205 may have a value ranging from about 2.6 to about 4.5 in the visible light wavelength band.

As an application material of the semiconductor light blocking layer 205, a material selected from amorphous silicon, amorphous germanium, and amorphous copper oxide may be used, or nanocrystals of the materials may be used. Nanocrystalline, microcrystalline, polycrystalline, and single crystal states can also be included.

In the case of using amorphous silicon (a-Si) as an application material of the semiconductor light blocking film 205, the thickness thereof is in the range of about 500 to 4000 GPa, and preferably about 2000 GPa or more.

In addition, in the case of using amorphous germanium (a-Ge) as an application material of the semiconductor light blocking film 205, the thickness thereof is in the range of about 500 to 4000 GPa, and preferably about 1500 GPa or more.

In addition, when amorphous copper oxide is used as an application material of the semiconductor light blocking film 205, the thickness thereof is in the range of about 2000 to 10,000 GPa, and preferably about 5000 GPa or more.

In addition, the oxide semiconductor pattern 211 formed of the oxide semiconductor, together with the source region 211a and the drain region 211b in contact with the source electrode 221a and the drain electrode 221b, respectively, is provided with the source electrode 221a. And a channel region 221c for forming a channel through which electrons move between the drain electrode 221b and the drain electrode 221b.

The oxide semiconductor pattern 211 formed of the oxide semiconductor is a silicon (Si) -based semiconductor film or an IGZO-based oxide instead of a low temperature polysilicon (LTPS) or an amorphous silicon (a-Si) material. Semiconductor films, compound semiconductors, carbon nano tubes, graphenes and organic semiconductors are used.

In this case, the oxide semiconductor, at least one material selected from the group consisting of germanium (Ge), tin (Sn), lead (Pb), indium (In), titanium (Ti), gallium (Ga) and aluminum (Al). And silicon (Si) added to the oxide semiconductor including zinc (Zn). For example, the oxide semiconductor pattern 109a may be formed of silicon indium zinc oxide (Si-InZnO: SIZO) in which silicon ions are added to indium zinc composite oxide (InZnO).

When the oxide semiconductor pattern 211 is made of SIZO, the composition ratio of silicon (Si) atom content to the total content of zinc (Zn), indium (In), and silicon (Si) atoms in the active layer is about 0.001% by weight (wt %) To about 30 wt%. The higher the silicon (Si) atomic content, the stronger the role of controlling electron generation, so that the mobility may be lower, but the stability of the device may be better.

On the other hand, the oxide semiconductor pattern 211, in addition to the above-described materials, Group I elements such as lithium (Li) or potassium (K), Group II such as magnesium (Mg), calcium (Ca) or strontium (Sr) Element, Group III element such as gallium (Ga), aluminum (Al), indium (In) or yttrium (Y), titanium (Ti), zirconium (Zr), silicon (Si), tin (Sn) or germanium (Ge) Group IV elements such as), tantalum (Ta), vanadium (V), niobium (Nb) or antimony (Sb) Group V elements, or lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), Lanthanum (Ln) -based elements such as ytterbium (Yb) or ruthedium (Lu) may be further included.

In addition, the gate insulating layer 213 may include a silicon (Si) -based oxide film, a nitride film, or a compound including the same, a metal oxide including Al ₂ O ₃ , an organic insulating film, and a low dielectric constant (low −). k) material having a value. For example, the gate insulating film 107 may include silicon oxide (SiO ₂ ), silicon nitride (SiNx), zirconium oxide (ZrO ₂ ), hafnium oxide (HfO ₂ ), titanium oxide (TiO ₂ ), and tantalum oxide ( Ta ₂ O ₅ ), barium-strontium-titanium-oxygen compound (Ba-Sr-Ti-O) and bismuth-zinc-niobium-oxygen compound (Bi-Zn-Nb-O) Or combinations of two or more thereof or other suitable materials.

The lower gate electrode 207 and the gate electrode 215 may be formed of aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), copper alloy, molybdenum (Mo), or silver. (Ag), silver alloy (Ag alloy), gold (Au), gold alloy (Au alloy), chromium (Cr), titanium (Ti), titanium alloy (Ti alloy), molybdenum tungsten (MoW), molybdenum (MoTi) ), At least one selected from the group of conductive metals including copper / mortitanium (Cu / MoTi), or a combination of two or more thereof, or other suitable materials.

The oxide semiconductor pattern 211 formed of the oxide semiconductor is a layer for forming a channel through which electrons move between the source electrode 221a and the drain electrode 221b, and is formed of low temperature polysilicon (LTPS). (Si) -based semiconductor film, IGZO-based oxide semiconductor film, compound semiconductor, carbon nano tube, graphene and organic semiconductor instead of amorphous silicon (a-Si) material Use

In this case, the oxide semiconductor, at least one material selected from the group consisting of germanium (Ge), tin (Sn), lead (Pb), indium (In), titanium (Ti), gallium (Ga) and aluminum (Al). And silicon (Si) added to the oxide semiconductor including zinc (Zn). For example, the oxide semiconductor pattern 109 may be formed of silicon indium zinc oxide (Si-InZnO: SIZO) in which silicon ions are added to indium zinc composite oxide (InZnO).

When the oxide semiconductor pattern 211 is made of SIZO, the composition ratio of silicon (Si) atom content to the total content of zinc (Zn), indium (In), and silicon (Si) atoms in the active layer is about 0.001% by weight (wt %) To about 30 wt%. The higher the silicon (Si) atomic content, the stronger the role of controlling electron generation, so that the mobility may be lower, but the stability of the device may be better.

On the other hand, the oxide semiconductor pattern 211, in addition to the above-described materials, Group I elements such as lithium (Li) or potassium (K), Group II such as magnesium (Mg), calcium (Ca) or strontium (Sr) Element, Group III element such as gallium (Ga), aluminum (Al), indium (In) or yttrium (Y), titanium (Ti), zirconium (Zr), silicon (Si), tin (Sn) or germanium (Ge) Group IV elements such as), tantalum (Ta), vanadium (V), niobium (Nb) or antimony (Sb) Group V elements, or lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), Lanthanum (Ln) -based elements such as ytterbium (Yb) or ruthedium (Lu) may be further included.

The source electrode 221a and the drain electrode 221b may be aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), copper alloy, molybdenum (Mo), or silver (Ag). , Silver alloy (Ag), gold (Au), gold alloy (Au alloy), chromium (Cr), titanium (Ti), titanium alloy (Ti alloy), molybdenum tungsten (MoW), molybdenum (MoTi), copper It may also comprise at least any one selected from the group of conductive metals including / molitium (Cu / MoTi), or a combination of two or more thereof, or other suitable materials.

As described above, the present invention can apply a multilayer light blocking film having a different refractive index to an oxide semiconductor thin film transistor having a double gate structure, and provides an overlap between the lower gate electrode and the upper gate electrode constituting the oxide semiconductor thin film transistor having a double gate structure. It can reduce the parasitic capacitor (Cgs) generated between the lower gate electrode, the source electrode and the drain electrode, as well as increasing the design margin of the metallization region due to the size reduction of the lower gate electrode Will increase. In other words. The length of the conductive region can be reduced by the reduction of the overlap between the lower gate electrode and the source electrode / drain electrode, thereby increasing the aperture ratio.

Furthermore, the present invention can apply the low reflection light blocking film and the semiconductor light blocking film having a different refractive index larger than the refractive index of the substrate to the oxide semiconductor thin film transistor of the double gate structure, thereby reducing the length of the conductive region of the lower gate electrode. The on-resistance increases due to the offset resistance decrease.

In addition, the present invention can apply a low reflection light shielding film and a semiconductor light blocking film having different refractive indices greater than the refractive index of the substrate to the oxide semiconductor thin film transistor having a double gate structure, so that the conductorization resistance is reduced when the length of the conductor area is reduced. Therefore, the on current of the device is increased, which is advantageous in terms of device characteristics.

In addition, referring to FIG. 8, an array substrate for a display device to which the oxide thin film transistor according to the present invention is applied is as follows.

8 is a schematic cross-sectional view of an array substrate structure for a display device to which an oxide semiconductor thin film transistor according to an exemplary embodiment of the present invention is applied.

As shown in FIG. 8, the display device array substrate 300 to which the oxide semiconductor according to an exemplary embodiment of the present invention is applied is formed on a substrate 301 and has a refractive index greater than that of the substrate 301. At least one low reflection light blocking film 303 and a semiconductor light blocking film 305 having a larger refractive index than the first light blocking film 303; A buffer insulating film 307 formed on the semiconductor light blocking film 305, an oxide semiconductor pattern 309 formed on the buffer insulating film 307, a gate insulating film 313a stacked on the oxide semiconductor pattern 309, and A gate electrode 315a and a buffer insulating layer 307 including the gate electrode 315a and the oxide semiconductor pattern 309 are formed on the source region 309a and the drain region of the oxide semiconductor pattern 309. An interlayer insulating film 319 (ILD; Inter-Layer Dielectric) having contact holes (not shown; refer to 323a and 323b of FIG. 9I) exposing 309b, respectively, and formed on the interlayer insulating film 319, An interlayer insulating layer 319 including a source electrode 325a and a drain electrode 325b electrically connected to the source region 309a and the drain region 309b, respectively, and the source electrode 325a and the drain electrode 325b. And source and drain electrodes 325a and 325b, respectively. The passivation film 329 is exposed and; And a pixel electrode 335a connected to the source electrode 325a and the drain electrode 325b, respectively.

Here, the array substrate 300 for an display device to which the oxide semiconductor is applied according to an exemplary embodiment of the present invention includes all of the thin film transistor structures that can be driven including a top gate, a bottom gate method, and the like. do. In addition, the oxide semiconductor thin film transistor 100 may be applied to a thin film transistor using an etch stop layer and a thin film transistor having a BCE structure.

The array substrate 300 to which the oxide semiconductor according to an embodiment of the present invention is applied may be used for a flat panel display such as a liquid crystal display (hereinafter referred to as LCD) and an organic luminescence diode (hereinafter referred to as OLED). It can be applied to various electronic devices such as a driving device or a switching device, or a device for configuring a peripheral circuit of the memory device.

The substrate 301 may comprise silicon, glass, plastic or other suitable material. Here, the case where the glass substrate is applied as the substrate will be described as an example.

One or more layers of the low reflection light blocking films 303 having a refractive index larger than that of the substrate 301 may be formed of a single layer or at least two layers. In the present invention, a case in which two layers are formed, for example, the first and second low reflection layers 303a and 303b has been described as an example, but is not limited thereto.

The refractive index of the low reflection light blocking film 303 has a larger refractive index than the substrate 301, for example, a value in the range of about 1.51 to 3.0.

In this case, when the low reflection light shielding film 303 is formed of a single layer, the application material may be low reflective materials, for example, TiO ₂ , ZnS, ZnSe, SiC, TaOx, Al ₂ O ₃ , InGaZnO, Any one selected from SiNx may be used. In particular, the low reflection light blocking film 303 may be selected from a group of materials having a refractive index of the substrate 301, for example, a refractive index greater than 1.5, for example, 1.51 to 3.0, and having a low reflectance.

When TiO ₂ is used as the application material of the single layer, the thickness thereof is in the range of about 50 to 2000 mm 3, and preferably in the range of about 300 to 600 mm 3 is appropriate.

In addition, when the low reflection light shielding film 303 is composed of the first and second low reflection layers 303a and 303b of the double layer, a material of the first low reflection layer 303a is a low reflection material, for example For example, any one selected from TaOx, Al ₂ O ₃ , InGaZnO, and SiNx may be used, and one selected from TiO ₂ , ZnS, ZnSe, and SiC may be used as an applied material of the second low reflection layer 303b. In particular, the low reflection light blocking layer 303 may be selected from a group of materials having a refractive index greater than about 1.5, for example, a refractive index of the substrate 301.

The thickness of the first low reflection layer 303a, in which the low reflection light shielding film 303 is a multilayer, for example, a lower layer as an application material of the lower layer, has a thickness in a range of about 50 to 2000 kPa, preferably about 200 to 500 kPa The range is appropriate, and the second low reflection layer 303b has a thickness in the range of about 50 to 2000 mm 3, and preferably in the range of about 200 to 500 mm 3.

The semiconductor light blocking film 305 has a larger refractive index than the substrate 301 and the low reflection light blocking film 303. In this case, the refractive index of the semiconductor light blocking film 305 may have a value ranging from about 2.6 to about 4.5 in the visible light wavelength band.

The semiconductor light blocking layer 305 may be selected from a group of materials including amorphous Si and amorphous Ge, or may be nanocrystalline or microcrystalline of the materials. It may also include polycrystalline, single crystal states.

In the case of using amorphous silicon (a-Si) as an application material of the semiconductor light blocking film 305, the thickness thereof is in the range of about 500 to 4000 GPa, and preferably about 2000 GPa or more.

In addition, in the case of using amorphous germanium (a-Ge) as an application material of the semiconductor light blocking film 305, the thickness thereof is in the range of about 500 to 4000 GPa, and preferably about 1500 GPa or more.

In addition, when amorphous copper oxide is used as an application material of the semiconductor light blocking film 305, the thickness thereof is in a range of about 2000 to 10,000 GPa, and preferably about 5000 GPa or more.

In addition, the oxide semiconductor pattern 309 including the oxide semiconductor includes the source electrode 325a together with the source region 309a and the drain region 309b which respectively contact the source electrode 325a and the drain electrode 325b. And a channel region 309c for forming a channel through which electrons move between the drain electrode 325b and the drain electrode 325b.

The oxide semiconductor pattern 309 including the oxide semiconductor is a silicon (Si) based semiconductor film or an IGZO based oxide instead of a low temperature polysilicon (LTPS) or an amorphous silicon (a-Si) material. Semiconductor films, compound semiconductors, carbon nano tubes, graphenes and organic semiconductors are used.

In this case, the oxide semiconductor, at least one material selected from the group consisting of germanium (Ge), tin (Sn), lead (Pb), indium (In), titanium (Ti), gallium (Ga) and aluminum (Al). And silicon (Si) added to the oxide semiconductor including zinc (Zn). For example, the oxide semiconductor pattern 109a may be formed of silicon indium zinc oxide (Si-InZnO: SIZO) in which silicon ions are added to indium zinc composite oxide (InZnO).

When the oxide semiconductor pattern 309 is made of SIZO, the composition ratio of silicon (Si) atom content to the total content of zinc (Zn), indium (In), and silicon (Si) atoms in the active layer is about 0.001% by weight (wt %) To about 30 wt%. The higher the silicon (Si) atomic content, the stronger the role of controlling electron generation, so that the mobility may be lower, but the stability of the device may be better.

On the other hand, the oxide semiconductor pattern 309, in addition to the above-mentioned materials, Group I elements such as lithium (Li) or potassium (K), Group II such as magnesium (Mg), calcium (Ca) or strontium (Sr) Element, Group III element such as gallium (Ga), aluminum (Al), indium (In) or yttrium (Y), titanium (Ti), zirconium (Zr), silicon (Si), tin (Sn) or germanium (Ge) Group IV elements such as), tantalum (Ta), vanadium (V), niobium (Nb) or antimony (Sb) Group V elements, or lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), Lanthanum (Ln) -based elements such as ytterbium (Yb) or ruthedium (Lu) may be further included.

In addition, the gate insulating layer 313a may be a silicon (Si) based oxide film, a nitride film, or a compound including the same, a metal oxide film including an Al ₂ O ₃ , an organic insulating film, and a low dielectric constant (low −). k) material having a value. For example, the gate insulating film 107 may include silicon oxide (SiO ₂ ), silicon nitride (SiNx), zirconium oxide (ZrO ₂ ), hafnium oxide (HfO ₂ ), titanium oxide (TiO ₂ ), and tantalum oxide ( Ta ₂ O ₅ ), barium-strontium-titanium-oxygen compound (Ba-Sr-Ti-O) and bismuth-zinc-niobium-oxygen compound (Bi-Zn-Nb-O) Or combinations of two or more thereof or other suitable materials.

As the gate electrode 315a, aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), copper alloy, molybdenum (Mo), silver (Ag), silver alloy (Ag alloy) , Gold (Au), gold alloy (Au alloy), chromium (Cr), titanium (Ti), titanium alloy (Ti alloy), molybdenum tungsten (MoW), molybdenum (MoTi), copper / mortitanium (Cu / MoTi It may also comprise at least any one selected from the group of conductive metals, or a combination of two or more thereof, or other suitable material.

In addition, the oxide semiconductor pattern 309a formed of the oxide semiconductor is a layer for forming a channel through which electrons move between the source electrode 325a and the drain electrode 325b, and is made of low temperature polysilicon (LTPS). (Si) -based semiconductor film, IGZO-based oxide semiconductor film, compound semiconductor, carbon nano tube, graphene and organic semiconductor instead of amorphous silicon (a-Si) material Use

In this case, the oxide semiconductor, at least one material selected from the group consisting of germanium (Ge), tin (Sn), lead (Pb), indium (In), titanium (Ti), gallium (Ga) and aluminum (Al). And silicon (Si) added to the oxide semiconductor including zinc (Zn). For example, the oxide semiconductor pattern 109 may be formed of silicon indium zinc oxide (Si-InZnO: SIZO) in which silicon ions are added to indium zinc composite oxide (InZnO).

When the oxide semiconductor pattern 309 is made of SIZO, the composition ratio of silicon (Si) atom content to the total content of zinc (Zn), indium (In), and silicon (Si) atoms in the active layer is about 0.001% by weight (wt %) To about 30 wt%. The higher the silicon (Si) atomic content, the stronger the role of controlling electron generation, so that the mobility may be lower, but the stability of the device may be better.

On the other hand, the oxide semiconductor pattern 309, in addition to the above-mentioned materials, Group I elements such as lithium (Li) or potassium (K), Group II such as magnesium (Mg), calcium (Ca) or strontium (Sr) Element, Group III element such as gallium (Ga), aluminum (Al), indium (In) or yttrium (Y), titanium (Ti), zirconium (Zr), silicon (Si), tin (Sn) or germanium (Ge) Group IV elements such as), tantalum (Ta), vanadium (V), niobium (Nb) or antimony (Sb) Group V elements, or lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), Lanthanum (Ln) -based elements such as ytterbium (Yb) or ruthedium (Lu) may be further included.

The source electrode 325a and the drain electrode 325b include aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), copper alloy, molybdenum (Mo), and silver (Ag). , Silver alloy (Ag), gold (Au), gold alloy (Au alloy), chromium (Cr), titanium (Ti), titanium alloy (Ti alloy), molybdenum tungsten (MoW), molybdenum (MoTi), copper It may also comprise at least any one selected from the group of conductive metals including / molitium (Cu / MoTi), or a combination of two or more thereof, or other suitable materials.

As described above, according to the array substrate for the display device to which the oxide semiconductor according to the present invention is applied, the low reflection light blocking film formed under the oxide semiconductor thin film transistor and the semiconductor light blocking film have a lower refractive index than the substrate. Reflective materials, such as TiO ₂ , ZnS, ZnSe, SiC, TaOx, Al ₂ O ₃ , InGaZnO, consisting of a single layer composed of any one of SiNx, or low reflection materials having a higher refractive index than the substrate, for example For example, at least two or more low reflection light blocking films having a low reflection layer composed of any one selected from TaOx, Al ₂ O ₃ , InGaZnO, and SiNx as a lower layer, and a low reflection layer composed of any one selected from TiO ₂ , ZnS, ZnSe, and SiC as an upper layer. It can also be configured as. At this time, in the case where the two or more low reflection layers are configured, the refractive index of the upper low reflection layer has a larger value than that of the lower low reflection layer.

Accordingly, the present invention provides a light reliability film of a device by forming a low reflection light blocking film and a semiconductor light blocking film having a refractive index greater than the refractive index of the substrate and having different refractive indices under the oxide semiconductor thin film transistor so as to block light flowing from the bottom of the oxide semiconductor thin film transistor. Can improve.

In particular, by forming a low reflection light blocking film and a semiconductor light blocking film having a refractive index larger than the refractive index of the substrate and having different refractive indices below the oxide semiconductor thin film transistor, it is possible to block the inflow of the oxide semiconductor layer into the channel region, thereby greatly improving the optical reliability. .

In addition, the oxide semiconductor thin film transistor according to the present invention improves visibility by reducing the reflectivity of the back surface of the substrate by stacking a low reflection light shielding film and a semiconductor light blocking film having a different refractive index greater than the refractive index of the substrate under the oxide semiconductor thin film transistor. Can be.

An array substrate manufacturing method using an oxide semiconductor according to an exemplary embodiment of the present invention having the above configuration will be described in detail with reference to FIGS. 9A to 9O.

9A to 9O are cross-sectional views illustrating a manufacturing process of an array substrate for a display device to which an oxide semiconductor according to an exemplary embodiment of the present invention is applied.

Referring to FIG. 9A, the first low reflection layer 303a and the second low reflection layer 303b having a larger refractive index than the substrate 301 are sequentially stacked on the entire surface of the substrate 301 to form a low reflection light blocking film 303. In this case, the deposition method of the first and second low reflection layers 303a and 303b may be selected from an RF-sputtering method, a DC-sputtering method, a PECVD method, an ALD method, and an evaporation method.

The substrate 301 may comprise silicon, glass, plastic or other suitable material. Here, the case where the glass substrate is applied as the substrate will be described as an example.

One or more layers of the low reflection light blocking films 303 having a refractive index larger than that of the substrate 301 may be formed of a single layer or at least two layers. In the present invention, a case in which two layers are formed, for example, the first and second low reflection layers 303a and 303b has been described as an example, but is not limited thereto.

The refractive index of the low reflection light blocking film 303 has a larger refractive index than the substrate 301, for example, a value in the range of about 1.51 to 3.0.

In this case, when the low reflection light shielding film 303 is formed of a single layer, the application material may be low reflective materials, for example, TiO ₂ , ZnS, ZnSe, SiC, TaOx, Al ₂ O ₃ , InGaZnO, Any one selected from SiNx may be used. In particular, the low reflection light blocking film 303 may be selected from a group of materials having a refractive index of the substrate 101, for example, a refractive index greater than 1.5, for example, 1.51 to 3.0, and having a low reflectance.

When TiO ₂ is used as the application material of the single layer, the thickness thereof is in the range of about 50 to 2000 mm 3, and preferably in the range of about 300 to 600 mm 3 is appropriate.

In addition, when the low reflection light shielding film 303 is composed of the first and second low reflection layers 303a and 303b of the double layer, a material of the first low reflection layer 303a is a low reflection material, for example For example, any one selected from TaOx, Al ₂ O ₃ , InGaZnO, and SiNx may be used, and one selected from TiO ₂ , ZnS, ZnSe, and SiC may be used as an applied material of the second low reflection layer 303b. In particular, the low reflection light blocking layer 303 may be selected from a group of materials having a refractive index greater than about 1.5, for example, a refractive index of the substrate 301.

When the low reflection light blocking film 303 is a multi-layer, for example, a double layer, the first low reflection layer 303a, which is a lower layer, uses TaO, and the second low reflection layer 303b uses TiO ₂ . The first low reflection layer 303a has a thickness in the range of about 50 to 2000 microseconds, preferably a thickness in the range of about 200 to 500 microseconds is appropriate, and the second low reflection layer 303b has a thickness in the range of about 50 to 2000 microseconds. Preferably a thickness range of about 200 to 500 mm 3 is appropriate.

Next, referring to FIG. 9B, a semiconductor light blocking film 305 is formed on the low reflection light blocking film 303. In this case, the deposition method of the first and second low reflection layers 303a and 303b may be selected from an RF-sputtering method, a DC-sputtering method, a PECVD method, an ALD method, and an evaporation method.

The semiconductor light blocking film 305 has a larger refractive index than the substrate 301 and the low reflection light blocking film 303. In this case, the refractive index of the semiconductor light blocking film 305 may have a value ranging from about 2.6 to about 4.5 in the visible light wavelength band.

As an application material of the semiconductor light blocking layer 305, a material selected from amorphous silicon, amorphous germanium, and amorphous copper oxide may be used, or nanocrystals of the materials may be used. Nanocrystalline, microcrystalline, polycrystalline, and single crystal states can also be included.

In the case of using amorphous silicon (a-Si) as an application material of the semiconductor light blocking film 305, the thickness thereof is in the range of about 500 to 4000 GPa, and preferably about 2000 GPa or more.

In addition, in the case of using amorphous germanium (a-Ge) as an application material of the semiconductor light blocking film 305, the thickness thereof is in the range of about 500 to 4000 GPa, and preferably about 1500 GPa or more.

In addition, when amorphous copper oxide is used as an application material of the semiconductor light blocking film 305, the thickness thereof is in a range of about 2000 to 10,000 GPa, and preferably about 5000 GPa or more.

Next, referring to FIG. 9C, a buffer insulating film 107 is formed on the semiconductor light blocking film 305.

Next, referring to FIG. 9D, an oxide semiconductor layer 308 is formed on the buffer insulating layer 307. In this case, the oxide semiconductor layer 308 is a layer for forming a channel through which electrons move between a source electrode (not shown) and a drain electrode (not shown), and is referred to as Low Temperature Poly Silicon (LTPS). Instead of the amorphous silicon (a-Si) material, a silicon (Si) -based semiconductor film, an IGZO-based oxide semiconductor film, a compound semiconductor, a carbon nanotube, graphene, and an organic semiconductor are used. do.

In this case, the oxide semiconductor, at least one material selected from the group consisting of germanium (Ge), tin (Sn), lead (Pb), indium (In), titanium (Ti), gallium (Ga) and aluminum (Al). And silicon (Si) added to the oxide semiconductor including zinc (Zn). For example, the active layer 109 may be formed of silicon indium zinc oxide (Si-InZnO: SIZO) in which silicon ions are added to indium zinc complex oxide (InZnO).

When the oxide semiconductor layer 308 is made of SIZO, the composition ratio of the silicon (Si) atom content to the total content of zinc (Zn), indium (In), and silicon (Si) atoms in the oxide semiconductor layer is about 0.001% by weight. (wt%) to about 30 wt%. The higher the silicon (Si) atomic content, the stronger the role of controlling electron generation, so that the mobility may be lower, but the stability of the device may be better.

On the other hand, the oxide semiconductor layer 308, in addition to the above-described materials, Group I elements such as lithium (Li) or potassium (K), Group II such as magnesium (Mg), calcium (Ca) or strontium (Sr) Element, Group III elements such as gallium (Ga), aluminum (Al), indium (In) or yttrium (Y), titanium (Ti), zirconium (Zr), silicon (Si), tin (Sn) or germanium (Ge) Group IV elements such as), tantalum (Ta), vanadium (V), niobium (Nb) or antimony (Sb) Group V elements, or lanthanum (La), cerium (Ce), praseodymium (Pr), neodymium (Nd), promethium (Pm), samarium (Sm), europium (Eu), gadolinium (Gd), terbium (Tb), dysprosium (Dy), holmium (Ho), erbium (Er), thulium (Tm), Lanthanum (Ln) -based elements such as ytterbium (Yb) or ruthedium (Lu) may be further included.

Subsequently, a first photoresist film (not shown) is coated on the oxide semiconductor layer 308, the first photoresist film is exposed and developed through a first mask process using a photolithography process technology, and then the first photoresist film ( (Not shown) is selectively patterned to form the first photoresist pattern 111.

Next, referring to FIG. 9E, an oxide semiconductor pattern 309 is formed by selectively etching the oxide semiconductor layer 308 using the photoresist pattern 311 as an etch mask. In this case, the oxide semiconductor pattern 309 includes a source region 309a, a drain region 309b, and a channel region 309c spaced apart from each other.

9F, the first photoresist layer pattern 311 is removed, and the gate insulating layer 313 and the first conductive layer 315 are formed on the buffer insulating layer 307 including the oxide semiconductor pattern 309. Laminate in order. In this case, the gate insulating layer 113 may be a silicon (Si) -based oxide film, a nitride film, or a compound including the same, a metal oxide film including an Al ₂ O ₃ , an organic insulating film, a low dielectric constant (low −). k) material having a value. For example, the gate insulating film 307 may include silicon oxide (SiO ₂ ), silicon nitride (SiNx), zirconium oxide (ZrO ₂ ), hafnium oxide (HfO ₂ ), titanium oxide (TiO ₂ ), and tantalum oxide ( Ta ₂ O ₅ ), barium-strontium-titanium-oxygen compound (Ba-Sr-Ti-O) and bismuth-zinc-niobium-oxygen compound (Bi-Zn-Nb-O) Or combinations of two or more thereof or other suitable materials.

In addition, as the first conductive layer 315, aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), copper alloy, molybdenum (Mo), silver (Ag), silver alloy (Ag alloy), gold (Au), gold alloy (Au alloy), chromium (Cr), titanium (Ti), titanium alloy (Ti alloy), molybdenum tungsten (MoW), molybdenum (MoTi), copper / molity titanium It may also comprise at least any one selected from the group of conductive metals containing (Cu / MoTi) or a combination of two or more thereof or other suitable materials.

Next, a second photoresist film (not shown) is coated on the first conductive layer 315, and the second photoresist film is selectively patterned after exposure and development through a second mask process using a photolithography process technology. Pattern 317 is formed.

Subsequently, referring to FIG. 9G, the first conductive layer 315 and the gate insulating layer 313 are selectively etched using the second photoresist layer pattern 317 as an etching mask to form a gate electrode 315a and a gate insulating layer pattern 113a. ).

Next, referring to FIG. 9H, the second photoresist layer pattern 317 is removed and an interlayer insulating layer 319 (ILD) is formed on the entire surface of the substrate including the gate electrode 315a. In this case, the gate insulating film 319 may be a silicon (Si) -based oxide film, a nitride film, or a compound including the same, a metal oxide film including an Al ₂ O ₃ , an organic insulating film, a low dielectric constant (low −). k) material having a value. For example, the gate insulating film 107 may include silicon oxide (SiO ₂ ), silicon nitride (SiNx), zirconium oxide (ZrO ₂ ), hafnium oxide (HfO ₂ ), titanium oxide (TiO ₂ ), and tantalum oxide ( Ta ₂ O ₅ ), barium-strontium-titanium-oxygen compound (Ba-Sr-Ti-O) and bismuth-zinc-niobium-oxygen compound (Bi-Zn-Nb-O) Or combinations of two or more thereof or other suitable materials.

Subsequently, a third photoresist layer (not shown) is coated on the interlayer insulating layer 319, and is then exposed and developed through a third mask process using a photolithography process technology, and then selectively patterned to form a third photoresist layer pattern 321. ).

Subsequently, referring to FIG. 9I, the interlayer insulating layer 319 is selectively patterned using the third photoresist pattern 321 as an etch mask, so that the source region 309a and the drain region 309b of the oxide semiconductor pattern 309 are formed. ) Are formed to expose source contact holes 323a and drain contact holes 323b, respectively.

Next, referring to FIG. 9J, the second conductive layer 325 may be removed to cover the source region 309a and the drain region 309b on the interlayer insulating layer 319. Deposit.

In this case, as the second conductive layer 325, aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), copper alloy, molybdenum (Mo), silver (Ag), silver alloy (Ag alloy), gold (Au), gold alloy (Au alloy), chromium (Cr), titanium (Ti), titanium alloy (Ti alloy), molybdenum tungsten (MoW), molybdenum (MoTi), copper / molity titanium It may also comprise at least any one selected from the group of conductive metals containing (Cu / MoTi) or a combination of two or more thereof or other suitable materials.

Subsequently, a fourth photoresist film (not shown) is coated on the second conductive layer 325, and the fourth photoresist film (not shown) is exposed and developed through a fourth mask process using a photolithography process technology. The fourth photoresist layer (not shown) may be selectively patterned to form a fourth photoresist layer pattern 327.

Next, referring to FIG. 9K, the second conductive layer 325 is selectively removed by using the fourth photoresist pattern 327 as an etch mask to contact the source region 309a and the drain region 309b, respectively. The source electrode 325a and the drain electrode 325b are formed, respectively.

Subsequently, the fourth photoresist layer pattern 327 is removed, and a passivation layer 329 is formed on the entire surface of the substrate including the source electrode 325a and the drain electrode 325b.

In this case, the passivation film 329 may be a silicon (Si) -based oxide film, a nitride film, or a compound including the same, a metal oxide film including an Al ₂ O ₃ , an organic insulating film, and a low dielectric constant (low −). k) material having a value. For example, the gate insulating film 107 may include silicon oxide (SiO ₂ ), silicon nitride (SiNx), zirconium oxide (ZrO ₂ ), hafnium oxide (HfO ₂ ), titanium oxide (TiO ₂ ), and tantalum oxide ( Ta ₂ O ₅ ), barium-strontium-titanium-oxygen compound (Ba-Sr-Ti-O) and bismuth-zinc-niobium-oxygen compound (Bi-Zn-Nb-O) Or combinations of two or more thereof or other suitable materials.

Next, a fifth photoresist film (not shown) is coated on the passivation film 329, and then selectively patterned through a fifth mask process using a photolithography process technology to form a fifth photoresist pattern 331. .

9M, the passivation layer 329 is selectively removed using the fifth photoresist layer pattern 331 as an etching mask to form a drain electrode contact hole 333 exposing the drain electrode 325b. .

Next, referring to FIG. 9N, the fifth photoresist layer pattern 331 is removed and a transparent conductive layer 335 made of a conductive material selected from transparent conductive materials including ITO is deposited on the passivation film 329. .

Subsequently, a sixth photoresist film (not shown) is coated on the transparent conductive layer 335 and then selectively patterned through a sixth mask process using a photolithography process technology to form a sixth photoresist film pattern 337. .

Subsequently, referring to FIG. 9O, the transparent photoconductive layer 335 is selectively removed by using the sixth photosensitive film pattern 337 as an etch mask to form the pixel electrode 335a connected to the drain electrode 325b. The manufacturing process of the array substrate for display device to which the oxide semiconductor which concerns on this invention is applied is completed.

As described above, according to the method for manufacturing an array substrate for a display device using the oxide semiconductor according to the present invention, a low reflection light blocking film formed of a low reflection light blocking film and a semiconductor light blocking film formed under the oxide semiconductor thin film transistor has a refractive index higher than that of the substrate. Large low reflective materials, for example, a single layer composed of any one selected from TiO ₂ , ZnS, ZnSe, SiC, TaOx, Al ₂ O ₃ , InGaZnO, SiNx, or low reflective materials having a higher refractive index than a substrate, For example, at least two or more low reflection layers including a low reflection layer composed of any one selected from TaOx, Al ₂ O ₃ , InGaZnO, and SiNx as a lower layer, and a low reflection layer composed of any one selected from TiO ₂ , ZnS, ZnSe, and SiC as an upper layer. It can also comprise a light blocking film. At this time, in the case where the two or more low reflection layers are configured, the refractive index of the upper low reflection layer has a larger value than that of the lower low reflection layer.

Accordingly, the present invention provides a light reliability film of a device by forming a low reflection light blocking film and a semiconductor light blocking film having a refractive index greater than the refractive index of the substrate and having different refractive indices under the oxide semiconductor thin film transistor so as to block light flowing from the bottom of the oxide semiconductor thin film transistor. Can improve.

In particular, by forming a low reflection light blocking film and a semiconductor light blocking film having a refractive index larger than the refractive index of the substrate and having different refractive indices below the oxide semiconductor thin film transistor, it is possible to block the inflow of the oxide semiconductor layer into the channel region, thereby greatly improving the optical reliability. .

In addition, in the method of manufacturing an array substrate for a display device using the oxide semiconductor according to the present invention, a low reflectance light blocking film and a semiconductor light blocking film having different refractive indices greater than the refractive index of the substrate are laminated under the oxide semiconductor thin film transistor to reflect the back surface of the substrate. Can be improved to improve visibility.

While many details are set forth in the foregoing description, they should be construed as illustrative of preferred embodiments, rather than to limit the scope of the invention. For example, those of ordinary skill in the art to which the present invention pertains will be able to vary the components of the thin film transistor of the present invention, and the structure may be modified in various forms.

It will be appreciated that the oxide thin film transistor of the present invention can be applied not only to liquid crystal display devices and organic light emitting display devices but also to memory devices and logic devices. Therefore, the scope of the present invention should not be defined by the described embodiments, but should be determined by the technical spirit described in the claims.

100: oxide semiconductor thin film transistor 103a: first low reflection light blocking film
103b: second low reflection light shielding film 103: low reflection light blocking film
105: semiconductor light blocking film 107: buffer insulating film 109: oxide semiconductor pattern 113a: gate insulating film pattern
115a: gate electrode 119: interlayer insulating film
125a: source electrode 125b: drain electrode
129: passivation film

Claims (40)

A low reflection light blocking film and a semiconductor light blocking film formed on a substrate and having a refractive index greater than that of the substrate;
A buffer insulating film formed on the semiconductor light blocking film;
An oxide semiconductor layer formed on the buffer insulating film;
A gate insulating film and a gate electrode stacked on the oxide semiconductor layer;
An interlayer insulating layer formed on the buffer insulating layer including the gate electrode and the oxide semiconductor layer and exposing a source region and a drain region of the oxide semiconductor layer, respectively; And
A source electrode and a drain electrode formed on the interlayer insulating film and electrically connected to the source region and the drain region, respectively;
The low reflection light shielding film is composed of two or more layers, and the refractive index of the upper layer is larger than that of the lower layer. delete delete The oxide semiconductor thin film transistor of claim 1, wherein the semiconductor light blocking film has a refractive index value greater than that of the low reflection light blocking film. delete According to claim 1, wherein the low reflection light blocking film, when used as a double layer, as the lower layer material any one selected from TaOx, Al ₂ O ₃ , InGaZnO, SiNx is a low reflection material, and the upper layer material TiO ₂ , ZnS, ZnSe, SiC any one selected from the oxide semiconductor thin film transistor. delete The oxide semiconductor thin film transistor according to claim 6, wherein TaOx is used as the lower layer, and TiO ₂ is used as the upper layer. delete The oxide semiconductor thin film transistor of claim 1, wherein the semiconductor light blocking layer is selected from a group of materials including amorphous Si, amorphous Ge, and copper oxide. . The oxide semiconductor thin film transistor of claim 1, further comprising a lower gate electrode formed between the semiconductor light blocking film and the buffer insulating film and overlapping the gate electrode. Forming a low reflection light blocking film and a semiconductor light blocking film having a refractive index greater than that of the substrate on the substrate;
Forming a buffer insulating film on the semiconductor light blocking film;
Forming an oxide semiconductor layer on the buffer insulating film;
Forming a gate insulating film and a gate electrode on the oxide semiconductor layer;
Forming an interlayer insulating film on the buffer insulating film including the gate electrode and the oxide semiconductor layer to expose a source region and a drain region of the oxide semiconductor layer, respectively; And
Forming a source electrode and a drain electrode electrically connected to the source region and the drain region, respectively, on the interlayer insulating layer;
The low reflection light shielding film is composed of two or more layers, and the refractive index of the upper layer is larger than that of the lower layer. delete delete The method of claim 12, wherein the semiconductor light blocking film has a refractive index value greater than that of the low reflection light blocking film. delete The low reflection light shielding film of claim 12, wherein when the low reflection light blocking film is used as a double layer, any one selected from TaOx, Al ₂ O ₃ , InGaZnO, and SiNx, which is a low reflection material, is used as the lower layer material, and TiO is used as the upper layer material. ₂ , ZnS, ZnSe, SiC using any one selected from the semiconductor thin film transistor manufacturing method. delete 18. The method of claim 17, wherein TaOx is used as the lower layer, and TiO ₂ is used as the upper layer. delete The oxide semiconductor thin film transistor of claim 12, wherein the semiconductor light blocking layer is selected from a group of materials including amorphous Si, amorphous Ge, and copper oxide. Manufacturing method. The method of claim 12, further comprising forming a lower gate electrode overlapping the gate electrode between the semiconductor light blocking film and the buffer insulating film. A low reflection light blocking film and a semiconductor light blocking film formed on a substrate and having a refractive index greater than that of the substrate;
A buffer insulating film formed on the semiconductor light blocking film; An oxide semiconductor layer formed on the buffer insulating film;
A gate insulating film and a gate electrode stacked on the oxide semiconductor layer;
An interlayer insulating layer formed on the buffer insulating layer including the gate electrode and the oxide semiconductor layer and exposing a source region and a drain region of the oxide semiconductor layer, respectively;
A source electrode and a drain electrode formed on the interlayer insulating film and electrically connected to the source and drain regions, respectively;
A passivation film formed on the interlayer insulating film including the source electrode and the drain electrode and exposing the drain electrode; And
And a pixel electrode formed on the passivation film and electrically connected to the drain electrode.
And the low reflection light shielding film is composed of two or more layers, and the refractive index of the upper layer is larger than that of the lower layer. delete delete 24. The array substrate of claim 23, wherein the semiconductor light blocking film has a refractive index value greater than that of the low reflection light blocking film. delete 24. The method of claim 23, wherein when the low reflection light blocking film is used as a double layer, any one selected from TaOx, Al ₂ O ₃ , InGaZnO, and SiNx, which is a low reflection material, is used as the lower layer material, and TiO is used as the upper layer material. _2. An array substrate for a display device using an oxide semiconductor, wherein any one selected from ₂ , ZnS, ZnSe, and SiC is used. delete 24. The method of claim 23, wherein the semiconductor light blocking film is selected from a group of materials including amorphous silicon (amorphous Si), amorphous germanium (amorphous Ge), amorphous copper oxide (Copper oxide) to apply an oxide semiconductor, characterized in that Array board for display device. Forming a low reflection light blocking film and a semiconductor light blocking film having a refractive index greater than that of the substrate on the substrate;
Forming a buffer insulating film on the semiconductor light blocking film;
Forming an oxide semiconductor layer on the buffer insulating film;
Forming a gate insulating film and a gate electrode on the oxide semiconductor layer;
Forming an interlayer insulating film on the buffer insulating film including the gate electrode and the oxide semiconductor layer to expose a source region and a drain region of the oxide semiconductor layer, respectively;
Forming a source electrode and a drain electrode electrically connected to the source region and the drain region, respectively, on the interlayer insulating layer;
Forming a passivation film exposing the drain electrode on the interlayer insulating film including the source electrode and the drain electrode; And
And forming a pixel electrode on the passivation film, the pixel electrode being electrically connected to the drain electrode.
The low reflection light shielding film is composed of two or more layers, and the refractive index of the upper layer is larger than the refractive index of the lower layer. delete delete 32. The method of claim 31, wherein the semiconductor light blocking film has a refractive index value greater than that of the low reflection light blocking film. delete 32. The method of claim 31, wherein when the low reflection light blocking film is used as a double layer, any one selected from TaOx, Al ₂ O ₃ , InGaZnO, and SiNx, which is a low reflection material, is used as the lower layer material, and TiO is used as the upper layer material. ₂ , ZnS, ZnSe, SiC is a method for manufacturing an array substrate for a display device using an oxide semiconductor, characterized in that using any one. delete 37. The method of claim 36, wherein a thickness of 50 to 2000 mW is used when using TaOx as the lower layer and TiO ₂ as the upper layer. delete 32. The method of claim 31, wherein the semiconductor light blocking film is selected from a group of materials including amorphous silicon (amorphous Si), amorphous germanium (amorphous Ge), amorphous copper oxide (Copper oxide) is used to apply an oxide semiconductor Method of manufacturing array substrate for display device.

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