KR102048102B1

KR102048102B1 - Laminated ceramic electronic component

Info

Publication number: KR102048102B1
Application number: KR1020140177190A
Authority: KR
Inventors: 정진만; 이병화; 나은상
Original assignee: 삼성전기주식회사
Priority date: 2014-12-10
Filing date: 2014-12-10
Publication date: 2019-11-22
Also published as: KR20160070362A

Abstract

The present disclosure includes a ceramic body including a plurality of dielectric layers, the ceramic body having first and second surfaces at both ends in a longitudinal direction thereof; A capacitance forming part disposed to face each other in the ceramic body with the dielectric layer interposed therebetween and including first and second internal electrodes exposed to the first and second surfaces, respectively; A third internal electrode disposed on the capacitor forming part and exposed to the first surface; A fourth internal electrode disposed below the capacitance forming unit and exposed to the second surface; A first external electrode extending from the first surface to a part of the upper surface of the ceramic body and connected to the first internal electrode and the third internal electrode; And a second external electrode extending from the second surface to a part of the lower surface of the ceramic body and connected to the second internal electrode and the fourth internal electrode.

Description

Laminated ceramic electronic component

The present disclosure relates to multilayer ceramic electronic components.

Recently, with the trend of miniaturization of electronic products, multilayer ceramic electronic components are also required to be miniaturized and large in capacity.

Accordingly, when the micro multilayer ceramic electronic component is manufactured, the length and width of the external electrode bands become small, and thus, it is difficult to finally form vias when mounted on the substrate.

In order to solve this problem, a method of forming an external electrode band on the upper and lower surfaces of the ceramic body is used.

In order to form an external electrode band on the upper and lower surfaces of the ceramic body, a dipping process is used, but another method is required to improve the connection of the external electrode.

Korean Unexamined Patent Publication No. 2011-0101910

The present disclosure provides a multilayer ceramic electronic component having a structure capable of eliminating a dipping process in forming an external electrode.

According to one or more exemplary embodiments, a multilayer ceramic electronic component includes a ceramic body including a plurality of dielectric layers and having first and second surfaces at both ends in a length direction thereof; A capacitance forming part disposed to face each other in the ceramic body with the dielectric layer interposed therebetween and including first and second internal electrodes exposed to the first and second surfaces, respectively; A third internal electrode disposed on the capacitor forming part and exposed to the first surface; A fourth internal electrode disposed below the capacitance forming unit and exposed to the second surface; A first external electrode extending from the first surface to a part of the upper surface of the ceramic body and connected to the first internal electrode and the third internal electrode; And a second external electrode extending from the second surface to a part of the lower surface of the ceramic body and connected to the second internal electrode and the fourth internal electrode.

According to the present disclosure, since the third and fourth internal electrodes are respectively formed above and below the capacitance forming unit, the electronic component according to the exemplary embodiment may have a structure capable of eliminating a dipping process in forming the external electrode.

1 is a schematic cross-sectional view of a multilayer ceramic electronic component according to an exemplary embodiment of the present disclosure.
2 is a schematic cross-sectional view of a multilayer ceramic electronic component according to another exemplary embodiment of the present disclosure.

Embodiments of the invention may be modified in many different forms and should not be construed as limited to the embodiments set forth herein. In addition, the embodiments of the present invention are provided to more completely explain the present invention to those skilled in the art. Accordingly, the shape and size of elements in the drawings may be exaggerated for clarity, and the elements denoted by the same reference numerals in the drawings are the same elements.

Hereinafter, for the sake of clarity, the multilayer ceramic capacitor of the multilayer ceramic electronic components will be described.

1 is a schematic cross-sectional view of a multilayer ceramic electronic component according to an exemplary embodiment of the present disclosure.

Referring to FIG. 1, a multilayer ceramic electronic component according to an exemplary embodiment of the present disclosure includes a ceramic body 10 and external electrodes 31 and 32.

The ceramic body 10 is not particularly limited and may have, for example, a rectangular parallelepiped shape.

Meanwhile, in the multilayer ceramic capacitor of the present embodiment, the 'length direction' is defined as the 'L' direction and the 'thickness direction' of FIG. 1 as the 'T' direction. Here, the 'thickness direction' may be used in the same concept as the direction of stacking the dielectric layer, that is, the 'lamination direction'.

Both end portions in the longitudinal direction of the ceramic body 10 are referred to as a first surface 1 and a second surface 2, respectively.

The ceramic body 10 includes a capacitive portion formed with the first and second internal electrodes 21 and 22 and a cover portion disposed above and below the capacitive portion.

The capacitance forming portion and the cover portion are formed by stacking the dielectric layer 11.

The internal electrodes 21, 22, 23, and 24 are printed on the dielectric layer 11, stacked, pressed, and fired to form the ceramic body 10.

In the ceramic body 10, the dielectric layer 11 is integrated to such an extent that the boundary cannot be identified.

The first and second internal electrodes 21 and 22 are not particularly limited, and for example, precious metal materials such as palladium (Pd) and palladium-silver (Pd-Ag) alloys, and nickel (Ni) and copper (Cu) It may be formed using a conductive paste made of one or more of the materials.

The first internal electrode 21 may be exposed to the first surface 1, and may be electrically connected to the first external electrode 31, and the second internal electrode 22 may be exposed to the second surface 2. It may be electrically connected to the second external electrode 32.

Third and fourth internal electrodes 23 and 24 are disposed on the cover parts positioned above and below the capacitor forming part, respectively.

The third and fourth internal electrodes 23 and 24 may be formed in plural as necessary.

For example, the third internal electrode 23 may be positioned on the cover part and exposed to the first surface 1, and the fourth internal electrode 24 may be positioned on the cover part and exposed to the second surface 2. have.

The third internal electrode 23 and the fourth internal electrode 24 do not contribute to the capacitor capacitance formation because they are not disposed opposite each other with the dielectric layer 11 therebetween.

The first external electrode 31 may be disposed on the first surface 1 and may extend to the upper surface of the ceramic body 10.

That is, the first external electrode 31 may be arranged to connect the first and third internal electrodes 21 and 23.

The first external electrode 31 may be formed using electroless plating.

In general, a dipping process is required to form an external electrode. However, in the multilayer ceramic electronic component according to an exemplary embodiment of the present disclosure, the third internal electrode 23 may be formed of the first external electrode 31 by electroless plating. When formed, it does not require an additional dipping process because it serves as a connection terminal.

Therefore, the external electrode can be precisely formed in the desired part compared to the cost reduction and dipping process.

The second external electrode 32 may be disposed on the first surface 2 and may extend to the lower surface of the ceramic body 10.

That is, the second external electrode 32 may be disposed to be connected to the second and fourth internal electrodes 22 and 24.

In addition, the second external electrode 32 may also be formed using electroless plating.

Generally, a dipping process is required to form an external electrode. However, in the multilayer ceramic electronic component according to an exemplary embodiment, the fourth internal electrode 24 may be formed by electroless plating of the second external electrode 32. When formed, it does not require an additional dipping process because it serves as a connection terminal.

As shown in FIG. 1, the first external electrode 31 may extend only to the upper surface of the ceramic body 10, and the second external electrode 32 may extend to only the lower surface of the ceramic body 10. have.

Table 1 below shows whether defects occur in the electroless plating process according to the distances d1 and d2 between the first internal electrodes (second internal electrodes) and the third internal electrodes (fourth internal electrodes) adjacent to each other. .

d1, d2 Bad 5 μm Unplated 4 μm Good 3 μm Good 2 μm Good 1 μm Good

In order for the third and fourth internal electrodes 23 and 24 to serve as connection terminals in the electroless plating process, the third internal electrode 23 is the distance d1 to the adjacent first internal electrodes 21. 1 micrometer or more and 4 micrometers or less, and the 4th internal electrode 24 should have the distance d2 to the adjacent 2nd internal electrode 22 1 micrometer or more and 4 micrometers or less.

The lower limit of d1 (d2) is a limit depending on the thickness of the dielectric layer 11, and when d1 (d2) exceeds 4 µm, there is a problem in that unplating occurs in which no external electrode is formed.

When the length of the first internal electrode 21 is L1, the length of the second internal electrode 22 is L2, the length of the third internal electrode 23 is L3, and the length of the fourth internal electrode 24 is L4. , L3 / L1 is 0.9 to 1.05, L4 / L2 may be 0.9 to 1.05.

The internal electrodes 21 and 22 included in the capacitor forming part are formed to have the maximum area unless a short circuit occurs in the dielectric layer to secure a large capacity. Therefore, when the lengths L3 and L4 of the third internal electrode 23 or the fourth internal electrode 24 exceed 1.05 times the length of the first internal electrode 21 or the second internal electrode 22, a short circuit occurs. It is very likely to occur.

On the contrary, when the lengths L3 and L4 of the third internal electrode 23 or the fourth internal electrode 24 become less than 0.95 times the length of the first internal electrode 21 or the second internal electrode 22, the ceramic Steps may occur during compression of the main body 10 to cause cracks.

Table 2 below shows the occurrence of defects according to the lengths B1 and B2 of the external electrode bands located on the upper or lower surface of the ceramic body and the length A of the multilayer ceramic electronic component.

A B1 (B2) B1 (B2) / A Bad 600 μm 310 μm 0.517 Chip tilt bad (100%) 600 μm 320 μm 0.533 Chip tilt bad (300%) 600 μm 330 μm 0.550 Good 600 μm 340 μm 0.567 Good 600 μm 350 μm 0.583 Good 600 μm 380 μm 0.633 Good 600 μm 410 μm 0.683 Good 600 μm 440 μm 0.733 Good 600 μm 470 μm 0.783 Good 600 μm 500 μm 0.833 Good 600 μm 530 μm 0.883 Good 600 μm 560 μm 0.933 Good 600 μm 570 μm 0.950 Good 600 μm 580 μm 0.967 Short circuit 600 μm 590 μm 0.983 Short circuit

Referring to Table 2, the length of the ceramic body 10 is referred to as A, the length at the top surface of the ceramic body 9 (10) of the first external electrode 31 is referred to as B1, and the second external When the length at the lower surface of the ceramic body 10 of the electrode 932 is B2, the following equation can be satisfied.

0.55 ≤ B1 / A ≤ 0.95 --- Equation (1)

0.55 ≤ B2 / A ≤ 0.95 --- Equation (2)

As shown in equations (1) and (2), when B1 / A (B2 / A) is less than 0.55, the external electrode does not support the ceramic body 1 and the tilt of the red ceramic electronic component occurs.

On the contrary, when B1 / A (B2 / A) is more than 0.95, a problem may occur in that the first and second external electrodes 31 and 32 are shorted to each other.

2 is a schematic cross-sectional view of a multilayer ceramic electronic component according to another exemplary embodiment of the present disclosure.

As shown in FIG. 2, in the multilayer ceramic electronic component according to another exemplary embodiment, the first seed layer 33 is disposed between the top surface of the ceramic body 10 and the first external electrode 31. The second seed layer 33 may be disposed between the bottom surface of the body 10 and the second external electrode 32.

The first seed layer 33 and the second seed layer 34 may be formed of the same material as the inner electrode. When the electroless plating process is performed to form the outer electrode, the outer electrode may be disposed on the upper or lower surface of the ceramic body. Serves to induce extension formation.

It is intended that the invention not be limited by the foregoing embodiments and the accompanying drawings, but rather by the claims appended hereto. Accordingly, various forms of substitution, modification, and alteration may be made by those skilled in the art without departing from the technical spirit of the present invention described in the claims, which are also within the scope of the present invention. something to do.

10: ceramic body
11: dielectric layer
21, 22, 23, 24: internal electrode
31, 32: external electrode
33, 34: seed layer

Claims

A ceramic body including a plurality of dielectric layers, the ceramic body having first and second surfaces at both ends in a longitudinal direction thereof;
A capacitance forming part disposed to face each other in the ceramic body with the dielectric layer interposed therebetween and including first and second internal electrodes exposed to the first and second surfaces, respectively;
A third internal electrode disposed on the capacitor forming part and exposed to the first surface;
A fourth internal electrode disposed below the capacitance forming unit and exposed to the second surface;
A first external electrode extending from the first surface to a part of the upper surface of the ceramic body and connected to the first internal electrode and the third internal electrode; And
And a second external electrode extending from the second surface to a part of the lower surface of the ceramic body and connected to the second internal electrode and the fourth internal electrode.
The first and second external electrodes are formed by electroless plating,
A length of the ceramic body is A, a length at the top surface of the ceramic body of the first external electrode is B1, and a length at the bottom surface of the ceramic body of the second external electrode is B2, 0.55. A multilayer ceramic electronic component satisfying <B1 / A <0.95 and 0.55 <B2 / A <0.95.

delete

The method of claim 1,
A first seed layer is disposed between an upper surface of the ceramic body and the first external electrode,
The multilayer ceramic electronic component having a second seed layer disposed between the lower surface of the ceramic body and the second external electrode.

The method of claim 1,
The distance between the first internal electrode and the third internal electrode adjacent to each other disposed on the uppermost layer of the capacitor forming part is 1 μm or more and 4 μm or less
The multilayer ceramic electronic component having a distance between the second internal electrode and the fourth internal electrode adjacent to the lowermost layer of the capacitor forming part is 1 μm or more and 4 μm or less.

The method of claim 1,
When the length of the first internal electrode is L1, the length of the second internal electrode is L2, the length of the third internal electrode is L3, and the length of the fourth internal electrode is L4,
L3 / L1 is 0.95 to 1.05,
L4 / L2 is 0.95 to 1.05 laminated ceramic electronic component.

delete

The method of claim 1,
The plurality of third and fourth internal electrodes are formed.

The method of claim 1,
The first external electrode extends only on an upper surface of the ceramic body,
The second external electrode extends and is disposed only on the bottom surface of the ceramic body.