KR102046127B1 - Method of manufacturing vertical thin film transistor - Google Patents

Abstract

The present invention relates to a method of manufacturing a vertical structure thin film transistor, and more particularly, by oxidizing the interface of the metal electrode through heat treatment to form a gate insulating film, a separate insulating material is not required to form the gate insulating film as conventionally. The present invention relates to a method of manufacturing a vertical thin film transistor capable of significantly thinning an insulating film and significantly shortening a channel length.

Description

Method of manufacturing vertical thin film transistor

The present invention relates to a method of manufacturing a vertical structure thin film transistor, and more particularly, by oxidizing the interface of the metal electrode through heat treatment to form a gate insulating film, a separate insulating material is not required to form the gate insulating film as conventionally. The present invention relates to a method of manufacturing a vertical structure thin film transistor capable of significantly thinning an insulating film and significantly shortening a channel length.

The development of the electronics industry and the development of integrated circuits are making advances in the electronics industry, but the power consumption is increasing exponentially with the increase of the density and the operation speed. Furnace has wearable, bio sensor platform, etc., and low power consumption is required in application field of thin film transistor, so it is necessary to lower power of thin film transistor.

In addition, in the case of the energy harvesting coupling type using ambient energy such as bioenergy, even lower power consumption is required and the operating voltage of the thin film transistor should be lowered. Since transistors operate at a lower driving voltage as the thickness of the insulating film becomes thinner, there is an urgent need to develop a low-voltage, high-performance thin film transistor having a thin insulating film and a short channel length.

The present invention has been made in view of the above problems, and an object of the present invention is to oxidize a gate electrode using an interfacial oxidation through heat treatment and to use it as an insulating film, thereby enabling a very thin insulating film and significantly shortening a channel length. It is to provide a method of manufacturing a vertical structure thin film transistor capable of (nm-size).

According to an aspect of the present invention, there is provided a method of manufacturing a vertical structure thin film transistor, the method including: forming and sequentially forming a first oxide electrode, a metal electrode, and a second oxide electrode on a substrate; Depositing and patterning an oxide semiconductor outside the first oxide electrode, the metal electrode, and the second oxide electrode to form an active layer on a side of the metal electrode; And a third step of forming a gate insulating film by oxidizing an interface of the metal electrode through heat treatment.

Here, before the second step, after forming the second oxide electrode, performing a step of etching one end of the metal electrode by using a self-alignment to the one end of the second oxide electrode and the metal electrode It is preferable that one end portion is in a straight line.

The first step may include forming a first conductive thin film on the substrate; Patterning the first conductive thin film to form a first oxide electrode; Forming a metal thin film for forming a metal electrode on the first oxide electrode; Patterning the metal thin film to form a metal electrode; Forming a second conductive thin film on the metal electrode; And patterning the second conductive thin film to form a second oxide electrode.

In addition, the forming of the metal thin film may include depositing a metal thin film on the patterned first oxide electrode and the exposed substrate, and forming the second conductive thin film may include: forming an upper outer edge of the substrate exposed upward; Preferably, the conductive thin film is formed by depositing a conductive thin film on one side of the upper surface of the first oxide electrode and the upper side of the metal electrode.

The first step may include forming a first conductive thin film on the substrate; patterning the first conductive thin film to form a first oxide electrode; Forming a first insulating film on the patterned first oxide electrode; Forming a metal thin film for forming a metal electrode on the first insulating film; Patterning the first insulating film and the metal thin film to form a metal electrode; Forming a second insulating film on the patterned metal electrode; Forming a second conductive thin film on the second insulating film; And patterning the second conductive thin film to form a second oxide electrode.

Further, in the forming of the first insulating film, a first insulating film is formed on the patterned first oxide electrode and the exposed substrate, and in the forming of the second insulating film, the patterned metal electrode and the exposed Preferably, the second insulating film is formed over the entire substrate.

In the formation of the first oxide electrode, the metal electrode, and the second oxide electrode, a shadow mask is disposed on a substrate to form an electrode pattern.

The second step may include depositing an oxide semiconductor on one side of an upper surface of the first oxide electrode, an end surface of one side of the metal electrode, and an entire upper surface and side surfaces of the second oxide electrode; And patterning the oxide semiconductor to form one side of the upper surface of the first oxide electrode, one end surface of the metal electrode, and one side surface of the second oxide electrode in line with the one end surface of the metal electrode, and the second oxide. It is preferred to include the step of forming the active layer over a portion of the upper side of the electrode.

In addition, in the third step, the gate insulating layer may be formed between the metal electrode, the first and second oxide electrodes, and the active layer by oxidizing along the entire interface of the metal electrode.

In addition, in the third step, the gate insulating layer may be formed only between the metal electrode and the channel by interfacial oxidation by oxidizing an interface of one side of the metal electrode.

The first oxide electrode may be a source or drain electrode, the metal electrode may be a gate electrode, and the second oxide electrode may be a drain or source electrode.

In addition, the first and second oxide electrodes are made of indium tin oxide (ITO) or aluminum zinc oxide (AZO), which are conductive oxides, and the metal electrode may be any one of Cs, Al, Ti, and Mo.

In addition, the deposition and patterning of the electrode and the oxide semiconductor in the first and second steps may be any one of sputtering, chemical vapor deposition, physical vapor deposition, atomic layer deposition, electron beam deposition, and evaporation. have.

According to the manufacturing method of the vertical structure thin film transistor according to the present invention, the gate insulating film is formed by oxidizing the interface of the metal electrode through heat treatment, so that a separate insulating material is not required to form the gate insulating film as conventionally. A very thin insulating film is possible, which simplifies the insulating film forming process and has an effect of significantly reducing the manufacturing cost.

In addition, the vertical thin film transistor can reduce the size compared to the planar thin film transistor to improve the display aperture ratio, and has the advantage that low power and low voltage driving can be performed by the thickness of the short channel and the thin insulating film.

1A to 1J are process diagrams sequentially illustrating a method of manufacturing a vertical structure thin film transistor according to an exemplary embodiment of the present invention.
2A to 2I are process diagrams sequentially illustrating a method of manufacturing a vertical structure thin film transistor according to another exemplary embodiment of the present invention.

The present invention can be embodied in many other forms without departing from the spirit or main features thereof. Therefore, the embodiments of the present invention are merely examples in all respects and should not be interpreted limitedly.

Terms such as first and second may be used to describe various components, but the components should not be limited by the terms.

The terms are used only for the purpose of distinguishing one component from another. For example, without departing from the scope of the present invention, the first component may be referred to as the second component, and similarly, the second component may also be referred to as the first component.

When a component is said to be "connected" or "connected" to another component, it may be directly connected to or connected to that other component, but it may be understood that another component may be present in the middle. Should be.

On the other hand, when a component is said to be "directly connected" or "directly connected" to another component, it should be understood that there is no other component in between.

The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. Singular expressions include plural expressions unless the context clearly indicates otherwise.

In this application, the terms "comprise", "comprise", "have", and the like are intended to indicate that there is a feature, number, step, operation, component, part, or combination thereof described in the specification. Or other features or numbers, steps, operations, components, parts or combinations thereof in any way should not be excluded in advance.

Unless defined otherwise, all terms used herein, including technical or scientific terms, have the same meaning as commonly understood by one of ordinary skill in the art.

Terms such as those defined in the commonly used dictionaries should be construed as having meanings consistent with the meanings in the context of the related art, and are not construed in ideal or excessively formal meanings unless expressly defined in this application. Do not.

Hereinafter, the most preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art can easily carry out the present invention. .

1A to 1J are process diagrams sequentially illustrating a method of manufacturing a vertical structure thin film transistor according to an exemplary embodiment of the present invention.

In the method of manufacturing the vertical structure thin film transistor according to the exemplary embodiment of the present invention, the first oxide electrode 20, the metal electrode 30, and the second oxide electrode 40 are sequentially stacked on the substrate 10. Forming; Etching the metal electrode 30 using self alignment; Depositing an oxide semiconductor outside the first oxide electrode (20), the metal electrode (30), and the second oxide electrode (40) to form an active layer (50) as the metal electrode side channel; And oxidizing the interface of the metal electrode 30 through heat treatment to form the gate insulating layer 60.

A method of manufacturing a vertical structure thin film transistor according to an exemplary embodiment of the present invention will be described in more detail with reference to FIGS. 1A and 1I.

First, as shown in FIG. 1A, a substrate 10 made of a glass substrate or a plastic substrate is prepared.

On the prepared substrate 10, a first conductive thin film (not given a drawing number) such as indium tin oxide (ITO), which is a conductive oxide, is formed.

In the illustrated example, it is most preferable to form an electrode with a first conductive thin film made of ITO to easily form a gate insulating film 60 using interfacial oxidation to prevent a short with a gate electrode, which is a metal electrode, as described below. Preferably, the conductive thin film may include metal nitride, metal silicide, doped semiconductor, or the like.

The deposition of the first conductive thin film may be formed using sputtering, chemical vapor deposition, physical vapor deposition, atomic layer deposition, electron beam deposition, evaporation, or the like.

Subsequently, as shown in FIG. 1B, the conductive oxide patterns a first conductive thin film such as indium tin oxide (ITO) or aluminum zinc oxide (AZO) to form a first oxide electrode 20.

Here, the first oxide electrode 20 is preferably a source electrode.

The formation of the first oxide electrode 20 is patterned by wet etching or dry etching considering a region in which the metal electrode 30 and the second oxide electrode 40 are to be formed by applying a photolithography process using a photo mask. This is preferred. As another example, electron beam lithography, hologram lithography, or the like without a mask may be applied.

Subsequently, as shown in FIG. 1C, a metal thin film for forming the metal electrode 30 on the patterned first oxide electrode 20 and the exposed substrate 10 is formed.

As the type of metal, Cs, Al, Ti, Mo, etc., which can easily react with oxides, are preferably used. Of course, the deposition of the metal thin film may be formed using sputtering, chemical vapor deposition, physical vapor deposition, atomic layer deposition, electron beam deposition, evaporation, or the like.

Subsequently, as illustrated in FIG. 1D, the metal thin film is patterned to form a metal electrode 30.

Here, the metal electrode 30 is preferably a gate electrode.

The metal electrode 30 may be patterned by wet etching or dry etching by applying a photolithography process using a photo mask. As another example, electron beam lithography, hologram lithography, or the like without a mask may be applied.

At this time, after the metal electrode 30 is formed as the gate electrode by the patterning, one side of the upper surface of the first oxide electrode 20 and the upper edge of the substrate 10 are exposed to expose the active layer 50 as the metal electrode side channel. It is to secure the area for forming a.

Subsequently, as illustrated in FIG. 1E, ITO (conductive oxide) is formed on the upper edge of the substrate 10 exposed upward, on one side of the upper surface of the first oxide electrode 20, and on the upper side of the metal electrode 30. And a second conductive thin film such as Indium Tin Oxide.

In the illustrated example, forming the electrode from the second conductive thin film made of ITO also facilitates the formation of the gate insulating film 60 using the interfacial oxidation to prevent the short from the gate electrode, which is a metal electrode, as described later. Preferably, the conductive thin film may include metal nitride, metal silicide, doped semiconductor, or the like.

Deposition of the second conductive thin film may also be formed using sputtering, chemical vapor deposition, physical vapor deposition, atomic layer deposition, electron beam deposition, evaporation, or the like.

Subsequently, as shown in FIG. 1F, the conductive oxide patterns a second conductive thin film such as indium tin oxide (ITO) or aluminum zinc oxide (AZO) to form a second oxide electrode 40.

Here, the second oxide electrode 40 is preferably a drain electrode.

The second oxide electrode 40 may be formed by considering a region in which an active layer 50 is formed as a metal electrode side channel including a exposed side of the metal electrode 30 by applying a photolithography process using a photo mask. It is preferable to pattern by wet etching or dry etching. As another example, electron beam lithography, hologram lithography, or the like without a mask may be applied.

Subsequently, as shown in FIG. 1G, after forming the second oxide electrode 40, one end of the metal electrode 30 is aligned with one end of the second oxide electrode 40 using self alignment. Etch Of course, the etching process is also preferably applied to the photolithography process using a photo mask.

In this case, the upper outer side of the substrate 10, one side of the upper surface of the first oxide electrode 20, one end surface of the metal electrode 30, and the entire upper and side surfaces of the second oxide electrode 20 are external. Will be exposed.

Subsequently, as illustrated in FIG. 1H, one side of an upper surface of the first oxide electrode 20 exposed to the outside, one end surface of the metal electrode 30, and an upper surface of the second oxide electrode 20 and It is formed by depositing an oxide semiconductor on the entire side.

The oxide semiconductor is most preferably an IGZO metal oxide, which is an amorphous indium (In) gallium (Ga) or zinc oxide (ZnO) material.

Of course, the deposition of the oxide semiconductor may be formed using sputtering, chemical vapor deposition, physical vapor deposition, atomic layer deposition, electron beam deposition, evaporation, or the like.

Subsequently, as shown in FIG. 1I, the oxide semiconductor is patterned to form an active layer 50, which is a metal electrode side channel.

At this time, one end of the second oxide electrode 40 and one end of the metal electrode 30 are aligned with each other by using self alignment, so that the thickness of the metal electrode 30 as the gate electrode is between the first and second oxide electrodes. Since the channel length of the active layer 50 connecting the 20 and 30 is substantially the same, a short channel of nm-size can be formed.

Here, the first and second oxide electrodes 20 and 30 serve to control the amount of current flowing through the active layer 50 by the amount of voltage applied. The active layer 50 has a channel formed by the control of the metal electrode 30 as the gate electrode, and the current controlled by the first and second oxide electrodes 20 and 30 as the source and drain electrodes can flow. Will be.

Formation of the active layer 50 is also preferably patterned by wet etching or dry etching by applying a photolithography process using a photo mask. As another example, electron beam lithography, hologram lithography, or the like without a mask may be applied.

Subsequently, as shown in FIG. 1J, the gate insulating film 60 is formed by oxidizing the interface of the metal electrode 30 through heat treatment.

Here, oxygen (O) of the first and second oxide electrodes 20 and 40 and the active layer 50 which are oxides due to the heat treatment. The bond is broken, and oxygen (O) is combined with the metal electrode 30 as the gate electrode (ex: Al-> Al ₂ O ₃ ).

At this time, a positive voltage may be applied to the metal electrode 30 to further promote oxidation during the oxidation of the interface. In addition, irradiation of ultraviolet rays in an oxygen atmosphere further accelerates the promotion of oxidation.

Therefore, the oxide is oxidized along the entire interface of the metal electrode 30 through heat treatment to form a gate between the metal electrode 30, the first and second oxide electrodes 20 and 40, and the active layer 50 by interfacial oxidation. The insulating film 60 is formed to complete the device.

Here, as described above, the formation of the metal electrode 30 and the first and second oxide electrodes 20 and 40 is performed by applying a known shadow mask of a predetermined type onto a substrate without using a thin film stacking and patterning method. Of course, it can also be formed by arranging.

2A to 2I are process diagrams sequentially illustrating a method of manufacturing a vertical structure thin film transistor according to another exemplary embodiment of the present invention.

First, as shown in FIG. 2A, a first conductive thin film such as indium tin oxide (ITO), which is a conductive oxide, is formed on a substrate 110 made of a glass substrate or a plastic substrate.

The deposition of the first conductive thin film may be formed using sputtering, chemical vapor deposition, physical vapor deposition, atomic layer deposition, electron beam deposition, evaporation, or the like.

Subsequently, as shown in FIG. 2B, the conductive oxide patterns a first conductive thin film such as indium tin oxide (ITO) to form the first oxide electrode 120.

Here, the first oxide electrode 120 is preferably a source electrode.

The first oxide electrode 20 may be formed by wet etching or dry etching by considering a region in which the metal electrode 130 and the second oxide electrode 140, which will be described later, are formed by applying a photolithography process using a photo mask. Patterning is preferred.

Subsequently, as illustrated in FIG. 2C, a first insulating layer 121 is formed on the patterned first oxide electrode 120 and the exposed substrate 110. The first insulating layer 121 may be formed of nitride, oxide, or an organic insulating material. The first insulating layer 121 may be formed using sputtering, chemical vapor deposition, physical vapor deposition, atomic layer deposition, electron beam deposition, evaporation, or the like.

Subsequently, as illustrated in FIG. 2D, a metal thin film for forming the metal electrode 130 is formed on the first insulating layer 121.

As the type of metal, Cs, Al, Ti, Mo, etc., which can easily react with oxides, are preferably used. Of course, the deposition of the metal thin film may be formed using sputtering, chemical vapor deposition, physical vapor deposition, atomic layer deposition, electron beam deposition, evaporation, or the like.

Subsequently, as shown in FIG. 2E, the first insulating layer 121 and the metal thin film are patterned to interpose between the metal electrode 130, the patterned metal electrode 130, and the patterned first oxide electrode 120. An etched first insulating layer 121 is formed.

The metal electrode 130 and the etched first insulating layer 121 may be patterned by wet etching or dry etching by applying a photolithography process using a photo mask.

At this time, after the metal electrode 30 and the first insulating film 121 as the gate electrode are formed by the patterning, one end portions of the patterned metal electrode 130 and the first insulating film 121 are exposed to the outside in a straight line. To secure an area for forming the active layer 150 as the metal electrode side channel.

Subsequently, as shown in FIG. 2F, a second insulating layer 131 is formed on the entirety of the patterned metal electrode 130 and the exposed substrate 110. The second insulating layer 131 may be formed of nitride, oxide, or an organic insulating material. The second insulating layer 131 may be formed using sputtering, chemical vapor deposition, physical vapor deposition, atomic layer deposition, electron beam deposition, evaporation, or the like.

Subsequently, as shown in FIG. 2G, a second conductive thin film such as indium tin oxide (ITO), which is a conductive oxide, is formed on the second insulating layer 131 exposed upward.

Deposition of the second conductive thin film may also be formed using sputtering, chemical vapor deposition, physical vapor deposition, atomic layer deposition, electron beam deposition, evaporation, or the like.

Subsequently, as shown in FIG. 2H, the conductive oxide patterns a second conductive thin film such as indium tin oxide (ITO) to form a second oxide electrode 140, and then uses the first alignment using self alignment. Etching is performed such that one end portions of the insulating layer 121, the metal electrode 130, the second insulating layer 131, and the second oxide electrode 140 are aligned in a straight line.

Here, the second oxide electrode 140 is preferably a drain electrode.

Etching Degree Using Formation and Self Alignment of the Second Oxide Electrode 140 The photolithography process using the photomask is preferably applied to patterning by wet etching or dry etching.

One end portions of the first insulating layer 121, the metal electrode 130, the second insulating layer 131, and the second oxide electrode 140 that are in a straight line are exposed to the outside and are described later. It provides a formation area of.

Subsequently, as shown in FIG. 2I, one side of the upper surface of the first oxide electrode 120 exposed to the outside, one end surface of the first insulating layer 121, one end surface of the metal electrode 130, and the An oxide semiconductor is formed by depositing an oxide semiconductor on one end surface of the second insulating layer 131 and the entire upper surface and side surfaces of the second oxide electrode 120.

The oxide semiconductor is most preferably an IGZO metal oxide, which is an amorphous indium (In) gallium (Ga) or zinc oxide (ZnO) material.

Of course, the deposition of the oxide semiconductor may be formed using sputtering, chemical vapor deposition, physical vapor deposition, atomic layer deposition, electron beam deposition, evaporation, or the like.

Subsequently, as shown in FIG. 2J, the oxide semiconductor is patterned to form an active layer 150, which is a metal electrode side channel.

That is, one side of the upper surface of the first oxide electrode 120 exposed to the outside through a photolithography process, one end surface of the first insulating film 121, one end surface of the metal electrode 130, and the second insulating film One end surface of one side of 131 and one side of an upper surface of the second oxide electrode 120 are patterned by wet etching or dry etching so that an electrical connection is made between the source electrode and the drain electrode.

Subsequently, as illustrated in FIG. 1J, the gate insulating layer 160 is formed by oxidizing an interface of one side of the metal electrode 30 through heat treatment.

That is, the gate insulating layer 160 is formed only between the metal electrode 130 and the active layer 150 by interfacial oxidation by oxidizing an interface of one side of the metal electrode 130 through heat treatment. will be.

Here, as described above, formation of the first oxide electrode 120, the first insulating layer 121, the metal electrode 130, the second insulating layer, and the second oxide electrode 140 may be sequentially stacked and patterned. Of course, it is also possible to form a shadow mask of a predetermined shape on the substrate 110 without using.

It will be appreciated that the present invention is not limited to the form mentioned in the above detailed description. Therefore, the true technical protection scope of the present invention will be defined by the technical spirit of the appended claims. It is also to be understood that the present invention includes all modifications, equivalents, and substitutes within the spirit and scope of the invention as defined by the appended claims.

10, 110: substrate
20, 120: first oxide electrode
30, 130: metal electrode
40, 1140: second oxide electrode
50, 150: active layer
60, 160: gate insulating film
121: first insulating film
131: second insulating film

Claims (17)

delete delete A first step of sequentially forming and patterning a first oxide electrode, a metal electrode, and a second oxide electrode on a substrate;
Depositing and patterning an oxide semiconductor outside the first oxide electrode, the metal electrode, and the second oxide electrode to form an active layer on a side of the metal electrode; And
A third step of forming a gate insulating film by oxidizing an interface of the metal electrode through heat treatment;
The first step is,
Forming a first conductive thin film on the substrate;
Patterning the first conductive thin film to form a first oxide electrode;
Forming a metal thin film for forming a metal electrode on the first oxide electrode;
Patterning the metal thin film to form a metal electrode;
Forming a second conductive thin film on the metal electrode; And
And patterning the second conductive thin film to form a second oxide electrode.
The method of claim 3, wherein
The forming of the metal thin film may include depositing a metal thin film on the patterned first oxide electrode and the exposed substrate.
The method of claim 3, wherein
The forming of the second conductive thin film may include forming a conductive thin film by depositing a conductive thin film on an upper edge of the substrate exposed to an upper side, on an upper surface of the first oxide electrode, and on an upper side of the metal electrode. Method of manufacturing a transistor.
A first step of sequentially forming and patterning a first oxide electrode, a metal electrode, and a second oxide electrode on a substrate;
Depositing and patterning an oxide semiconductor outside the first oxide electrode, the metal electrode, and the second oxide electrode to form an active layer on a side of the metal electrode; And
A third step of forming a gate insulating film by oxidizing an interface of the metal electrode through heat treatment;
The first step is,
Forming a first conductive thin film on the substrate;
Patterning the first conductive thin film to form a first oxide electrode;
Forming a first insulating film on the patterned first oxide electrode;
Forming a metal thin film for forming a metal electrode on the first insulating film;
Patterning the first insulating film and the metal thin film to form a metal electrode;
Forming a second insulating film on the patterned metal electrode;
Forming a second conductive thin film on the second insulating film; And
And patterning the second conductive thin film to form a second oxide electrode.
The method of claim 6,
In the forming of the first insulating film, a method of manufacturing a vertical structure thin film transistor, characterized in that the first insulating film is formed on the patterned first oxide electrode and the exposed substrate.
The method of claim 6,
In the forming of the second insulating film, a method of manufacturing a vertical structure thin film transistor, characterized in that the second insulating film is formed on the entire patterned metal electrode and the exposed substrate.
A first step of sequentially forming and patterning a first oxide electrode, a metal electrode, and a second oxide electrode on a substrate;
Depositing and patterning an oxide semiconductor outside the first oxide electrode, the metal electrode, and the second oxide electrode to form an active layer on a side of the metal electrode; And
A third step of forming a gate insulating film by oxidizing an interface of the metal electrode through heat treatment;
The formation of the first oxide electrode, the metal electrode, and the second oxide electrode may include forming a shadow mask on a substrate to form an electrode pattern.
A first step of sequentially forming and patterning a first oxide electrode, a metal electrode, and a second oxide electrode on a substrate;
Depositing and patterning an oxide semiconductor outside the first oxide electrode, the metal electrode, and the second oxide electrode to form an active layer on a side of the metal electrode; And
A third step of forming a gate insulating film by oxidizing an interface of the metal electrode through heat treatment;
The second step,
Depositing an oxide semiconductor on one side of an upper surface of the first oxide electrode exposed to the outside, one end surface of the metal electrode, and an entire upper surface and side surfaces of the second oxide electrode; And
The oxide semiconductor is patterned to form one side of the upper surface of the first oxide electrode, one end surface of the metal electrode, one side surface of the second oxide electrode which is in line with the one end surface of the metal electrode, and the second oxide electrode. And forming the active layer over a portion of an upper surface of the vertical structure thin film transistor.
A first step of sequentially forming and patterning a first oxide electrode, a metal electrode, and a second oxide electrode on a substrate;
Depositing and patterning an oxide semiconductor outside the first oxide electrode, the metal electrode, and the second oxide electrode to form an active layer on a side of the metal electrode; And
A third step of forming a gate insulating film by oxidizing an interface of the metal electrode through heat treatment;
In the third step,
And the gate insulating film is formed between the metal electrode, the first and second oxide electrodes, and the active layer by interfacial oxidation by oxidizing along the entire interface of the metal electrode.
The method of claim 11,
Oxygen (O) of the first and second oxide electrodes and the active layer which are oxides due to the heat treatment The bond is broken, oxygen (O) is a manufacturing method of the vertical structure thin film transistor, characterized in that coupled to the metal electrode which is a gate electrode.
The method of claim 11,
The method of manufacturing a vertical structure thin film transistor, characterized in that for applying the positive voltage to the metal electrode at the time of the interfacial oxidation or irradiated with ultraviolet light in an oxygen atmosphere.
delete delete delete delete

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