KR102034767B1 - Method for manufacturing oxide thin film transistor and oxide thin film transistor - Google Patents

Abstract

The present invention relates to an oxide thin film transistor manufacturing method and an oxide thin film transistor, and more particularly to an oxide thin film transistor manufacturing method and oxide thin film transistor which can improve the mobility of the channel layer.
An oxide thin film transistor manufacturing method according to an embodiment of the present invention comprises the steps of forming a gate on the substrate; Forming an insulator layer on the gate; And forming a channel layer on the insulator layer, wherein the forming of the channel layer comprises: forming a first oxide semiconductor layer on the insulator layer; And forming a second oxide semiconductor layer having different electrical conductivity from the first oxide semiconductor layer on the first oxide semiconductor layer.

Description

Method for manufacturing oxide thin film transistor and oxide thin film transistor

The present invention relates to an oxide thin film transistor manufacturing method and an oxide thin film transistor, and more particularly to an oxide thin film transistor manufacturing method and oxide thin film transistor which can improve the mobility of the channel layer.

In line with the development of the display market, research on thin film transistors is also changing to meet the required performance for application to high efficiency and next generation displays. Among them, researches on transparent thin film transistors using oxide semiconductors have been actively conducted at home and abroad.

Thin film transistors using oxides as channels (i.e., oxide thin film transistors) are materials of channel layers such as zinc oxide (ZnO), indium-zinc oxide (IZO), silicon-zinc oxide (SZO), indium-gallium oxide (IGO), Oxides such as Indium-Gallium-Zinc Oxide (IGZO) and the like are used, and conventional ZnO-based or IGZO-based oxide thin film transistors exhibit mobility of about 10 cm 2 / Vs, thereby providing non-oxide (eg, Since the mobility is about 1 to 2 orders lower than the thin film transistor using Si, SiC, or GaN) as a channel, higher mobility is required to improve the characteristics of the oxide thin film transistor.

Conventionally, in order to improve the characteristics of the oxide thin film transistor, an oxide channel layer is heat-treated at a high temperature of more than 300 ° C. to improve the mobility of the channel layer. For example, a problem occurs that affects (or damages) the substrate). In particular, when using a glass substrate, there was a problem that the glass substrate is damaged at a high temperature of more than 300 ℃.

Korean Registered Patent Publication No. 10-1465114

The present invention provides an oxide thin film transistor manufacturing method and an oxide thin film transistor capable of improving the mobility of the channel layer through a dual channel having a different electrical conductivity.

An oxide thin film transistor manufacturing method according to an embodiment of the present invention comprises the steps of forming a gate on the substrate; Forming an insulator layer on the gate; And forming a channel layer on the insulator layer, wherein the forming of the channel layer comprises: forming a first oxide semiconductor layer on the insulator layer; And forming a second oxide semiconductor layer having different electrical conductivity from the first oxide semiconductor layer on the first oxide semiconductor layer.

The forming of the first oxide semiconductor layer may include depositing a first oxide layer on the insulator layer; And irradiating an electron beam on the first oxide layer.

In the process of irradiating an electron beam on the first oxide layer, an electron beam of 10 to 5,000 eV may be irradiated.

The forming of the second oxide semiconductor layer may include depositing a second oxide layer on the first oxide semiconductor layer; And heat treating the second oxide layer at a temperature of 200 to 300 ° C., or irradiating an electron beam having a lower intensity on the second oxide layer than to irradiating an electron beam on the first oxide layer. .

The substrate may be a transparent substrate.

In the process of forming the channel layer, the first oxide semiconductor layer may be formed to a thickness thinner than that of the second oxide semiconductor layer.

The first oxide semiconductor layer may have a higher electrical conductivity than the second oxide semiconductor layer.

The first oxide semiconductor layer and the second oxide semiconductor layer may be formed of an oxide including indium, gallium, and zinc.

The first oxide semiconductor layer and the second oxide semiconductor layer may include an oxide formed of the same component.

The forming of the channel layer may be performed by alternately stacking the first oxide semiconductor layer and the second oxide semiconductor layer by repeating forming the first oxide semiconductor layer and forming the second oxide semiconductor layer a plurality of times. can do.

An oxide thin film transistor according to another embodiment of the present invention is a substrate; A gate formed on the substrate; An insulator layer formed on the gate; A channel layer including a first oxide semiconductor layer formed on the insulator layer and a second oxide semiconductor layer formed on the first oxide semiconductor layer and provided on the insulator layer; A source provided on one side of the channel layer; And a drain provided on the other side of the channel layer, wherein the first oxide semiconductor layer may have higher electrical conductivity than the second oxide semiconductor layer.

The first oxide semiconductor layer may be thinner than the second oxide semiconductor layer.

The substrate may be a transparent substrate.

The first oxide semiconductor layer and the second oxide semiconductor layer may be formed of an oxide including indium, gallium, and zinc.

The first oxide semiconductor layer and the second oxide semiconductor layer may include an oxide formed of the same component.

The first oxide semiconductor layer and the second oxide semiconductor layer may be alternately stacked.

The first oxide semiconductor layer and the second oxide semiconductor layer may be formed amorphous.

In the method of fabricating an oxide thin film transistor according to an exemplary embodiment of the present invention, the mobility of the channel layer may be improved by forming the channel layer as a dual channel having different electrical conductivity on the gate. In addition, the electrical connection between the channel layer and the gate may be stabilized by making the first oxide semiconductor layer adjacent to the gate of the plurality of oxide semiconductor layers higher in electrical conductivity than the second oxide semiconductor layer on the opposite side, and thus the mobility of the channel layer may be stabilized. Can be improved.

In addition, since the first oxide semiconductor layer is formed by irradiating an electron beam to the first oxide layer, a high temperature heat treatment process of more than 300 ° C. may not be performed to obtain high electrical conductivity, and other structures of the oxide thin film transistor may be affected (or Damage) can be prevented. In particular, when the glass substrate is used, there is a problem that the glass substrate is damaged at a high temperature of more than 300 ℃, the present invention does not perform a high temperature heat treatment process over 300 ℃, the oxide thin film transistor with improved mobility of the channel layer Can be applied to a glass substrate.

On the other hand, since the first oxide semiconductor layer and the second oxide semiconductor layer are composed of oxides containing indium (In), gallium (Ga), and zinc (Zn) and contain the same components, the first oxide semiconductor layer and the second oxide are Crystallographic matching between the interfaces of the semiconductor layers is well performed, so that the overall thin film characteristics can form a channel layer in which a plurality of oxide semiconductor layers are stacked, similar to a channel layer composed of a single layer. Can be improved.

1 is a flow chart showing a method for manufacturing an oxide thin film transistor according to an embodiment of the present invention.
2 is a cross-sectional view sequentially illustrating the formation of a channel layer according to an embodiment of the present invention.
3 is a graph for explaining the electrical conductivity improvement of the oxide layer through the electron beam irradiation according to an embodiment of the present invention.
4 is a cross-sectional view illustrating an oxide thin film transistor according to another exemplary embodiment of the present invention.

Hereinafter, with reference to the accompanying drawings will be described an embodiment of the present invention in more detail. However, the present invention is not limited to the embodiments disclosed below, but will be implemented in various forms, and only the embodiments are intended to complete the disclosure of the present invention, and to those skilled in the art to fully understand the scope of the invention. It is provided to inform you. In the description, like reference numerals refer to like elements, and the drawings may be partially exaggerated in size in order to accurately describe embodiments of the present invention, and like reference numerals refer to like elements in the drawings.

1 is a flowchart illustrating a method of manufacturing an oxide thin film transistor according to an exemplary embodiment of the present invention.

Referring to FIG. 1, the method of manufacturing an oxide thin film transistor according to an embodiment of the present invention may include forming a gate 110 on a substrate 10 (S100); Forming an insulator layer (120) on the gate (110) (S200); And forming a channel layer 130 on the insulator layer 120 (S300), and forming the channel layer 130 (S300) on the insulator layer 120. Forming a first oxide semiconductor layer 131 on the substrate (S310); And forming a second oxide semiconductor layer 132 having a different electrical conductivity from the first oxide semiconductor layer 131 on the first oxide semiconductor layer 131 (S320).

First, a gate 110 is formed on the substrate 10 (S100). The gate 110 may be a gate of a conventional thin film transistor (TFT), and the material of the gate 110 may be a general electrode material, and may be made of metal or conductive oxide. For example, metals such as Ti, Pt, Ru, Au, Ag, Mo, Al, W, Cu, and the like, conductive oxides such as indium zinc oxide (IZO), indium tin oxide (ITO), and aluminum zinc oxide (AZO), etc. Can be formed.

Next, an insulator layer 120 is formed on the gate 110 (S200). The insulator layer 120 may be formed to cover the gate 110 and may be a single layer or a multilayer. The insulator layer 120 may be formed of an oxide or a nitride, and a thickness of a portion of the insulator layer 120 formed on at least an upper surface of the gate 110 may be constant. That is, the insulator layer 120 may have a portion parallel to the top surface of the gate 110, which may be on the gate 110.

Next, the channel layer 130 is formed on the insulator layer 120 (S300). The channel layer 130 may be formed of an oxide, may be an oxide layer not including silicon (Si), and may be positioned on the gate 110.

Forming the channel layer 130 (S300) includes forming a first oxide semiconductor layer 131 on the insulator layer 120 (S310); And forming a second oxide semiconductor layer 132 having a different electrical conductivity from the first oxide semiconductor layer 131 on the first oxide semiconductor layer 131 (S320). Here, the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be stacked to form the channel layer 130, and the channel layer 130 may be formed in a dual channel. .

In the oxide thin film transistor 100 having a bottom gate structure, an oxide thin film layer having a high carrier concentration is formed in the channel layer 130 to improve mobility of the oxide thin film transistor 100. It may be possible, and the mobility of the oxide thin film transistor 100 may be further improved by forming an additional thin film on an oxide thin film layer having a high carrier concentration (that is, the first oxide semiconductor layer).

In the process of forming the channel layer 130 (S300), the first oxide semiconductor layer 131 may be formed on the insulator layer 120 (S310). The first oxide semiconductor layer 131 may be formed by activating the first oxide layer 131a deposited on the insulator layer 120. Here, the first oxide layer 131a may be in an insulating state before being activated, and may be activated to be changed to the first oxide semiconductor layer 131. In this case, the first oxide semiconductor layer 131 may be different from a transparent conductive oxide (TCO) such as ITO, and the transparent conductive oxide (TCO) such as ITO is uniformly formed (or deposited). Although not possible, the first oxide semiconductor layer 131 may be uniformly formed. In the present invention, the first oxide semiconductor layer 131 may be uniformly formed on the gate 110 to improve electrical characteristics with the gate 110.

In the process of forming the channel layer 130 (S300), a second oxide semiconductor layer 132 having a different electrical conductivity from the first oxide semiconductor layer 131 may be formed on the first oxide semiconductor layer 131. (S320). The second oxide semiconductor layer 132 may be formed by activating the second oxide layer 132a deposited on the first oxide semiconductor layer 131. Here, the second oxide layer 132a may be in an insulating state before being activated, and may be activated to be changed to the second oxide semiconductor layer 132. In this case, the second oxide semiconductor layer 132 may be different from the transparent conductive oxide (TCO) such as ITO, and the transparent conductive oxide (TCO) may not be uniformly formed, but the second oxide semiconductor layer 132 is uniform. Can be formed. In the present invention, the second oxide semiconductor layer 132 may be uniformly formed on the first oxide semiconductor layer 131 to improve electrical characteristics between the gate 110 and the channel layer 130. The second oxide semiconductor layer 132 may have different electrical conductivity from the first oxide semiconductor layer 131, and in this case, the oxide semiconductor layer 131 having a relatively low electrical conductivity among the plurality of oxide semiconductor layers 131 and 132. or 132, the oxide layer 131a or 132a may be activated by heat treatment at a temperature (or low temperature) of 300 ° C. or lower.

FIG. 2 is a cross-sectional view sequentially illustrating the formation of a channel layer according to an embodiment of the present invention. FIG. 2 (a) shows deposition of a first oxide layer, and FIG. 2 (b) shows an electron beam of the first oxide layer. An irradiation process is shown, and Fig. 2 (c) shows the deposition of the second oxide layer.

Referring to FIG. 2, the forming of the first oxide semiconductor layer 131 (S310) may include depositing a first oxide layer 131a on the insulator layer 120 (S311); And irradiating an electron beam (E-beam) on the first oxide layer 131a (S312).

In the process of forming the first oxide semiconductor layer 131 (S310), as illustrated in FIG. 2A, the first oxide layer 131a may be deposited on the insulator layer 120 (S311). The first oxide layer 131a may include indium (In), gallium (Ga), or zinc (Zn), and may be a layer including at least two or more elements selected from among these, and oxygen (O). It may be a material layer of any one of the five-membered system.

In the process of forming the first oxide semiconductor layer 131 (S310), an electron beam may be irradiated onto the first oxide layer 131a as shown in FIG. 2B (S312). The first oxide layer 131a may be activated by irradiating an electron beam. That is, the first oxide semiconductor layer 131 may be formed by activating an electron beam by irradiating the first oxide layer 131a deposited on the insulator layer 120. When the electron beam is irradiated onto the first oxide layer 131a, oxygen vacancy is formed by breaking the bond of oxygen bound in the first oxide layer 131a, and electrons are generated by ionizing the oxygen deficiency. And may be an n-type semiconductor layer. In detail, activation of the first oxide layer 131a using the electron beam accelerates a large amount of electrons extracted from the plasma source to the first oxide layer 131a by irradiating the first oxide layer 131a with only an electron beam having energy. Enhancing the crystallinity and physical properties of 131a), when electrons with a relatively low keV of energy are scanned by scanning a large area of the specimen, the collision of the electrons instantly and evenly heats only the surface over a large area without physical damage. As a result, oxygen deprivation is formed as oxygen bonds are disconnected and oxygen deprivation is ionized to release electrons, thereby forming an n-type semiconductor layer.

As in the present invention, when the first oxide semiconductor layer 131 is formed by irradiating an electron beam (E-beam) on the first oxide layer 131a, in order to obtain high electrical conductivity, Annealing may not be performed and the first oxide semiconductor layer 131 having high electrical conductivity may be formed. Accordingly, the electrical connection between the first oxide semiconductor layer 131 and the gate 110 may be stabilized, and thus the mobility of the channel layer 130 may be improved.

On the other hand, the electron beam (E-beam) is different from the material forming the laser beam and the ion beam and the beam (beam), due to which the amount of energy varies depending on the mass of each material. Laser beams and ion beams can damage the thin films when they are used in the post-treatment of the thin film because the mass size of the material is so large that they are mainly used for the etching and processing of the thin film, not for the post-treatment process for stabilization and activation of the thin film. . However, in the case of an electron beam (E-beam), by using the electron having the smallest mass, the energy coming from the mass of the material is small so that it may not give a large daisy to the thin film, and thus the electron beam to the first oxide layer 131a In the case of irradiation, stabilization and characteristic improvement can be obtained.

In operation S312 of irradiating an electron beam onto the first oxide layer 131a, an electron beam of 10 to 5,000 eV may be irradiated. When the channel layer 130 is made of crystalline, a problem may occur in that the on / off characteristic (or switching characteristic) of the channel layer 130 is deteriorated or the semiconductor characteristic is lost. When the electron beam is irradiated in excess of 5,000 eV, the first oxide semiconductor layer 131 may be crystallized. When the electron beam is irradiated at less than 10 eV, the first oxide layer 131a in an insulated state may be in a semiconductor state. It may not be changed into the one oxide semiconductor layer 131. Accordingly, in the step S312 of irradiating an electron beam onto the first oxide layer 131a, the first oxide semiconductor layer 131 may be amorphous by irradiating an electron beam of 10 to 5,000 eV.

Meanwhile, in the process of forming the second oxide semiconductor layer 132 (S320), the electron beam having a lower intensity than the process of irradiating an electron beam on the first oxide layer 131a (S312) may be applied to the second oxide layer 132a. When irradiating onto the second oxide layer 132a to activate the second oxide layer 132a, the electron beam is in the range of 10 to 5,000 eV so that the intensity of the electron beam is lower than that of irradiating the electron beam onto the first oxide layer 131a (S312). The strength may be appropriately selected, and the second oxide semiconductor layer 132 may also be amorphous.

Forming the second oxide semiconductor layer 132 (S320) includes depositing a second oxide layer 132a on the first oxide semiconductor layer 131 (S321); And heating the second oxide layer 132a at a temperature of 200 to 300 ° C., or applying an electron beam having a lower intensity than that of irradiating an electron beam onto the first oxide layer 131a (S312). It may include the step (S322) of irradiating on 132a).

In the process of forming the second oxide semiconductor layer 132 (S320), as illustrated in FIG. 2C, the second oxide layer 132a may be deposited on the first oxide semiconductor layer 131 (S321). The second oxide layer 132a may include indium, gallium, and zinc, and may be a layer including at least two or more elements selected from among these, and oxygen (O), and may be a material layer of any one of three to five members. Can be.

In the process of forming the second oxide semiconductor layer 132 (S320), the second oxide layer 132a may be heat-treated at a temperature of 200 to 300 ° C., and an electron beam is irradiated onto the first oxide layer 131a. An electron beam having a lower intensity than that in operation S312 may be irradiated onto the second oxide layer 132a (S322).

The second oxide semiconductor layer 132 may be formed by heat treating the second oxide layer 132a at a temperature of 200 to 300 ° C. to activate the second oxide layer 132a. Here, since the electrical conductivity of the first oxide semiconductor layer 131 may be increased by electron beam irradiation, the second oxide layer 132a may be activated by heat treatment at a temperature of 300 ° C. or less. When the heat treatment is performed at a temperature higher than 300 ° C., other components (eg, substrates) of the oxide thin film transistor 100 may be affected (or damaged), and in particular, the substrate 10 may be a transparent substrate such as a glass substrate. In this case, the substrate 10 may be damaged at a high temperature of more than 300 ° C. On the other hand, when the second oxide layer 132a is heat-treated at a temperature of less than 200 ° C., activation is insignificant so that the second oxide semiconductor layer 132 is not formed or desired electrical conductivity of the second oxide semiconductor layer 132 is obtained. Can not.

On the other hand, there is a limit in improving the electrical conductivity of the second oxide semiconductor layer 132 through a heat treatment of 200 to 300 ℃, to activate the second oxide layer 132a to form the second oxide semiconductor layer 132 There is no problem. At this time, if the heat treatment temperature is too high, it is possible to obtain an electrical characteristic improvement, but there is a critical point of the electrical characteristic improvement and heat more than necessary is rather damaging to other components of the oxide thin film transistor 100 and thus the oxide thin film transistor. The characteristic of 100 can be reduced. When heat-treating the oxide layer (131a or 132a) at a high temperature of more than 300 ℃, it is possible to obtain the effect of improving the electrical conductivity through the electron beam irradiation, but due to the adverse effect of high temperature glass, glass, flexible substrate, etc. At the time of use, it is difficult to apply a high temperature heat treatment exceeding 300 ℃. Here, the heat treatment of the second oxide layer 132a activates the electrical property of the second oxide layer 132a in the same state as the insulator as the electrical property of the second oxide semiconductor layer 132, thereby channeling the channel layer 130. Can be used as

The second oxide semiconductor layer is activated by irradiating an electron beam having a lower intensity than the step S312 of irradiating an electron beam on the first oxide layer 131a to activate the second oxide layer 132a. 132 may be formed.

3 is a graph for explaining the electrical conductivity improvement of the oxide layer through the electron beam irradiation according to an embodiment of the present invention, Figure 3 (a) is a graph for comparing the heat treatment and electron beam irradiation of 300 ℃, Figure 3 (b) is a graph for comparing the deactivation and the heat treatment at 300 ℃.

Referring to FIG. 3, the second oxide layer 132a may be irradiated with an electron beam having a lower intensity than the step S312 of irradiating an electron beam onto the first oxide layer 131a to activate the second oxide layer 132a. Can be. Since the electrical conductivity of the oxide semiconductor layers 131 and 132 may be controlled by adjusting the intensity of the electron beam, the second oxide layer 132a may have a lower intensity than that of irradiating the electron beam onto the first oxide layer 131a. The second oxide semiconductor layer 132 having lower electrical conductivity than the first oxide semiconductor layer 131 may be formed by irradiating an electron beam.

The first oxide semiconductor layer 131 may have a higher electrical conductivity than the second oxide semiconductor layer 132. Since the mobility of the channel layer 130 is mainly related to the electrical connection between the channel layer 130 and the gate 110, the electrical conductivity of the first oxide semiconductor layer 131 is increased to increase the electrical conductivity of the first oxide semiconductor layer 131. The electrical connection of the gate 110 may be stabilized, and thus the mobility of the channel layer 130 may be improved. As a result, the second oxide semiconductor layer 132 may have a lower electrical conductivity than the first oxide semiconductor layer 131.

Here, the position of the oxide semiconductor layer 131 or 132 having high electrical conductivity greatly affects the mobility of the channel layer 130, and the oxide semiconductor layer (ie, the lower portion) is in contact with the gate 110. By placing the first oxide semiconductor layer 131 having a higher carrier density of the 131 and 132, the first oxide semiconductor layer 131 serves as a carrier supplier in the oxide thin film transistor 100. It may contribute to improving the mobility of the thin film transistor 100.

On the other hand, in order for the second oxide semiconductor layer 132 to have an electrical conductivity of more than the first oxide semiconductor layer 131, the second oxide layer 132a may be heat-treated at a high temperature of more than 300 ° C., or the first oxide layer 131a may be used. An electron beam having an electron beam intensity greater than or equal to the electron beam intensity in the step S312 is irradiated onto the second oxide layer 132a. If the heat treatment at a high temperature of more than 300 ℃ may affect the other configuration of the oxide thin film transistor 100, the electron beam intensity or more in the step (S312) of irradiating the electron beam on the first oxide layer (131a). When the electron beam is irradiated, the surface roughness of the second oxide semiconductor layer 132 on the top of the channel layer 130 is changed due to the electron beam irradiation, so that the source 140 is formed on the second oxide semiconductor layer 132. Problems such as reproducibility and uniformity of electrical characteristics between the drain 150 and the protective layer 160 may occur.

The substrate 10 may be a transparent substrate. For example, the transparent substrate may be a glass substrate. In the present invention, since the heat treatment is not performed at a temperature higher than 300 ° C., a transparent substrate such as a glass substrate may be used, and the oxide thin film transistor 100 having improved mobility of the channel layer 130 may be applied to the glass substrate. Can be.

The first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be formed of an oxide including indium, gallium, and zinc, and may include oxygen (O) and at least two or more elements selected from indium, gallium, and zinc. It may be an oxide containing. For example, the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be formed of indium-gallium-zinc oxide (IGZO), indium-gallium-zinc-tin oxide (Indium- Gallium-Zinc-Tin Oxide (IGZTO), Zinc-Gallium-Tin Oxide (ZnGaSnO), Indium Zinc Oxide (InZnO), Zinc-Tin Oxide (ZnSnO) At least one of the oxides may be made. These oxides can be deposited at low temperatures (eg, below 300 ° C.) and have the advantage that large area deposition is easy. In addition, the uniformity of the first oxide semiconductor layer 131 may be improved by being uniformly deposited on the gate 110. Accordingly, the electrical properties of the first oxide semiconductor layer 131 and the gate 110 may be improved. The connection can be more stabilized.

However, such an oxide-based thin film transistor exhibits a mobility of about 10 cm 2 / Vs, so that the mobility is 1 to 2 orders of magnitude compared to a thin film transistor using another material (for example, Si, SiC, or GaN) as a channel. order) and the disadvantage is low, it is necessary to secure the mobility of about 30 cm 2 / Vs or more to enable the large-area display of the UD class.

Accordingly, in the present invention, the first oxide semiconductor layer 131 is formed by irradiating an electron beam on the first oxide layer 131a, thereby improving the electrical conductivity of the first oxide semiconductor layer 131 to move about 30 cm 2 / Vs or more. You can secure the degree. In addition, the second oxide semiconductor layer 132 may also be made of oxides including indium, gallium, and zinc to be uniformly deposited on the first oxide semiconductor layer 131, and the uniformity of the second oxide semiconductor layer 132 may be reduced. Can be improved.

The first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may include an oxide composed of the same component, and the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may have the same component. It may be made of. For example, the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be made of the same material (or oxide), may be made of the same material, or may be made of the same type of material. In order to form the first oxide semiconductor layer 131 by irradiating an electron beam on the first oxide layer 131a to improve the electrical conductivity of the first oxide semiconductor layer 131, the second oxide layer 132a is deposited. The surface roughness of the first oxide semiconductor layer 131 may be changed. In this case, a problem may occur such as the reproducibility and uniformity of electrical characteristics with the second oxide semiconductor layer 132 formed on the first oxide semiconductor layer 131. However, as in the present invention, when the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 include an oxide composed of the same component, the first oxide semiconductor layer 131 and the second oxide semiconductor layer Crystallographic matching between the interfaces of 132 may be well performed, and thus uniformity of the second oxide semiconductor layer 132 and / or the channel layer 130 may be improved, and the overall channel layer 130 may have a single characteristic. It can be similar to the channel layer consisting of the reproducibility of the electrical characteristics between the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 can be improved, the electrical characteristics and stability of the channel layer 130 Can be improved.

Meanwhile, although the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 having different electrical conductivity may be formed through heterogeneous materials, in this case, the first oxide semiconductor layer 131 and the second oxide semiconductor layer. Crystallographic matching between the interfaces of 132 may not be performed, and thus the effect of the dual channel may not be expressed. Accordingly, in the present invention, the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 include an oxide composed of the same component, thereby making the characteristics of the entire channel layer 130 similar to a single channel layer. As a result, the effect of the dual channel can be maximized.

In other words, when a metal or another heterogeneous material is used as the material of the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132, an interface is formed by heterojunction or a schottky barrier. Due to the deterioration of the electrical characteristics of the oxide thin film transistor 100, in the present invention, the material of the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 is a material of the same type that is not a metal or a different heterogeneous material. Using the material or the same material, there may be no degradation of the electrical characteristics of the oxide thin film transistor 100 due to the interface formation by the heterojunction or the Schottky barrier.

In the process of forming the channel layer 130 (S300), the first oxide semiconductor layer 131 may be formed to have a thickness thinner than that of the second oxide semiconductor layer 132. In this case, the first oxide layer 131a and the second oxide layer 132a may be deposited to have different thicknesses by using a sputtering method. Since the electron beam is irradiated from the upper portion of the first oxide layer 131a, when the thickness of the first oxide layer 131a is thick, the inside of the first oxide layer 131a (or a portion far from the upper surface of the first oxide layer). ), A portion of the first oxide layer 131a that is not activated may not be delivered due to sufficient energy. Accordingly, the first oxide semiconductor layer 131 may be formed to have a thin thickness so that the entire first oxide layer 131a may be activated to form the first oxide semiconductor layer 131. When the electron beams are irradiated onto the oxide layers 131a and 132a, not only the activation reaction occurs on the surfaces of the oxide layers 131a and 132a, but also the activation reaction occurs to an energy penetration depth of several nm to several tens of nm. The energy penetration depth may vary depending on the constituent materials of the oxide layers 131a and 132a, and the thickness (or less than or equal to) corresponding to (or matching) the energy penetration depth according to the constituent materials of the oxide layers 131a and 132a. The first oxide layer 131a may be deposited, and thus, the entire first oxide layer 131a may be activated to form the first oxide semiconductor layer 131.

Meanwhile, since sufficient carrier number must be secured for excellent electrical characteristics of the channel layer 130, the channel layer 130 may be formed to a predetermined thickness for sufficient carrier number. In this case, since the thickness of the first oxide semiconductor layer 131 is thin, the second oxide semiconductor layer 132 may be formed thicker than the first oxide semiconductor layer 131 to secure a predetermined thickness of the channel layer 130. As a result, a sufficient number of carriers may be secured in the channel layer 130.

For example, the thickness of the channel layer 130 may be 10 to 100 nm (preferably about 40 to 60 nm), and the thickness of the first oxide semiconductor layer 131 may be the second oxide semiconductor layer 132. The thickness of the first oxide semiconductor layer 131 may be about 0.5 to 23 nm (preferably about 2 to 14 nm), and the thickness of the second oxide semiconductor layer 132 may be about 5 to 30% of the thickness. About 8 to 95 nm (preferably about 31 to 57 nm). In this case, the ratio of the thickness of the first oxide semiconductor layer 131 and the thickness of the second oxide semiconductor layer 132 may be about 1: 3, and the thickness of the first oxide semiconductor layer 131 is 1, the second oxide semiconductor. Good electrical properties can be seen when the thickness of layer 132 is three. However, the present invention is not limited thereto, and the thickness of the first oxide semiconductor layer 131 may be determined according to the energy penetration depth of the electron beam, and depending on the thickness of the channel layer 130 and the thickness of the first oxide semiconductor layer 131. The thickness of the second oxide semiconductor layer 132 may be determined.

In the process of forming the channel layer 130 (S300), the first oxide layer 131a and the second oxide layer 132a may be deposited to have different thicknesses by sputtering. The sputtering method can easily control the thickness of the oxide layers 131a and 132a and can deposit the oxide layers 131a and 132a densely. On the other hand, other deposition method (s) may be faster, but cannot deposit the oxide layers 131a and 132a densely. Accordingly, in the present invention, the first oxide layer 131a and the second oxide layer 132a are densely formed for excellent electrical characteristics of the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 by using a sputtering method. The thickness of the oxide layers 131a and 132a may be easily adjusted, and the first oxide layer 131a and the second oxide layer 132a may be deposited at different thicknesses.

In the forming of the channel layer 130 (S300), the forming of the first oxide semiconductor layer 131 (S310) and the forming of the second oxide semiconductor layer 132 (S320) a plurality of times. The first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be alternately stacked. At this time, the upper surface of the upper surface of the channel layer 130 for the reproducibility and uniformity of the electrical characteristics between the source 140, the drain 150 and the protective layer 160 formed on the channel layer 130, etc. The second oxide semiconductor layer 132 may not be roughened. The channel layer 130 may be formed by alternately stacking the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132, and in this case, the total volume of the first oxide semiconductor layer 131 having high electrical conductivity. (Or the total ratio of the first oxide semiconductor layer to the channel layer) may be increased to further improve the mobility of the channel layer 130.

Meanwhile, in the process of forming the channel layer 130 (S300), the process of forming a third oxide semiconductor layer (not shown) on the first oxide semiconductor layer 131 or the second oxide semiconductor layer 132 (S330). ) May be further included. A third oxide semiconductor layer (not shown) may be formed on the first oxide semiconductor layer 131 or the second oxide semiconductor layer 132 (S330). The third oxide semiconductor layer (not shown) may be formed on the top of the channel layer 130, or may be formed between the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132. When formed on top of the channel layer 130, the third oxide semiconductor layer (not shown) may have the same electrical conductivity as the second oxide semiconductor layer 132 or lower than the second oxide semiconductor layer 132. When formed between the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132, the electrical conductivity of one of the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 is equal to or It may have an electrical conductivity between the electrical conductivity of the first oxide semiconductor layer 131 and the electrical conductivity of the second oxide semiconductor layer 132. In this case, the electrical conductivity of the first oxide semiconductor layer 131, the second oxide semiconductor layer 132, and / or the third oxide semiconductor layer (not shown) may be adjusted by adjusting the intensity of the electron beam. The thickness of the third oxide semiconductor layer (not shown) may be appropriately determined according to the thickness of the channel layer 130, the thickness of the first oxide semiconductor layer 131, and the thickness of the second oxide semiconductor layer 132.

4 is a cross-sectional view illustrating an oxide thin film transistor according to another exemplary embodiment of the present invention.

An oxide thin film transistor according to another exemplary embodiment of the present invention will be described in more detail with reference to FIG. 4, and details overlapping with those described above with reference to an oxide thin film transistor manufacturing method according to an exemplary embodiment will be omitted. .

An oxide thin film transistor 100 according to another embodiment of the present invention includes a substrate 10; A gate 110 formed on the substrate 10; An insulator layer (120) formed on the gate (110); The insulator layer 120 includes a first oxide semiconductor layer 131 formed on the insulator layer 120 and a second oxide semiconductor layer 132 formed on the first oxide semiconductor layer 131. A channel layer 130 provided on; A source 140 provided on one side of the channel layer 130; And a drain 150 provided on the other side of the channel layer 130, wherein the first oxide semiconductor layer 131 may have a higher electrical conductivity than the second oxide semiconductor layer 132. .

The substrate 10 may function as a support layer on which the oxide thin film transistor 100 is formed. For example, the substrate 10 may be a plastic substrate, a silicon substrate, a compound semiconductor substrate, or the like, or may be a glass substrate. In addition, the substrate 10 may be flexible.

The gate 110 may be formed on the substrate 10, may be a gate of a conventional thin film transistor, and the material of the gate 110 may be a general electrode material, and may be made of a metal, a conductive oxide, or the like. For example, metals such as Ti, Pt, Ru, Au, Ag, Mo, Al, W, Cu, and the like, conductive oxides such as indium zinc oxide (IZO), indium tin oxide (ITO), and aluminum zinc oxide (AZO), etc. Can be formed.

The insulator layer 120 may be formed to cover the gate 110 on the gate 110, and may be a single layer or a multilayer. The insulator layer 120 may be formed of an oxide or a nitride, and a thickness of a portion of the insulator layer 120 formed on at least an upper surface of the gate 110 may be constant. That is, the insulator layer 120 may have a portion parallel to the top surface of the gate 110, which may be on the gate 110.

The channel layer 130 may be provided on the insulator layer 120, and the first oxide semiconductor layer 131 and the second oxide semiconductor layer 131 formed on the insulator layer 120 may be provided. The oxide semiconductor layer 132 may be included. The channel layer 130 may be formed of an oxide, may be an oxide layer not including silicon (Si), and may be positioned on the gate 110.

The first oxide semiconductor layer 131 may be formed on the insulator layer 120, and may be formed by activating the first oxide layer 131a deposited on the insulator layer 120. Here, the first oxide layer 131a may be in an insulating state before being activated, and may be activated to be changed to the first oxide semiconductor layer 131.

The second oxide semiconductor layer 132 may be formed on the first oxide semiconductor layer 131, and the second oxide layer 132a deposited on the first oxide semiconductor layer 131 may be activated. . Here, the second oxide layer 132a may be in an insulating state before being activated, and may be activated to be changed to the second oxide semiconductor layer 132. In this case, the second oxide semiconductor layer 132 may have different electrical conductivity from the first oxide semiconductor layer 131.

The source 140 may be provided on one side of the channel layer 130 and may be in contact with one side (or one side) of the channel layer 130.

The drain 150 may be provided on the other side of the channel layer 130 opposite to one side of the channel layer 130, may be in contact with the other side (or the other side) of the channel layer 130, and the source 140. ) Can be spaced apart.

Meanwhile, the source 140 and the drain 150 may include nickel (Ni), chromium (Cr), molybdenum (Mo), aluminum (Al), titanium (Ti), copper (Cu), tungsten (W), and alloys thereof. Can be made. The source 140 and the drain 150 may be formed of a single layer or multiple layers using the metal, and the source 140 and the drain 150 may be formed of a transparent conductive material. In this case, the source 140 and the drain 150 may be formed of the same or different material as the gate 110. For example, when the gate 110 is formed of a titanium / copper laminate, the source 140 and the drain 150 may also be formed of a titanium / copper laminate.

The first oxide semiconductor layer 131 may have a higher electrical conductivity than the second oxide semiconductor layer 132. In this case, when forming the second oxide semiconductor layer 132 having a relatively low electrical conductivity, the second oxide layer 132a may be activated by heat treatment at a temperature of 300 ° C. or less. Since the mobility of the channel layer 130 is mainly related to the electrical connection between the channel layer 130 and the gate 110, the electrical conductivity of the first oxide semiconductor layer 131 is increased to increase the electrical conductivity of the first oxide semiconductor layer 131. The electrical connection of the gate 110 may be stabilized, and thus the mobility of the channel layer 130 may be improved. As a result, the second oxide semiconductor layer 132 may have a lower electrical conductivity than the first oxide semiconductor layer 131.

The oxide thin film transistor 100 according to the present invention may be manufactured by an oxide thin film transistor manufacturing method according to an embodiment of the present invention.

The first oxide semiconductor layer 131 may be thinner than the second oxide semiconductor layer 132. In this case, the first oxide semiconductor layer 131 may be formed by irradiation of an electron beam on the first oxide layer 131a, and the second oxide semiconductor layer 132 may be formed by heat treatment of the second oxide layer 132a. have. Since the electron beam is irradiated from the upper portion of the first oxide layer 131a, when the thickness of the first oxide layer 131a is thick, sufficient energy is not transmitted to the inside of the first oxide layer 131a, and thus the first oxide layer 131a is not present. ), An unactivated part may occur. Accordingly, the first oxide semiconductor layer 131 may be formed to have a thin thickness so that the entire first oxide layer 131a may be activated to form the first oxide semiconductor layer 131.

Meanwhile, since sufficient carrier number must be secured for excellent electrical characteristics of the channel layer 130, the channel layer 130 may be formed to a predetermined thickness for sufficient carrier number. In this case, since the thickness of the first oxide semiconductor layer 131 is thin, the second oxide semiconductor layer 132 may be formed thicker than the first oxide semiconductor layer 131 to secure a predetermined thickness of the channel layer 130. As a result, a sufficient number of carriers may be secured in the channel layer 130.

For example, the thickness of the channel layer 130 may be 10 to 100 nm (preferably about 40 to 60 nm), and the thickness of the first oxide semiconductor layer 131 may be the second oxide semiconductor layer 132. The thickness of the first oxide semiconductor layer 131 may be about 0.5 to 23 nm (preferably about 2 to 14 nm), and the thickness of the second oxide semiconductor layer 132 may be about 5 to 30% of the thickness. About 8 to 95 nm (preferably about 31 to 57 nm). However, this may not be limited.

The substrate 10 may be a transparent substrate. For example, the transparent substrate may be a glass substrate. Since the oxide thin film transistor 100 of the present invention does not undergo a high temperature heat treatment process of more than 300 ° C., the oxide thin film transistor 100 can use a transparent substrate such as a glass substrate and also has a high mobility of the channel layer 130 applied to the glass substrate. The thin film transistor 100 may be provided.

The first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be formed of an oxide including indium, gallium, and zinc, and may include oxygen (O) and at least two or more elements selected from indium, gallium, and zinc. It may be an oxide containing. For example, the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be indium-gallium-zinc oxide (IGZO), indium-gallium-zinc-tin oxide (IGZTO), or zinc-galliumlium-zinc (ZnGaSnO). Tin oxide), indium zinc oxide (InZnO), and zinc oxide (ZnSnO). These oxides can be deposited at low temperatures (eg, below 300 ° C.) and have the advantage that large area deposition is easy. In addition, the uniformity of the first oxide semiconductor layer 131 may be improved by being uniformly deposited on the gate 110, and thus, the electrical connection between the first oxide semiconductor layer 131 and the gate 110 may be improved. Can be stabilized. In addition, the second oxide semiconductor layer 132 may be made of an oxide including indium, gallium, and zinc, and may be uniformly deposited on the first oxide semiconductor layer 131, thereby improving uniformity of the second oxide semiconductor layer 132. Can be.

Meanwhile, the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may include an oxide composed of the same component, and the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 are the same. It may also consist of components. For example, the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be made of the same material, may be made of the same material, or may be made of the same material. In order to form the first oxide semiconductor layer 131 by irradiating an electron beam on the first oxide layer 131a to improve the electrical conductivity of the first oxide semiconductor layer 131, the second oxide layer 132a is deposited. The surface roughness of the first oxide semiconductor layer 131 may be changed. In this case, a problem may occur such as the reproducibility and uniformity of electrical characteristics with the second oxide semiconductor layer 132 formed on the first oxide semiconductor layer 131. However, as in the present invention, when the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 include an oxide composed of the same component, the first oxide semiconductor layer 131 and the second oxide semiconductor layer Crystallographic matching between the interfaces of 132 may be well performed, and thus uniformity of the second oxide semiconductor layer 132 and / or the channel layer 130 may be improved, and the overall channel layer 130 may have a single characteristic. It can be similar to the channel layer consisting of the reproducibility of the electrical characteristics between the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 can be improved, the electrical characteristics and stability of the channel layer 130 Can be improved.

The first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be alternately stacked. In this case, the total volume of the first oxide semiconductor layer 131 having high electrical conductivity may increase in the channel layer 130, and thus the mobility of the channel layer 130 may be further improved.

In addition, the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be formed to be amorphous. When the channel layer 130 is made of crystalline, a problem may occur in that the on / off characteristics of the channel layer 130 are deteriorated or the semiconductor characteristics are lost. Accordingly, the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be formed amorphous.

The oxide thin film transistor 100 may obtain a uniform thin film at room temperature (about 25 ° C.) by using a deposition apparatus such as a sputter. In particular, an amorphous oxide semiconductor may have a higher electric field than amorphous silicon despite being in an amorphous state. It has the characteristics of mobility and can show excellent reliability even in the operation of the oxide thin film transistor 100. In addition, since the oxide thin film transistor 100 using an amorphous oxide semiconductor has an advantage of being transparent in the visible light region, the oxide thin film transistor 100 may be applied to a transparent display. For example, amorphous IGZO (α-IGZO) is a compound in which In and Ga are added to zinc oxide, and has a wurtzite crystal structure, which is a kind of hexagonal crystal structure. In α-IGZO, indium oxide (In ₂ O ₃ ) improves mobility, gallium oxide (Ga ₂ O ₃ ) is a charge suppression network stabilizer, and zinc oxide (ZnO) forms a network. The conduction band of α-IGZO is formed at the ns orbit of the metal ion, and the household conduction band is formed at the 2p orbit of the oxygen anion. In this case, a large radius metal cation may provide a path for effectively moving electrons because an orbital overlap phenomenon occurs with an adjacent cation. Therefore, the large overlap of these orbits and the spherical symmetry of the orbits make them less susceptible to Oxygen-Metal-Oxygen bonding angles and have greater mobility despite being amorphous. It becomes possible.

As described above, the amorphous oxide semiconductor layers 131 and 132 have high mobility despite being amorphous, so that the oxide thin film transistor 100 can be fabricated on a flexible plastic substrate by a low temperature process, and the oxide thin film transistor 100 is wide. The band gap has excellent transmittance and thus can serve as a driving element of the transparent display.

The oxide thin film transistor 100 of the present invention includes a buffer layer 50 provided on the substrate 10; And a protective layer 160 provided on the channel layer 130. The buffer layer 50 may be provided on the substrate 10, and the buffer layer 50 may be an insulating layer. For example, the buffer layer 50 may be made of a high dielectric material (eg, aluminum oxide, hafnium oxide, etc.) such as silicon oxide, silicon nitride, silicon oxynitride, metal oxide, and the like, and may be formed of a single layer or a multilayer film. have. In addition, the gate 110 may be formed on the buffer layer 50.

The passivation layer 160 may be provided on the channel layer 130, and may cover the channel layer 130 and at least a portion of the source 140 and the drain 150 on the channel layer 130. It can be formed as. The protective layer 160 may have a structure in which at least two or more of the silicon oxide layer, the silicon nitrate layer, the silicon nitride layer, the organic insulating layer, or the like are stacked. Since the oxide semiconductor layers 131 and 132 have a problem of reliability that they are vulnerable to external influences such as moisture, a protective layer 160 may be formed on the channel layer 130 to protect the oxide semiconductor layers 131 and 132 from external influences. Can be.

As described above, in the present invention, the mobility of the channel layer can be improved by forming a channel layer in a dual channel having different electrical conductivity on the gate (that is, by stacking a plurality of oxide semiconductor layers having different electrical conductivity). Can be. In addition, the electrical connection between the channel layer and the gate may be stabilized by making the first oxide semiconductor layer adjacent to the gate of the plurality of oxide semiconductor layers higher in electrical conductivity than the second oxide semiconductor layer on the opposite side, and thus the mobility of the channel layer may be stabilized. Can be improved. In addition, since the first oxide semiconductor layer is formed by irradiating an electron beam to the first oxide layer, a high temperature heat treatment process of more than 300 ° C. may not be performed to obtain high electrical conductivity, and other structures of the oxide thin film transistor may be affected (or Damage) can be prevented. In particular, when the glass substrate is used, there is a problem that the glass substrate is damaged at a high temperature of more than 300 ℃, the present invention does not perform a high temperature heat treatment process over 300 ℃, the oxide thin film transistor with improved mobility of the channel layer Can be applied to a glass substrate. On the other hand, since the first oxide semiconductor layer and the second oxide semiconductor layer are composed of oxides containing indium (In), gallium (Ga), and zinc (Zn) and contain the same components, the first oxide semiconductor layer and the second oxide are Crystallographic matching and the like between the interfaces of the semiconductor layers are well formed, so that a channel layer in which a plurality of oxide semiconductor layers are stacked (that is, composed of a dual channel) can be formed similarly to a channel layer in which the overall thin film characteristic is a single layer, Electrical properties and stability of the channel layer can be improved.

As used in the above description, the term “on” refers to the case where the surface is located directly opposite the upper (upper) or lower (lower) position but not in direct contact with the surface regardless of the position. Alternatively, it is possible not only to be located opposite to the entire lower surface, but also to be partially opposed to each other, and used as a means of facing away from the position or directly contacting the upper or lower surface regardless of its area. For example, “on a substrate” may be the surface (top or bottom surface) of the substrate, or may be the surface of a film deposited on the surface of the substrate. In addition, the meaning of “upper (or lower)” includes the case where the upper contact (or lower) is not in direct contact but located at the upper (or lower) point, and the height (or lower point) is higher regardless of the area. It is used to mean that it is sufficient to be located at, and is in the upper (or lower) position or is in direct contact with the upper (or lower) surface.

Although the preferred embodiments of the present invention have been shown and described above, the present invention is not limited to the above-described embodiments, and the general knowledge in the field of the present invention belongs without departing from the gist of the present invention as claimed in the claims. Those skilled in the art will appreciate that various modifications and equivalent other embodiments are possible therefrom. Therefore, the technical protection scope of the present invention will be defined by the claims below.

10: substrate 50: buffer layer
100 oxide thin film transistor 110 gate
120: insulator layer 130: channel layer
131: first oxide semiconductor layer 131a: first oxide layer
132: second oxide semiconductor layer 132a: second oxide layer
140: source 150: drain
160: protective layer

Claims (17)

Forming a gate on the substrate;
Forming an insulator layer on the gate; And
Forming a channel layer on the insulator layer;
The process of forming the channel layer,
Forming a first oxide semiconductor layer on the insulator layer; And
Forming a second oxide semiconductor layer having different electrical conductivity from the first oxide semiconductor layer on the first oxide semiconductor layer,
In the forming of the channel layer, the first oxide semiconductor layer is formed to a thickness thinner than the second oxide semiconductor layer.
Forming the first oxide semiconductor layer,
Depositing a first oxide layer in an insulated state on the insulator layer; And
Irradiating and activating an electron beam of 10 to 5,000 eV on the first oxide layer,
The first oxide semiconductor layer has a higher electrical conductivity than the second oxide semiconductor layer and is formed of an amorphous oxide thin film transistor. delete delete The method according to claim 1,
Forming the second oxide semiconductor layer,
Depositing a second oxide layer on the first oxide semiconductor layer; And
An oxide thin film transistor comprising the step of irradiating the second oxide layer at a temperature of 200 to 300 ℃, or irradiating an electron beam of a lower intensity on the second oxide layer than the process of irradiating an electron beam on the first oxide layer. Manufacturing method. The method according to claim 1,
The substrate is an oxide thin film transistor manufacturing method of a transparent substrate. delete delete The method according to claim 1,
And the first oxide semiconductor layer and the second oxide semiconductor layer are made of an oxide including indium, gallium, and zinc. The method according to claim 1,
The method of claim 1, wherein the first oxide semiconductor layer and the second oxide semiconductor layer include an oxide formed of the same component. The method according to claim 1,
The forming of the channel layer may be performed by alternately stacking the first oxide semiconductor layer and the second oxide semiconductor layer by repeating forming the first oxide semiconductor layer and forming the second oxide semiconductor layer a plurality of times. Oxide thin film transistor manufacturing method. Board;
A gate formed on the substrate;
An insulator layer formed on the gate;
A channel layer including a first oxide semiconductor layer formed on the insulator layer and a second oxide semiconductor layer formed on the first oxide semiconductor layer and provided on the insulator layer;
A source provided on one side of the channel layer; And
And a drain provided on the other side of the channel layer.
The first oxide semiconductor layer is formed amorphous by activating the first oxide layer of the insulating state deposited on the insulator layer through electron beam irradiation of 10 to 5,000 eV, has a higher electrical conductivity than the second oxide semiconductor layer, Thin oxide thin film transistor. delete The method according to claim 11,
The substrate is an oxide thin film transistor. The method according to claim 11,
And the first oxide semiconductor layer and the second oxide semiconductor layer are formed of an oxide including indium, gallium, and zinc. The method according to claim 11,
And the first oxide semiconductor layer and the second oxide semiconductor layer include an oxide formed of the same component. The method according to claim 11,
And the first oxide semiconductor layer and the second oxide semiconductor layer are alternately stacked. delete

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