KR20190051632A - Method for manufacturing oxide thin film transistor and oxide thin film transistor - Google Patents

Abstract

The present invention relates to a method of manufacturing an oxide thin film transistor and an oxide thin film transistor and, more specifically, to a method of manufacturing an oxide thin film transistor capable of improving mobility of a channel layer and an oxide thin film transistor. According to an embodiment of the present invention, the method of manufacturing an oxide thin film transistor comprises the following steps: forming a gate on a substrate; forming an insulator layer on the gate; and forming a channel layer on the insulator layer, wherein the step of forming of the channel layer includes the following steps of: forming a first oxide semiconductor layer on the insulator layer; and forming a second oxide semiconductor layer, which has a different electrical conductivity from the first oxide semiconductor layer, on the first oxide semiconductor layer.

Description

TECHNICAL FIELD The present invention relates to a method of manufacturing an oxide thin film transistor,

The present invention relates to a method of manufacturing an oxide thin film transistor and an oxide thin film transistor, and more particularly, to an oxide thin film transistor manufacturing method and an oxide thin film transistor capable of improving the mobility of a channel layer.

In line with the development of the display market, researches on thin film transistors have also been made to meet the required performance for high efficiency and next generation display applications. Transparent thin film transistors using oxide semiconductors have been actively studied at home and abroad.

A thin film transistor (i.e., an oxide thin film transistor) using an oxide as a channel is formed of ZnO (Zinc Oxide), IZO (Indium-Zinc Oxide), SZO (Silicon-Zinc Oxide), IGO (Indium-Gallium Oxide) IGZO (Indium-Gallium-Zinc Oxide), and the conventional ZnO-based or IGZO-based oxide thin film transistor has a mobility of about 10 cm 2 / Vs, Si, SiC, or GaN) as a channel, the mobility is lowered by about 1 to 2 orders. Therefore, higher mobility is required to improve the characteristics of the oxide thin film transistor.

Conventionally, in order to improve the characteristics of the oxide thin film transistor, the oxide channel layer is annealed at a temperature higher than 300 ° C to improve the mobility of the channel layer. In this case, due to the high temperature exceeding 300 ° C, (Or damage) to the substrate (e.g., substrate). Particularly, when a glass substrate is used, there is a problem that the glass substrate is damaged at a high temperature exceeding 300 캜.

Korean Patent Registration No. 10-1465114

The present invention provides an oxide thin film transistor manufacturing method and oxide thin film transistor capable of improving mobility of a channel layer through a dual channel having different electric conductivity.

A method of fabricating an oxide thin film transistor according to an embodiment of the present invention includes forming a gate on a substrate; Forming an insulator layer on the gate; And forming a channel layer on the insulator layer. The forming the channel layer includes: forming a first oxide semiconductor layer on the insulator layer; And forming a second oxide semiconductor layer having a different electrical conductivity from the first oxide semiconductor layer on the first oxide semiconductor layer.

The process of forming the first oxide semiconductor layer may include depositing a first oxide layer on the insulator layer; And irradiating an electron beam onto the first oxide layer.

In the process of irradiating the electron beam onto the first oxide layer, an electron beam of 10 to 5,000 eV may be irradiated.

The forming of the second oxide semiconductor layer may include: depositing a second oxide layer on the first oxide semiconductor layer; And irradiating the second oxide layer with a lower intensity electron beam than the process of annealing the second oxide layer at a temperature of 200 to 300 ° C or irradiating the electron beam onto the first oxide layer .

The substrate may be a transparent substrate.

In the process of forming the channel layer, the first oxide semiconductor layer may be formed to have a thickness smaller than that of the second oxide semiconductor layer.

The first oxide semiconductor layer may have a higher electrical conductivity than the second oxide semiconductor layer.

The first oxide semiconductor layer and the second oxide semiconductor layer may be made of an oxide including indium, gallium, and zinc.

The first oxide semiconductor layer and the second oxide semiconductor layer may include an oxide composed of the same component.

The channel layer may be formed by repeating the process of forming the first oxide semiconductor layer and the process of forming the second oxide semiconductor layer a plurality of times to form the first oxide semiconductor layer and the second oxide semiconductor layer, can do.

According to another aspect of the present invention, there is provided an oxide thin film transistor comprising: a substrate; A gate formed on the substrate; An insulator layer formed on the gate; A channel layer provided on the insulator layer, the channel layer including a first oxide semiconductor layer formed on the insulator layer and a second oxide semiconductor layer formed on the first oxide semiconductor layer; A source provided on one side of the channel layer; And a drain provided on the other side of the channel layer, wherein the first oxide semiconductor layer may have a higher electrical conductivity than the second oxide semiconductor layer.

The first oxide semiconductor layer may be thinner than the second oxide semiconductor layer.

The substrate may be a transparent substrate.

The first oxide semiconductor layer and the second oxide semiconductor layer may be made of an oxide including indium, gallium, and zinc.

The first oxide semiconductor layer and the second oxide semiconductor layer may include an oxide composed of the same component.

The first oxide semiconductor layer and the second oxide semiconductor layer may be alternately stacked.

The first oxide semiconductor layer and the second oxide semiconductor layer may be formed of amorphous.

The method of manufacturing an oxide thin film transistor according to an embodiment of the present invention can improve the mobility of a channel layer by forming a channel layer with a dual channel having different electric conductivity on a gate. Further, the electrical conductivity of the first oxide semiconductor layer adjacent to the gate of the plurality of oxide semiconductor layers is made higher than that of the second oxide semiconductor layer on the opposite side, so that the electrical connection between the channel layer and the gate can be stabilized, Can be improved.

Since the first oxide semiconductor layer is formed by irradiating the first oxide layer with an electron beam, a heat treatment process at a high temperature exceeding 300 ° C may not be performed to obtain a high electrical conductivity, Damage) can be prevented. Particularly, when a glass substrate is used, there is a problem that the glass substrate is damaged at a high temperature exceeding 300 ° C. In the present invention, since the heat treatment process at a high temperature exceeding 300 ° C. is not performed, Can be applied to a glass substrate.

On the other hand, since the first oxide semiconductor layer and the second oxide semiconductor layer are made of an oxide containing indium (In), gallium (Ga), and zinc (Zn) and contain the same component, the first oxide semiconductor layer and the second oxide semiconductor layer It is possible to form a channel layer in which a plurality of oxide semiconductor layers are stacked in a similar manner to a channel layer in which a whole thin film characteristic is a single layer, and the electrical characteristics and stability of the channel layer Can be improved.

1 is a flowchart illustrating a method of manufacturing an oxide thin film transistor according to an embodiment of the present invention.
2 is a cross-sectional view sequentially illustrating the formation of a channel layer according to an embodiment of the present invention;
3 is a graph for explaining electric conductivity improvement of an oxide layer through electron beam irradiation according to an embodiment of the present invention.
4 is a cross-sectional view illustrating an oxide thin film transistor according to another embodiment of the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. It will be apparent to those skilled in the art that the present invention may be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, It is provided to let you know. In the description, the same components are denoted by the same reference numerals, and the drawings are partially exaggerated in size to accurately describe the embodiments of the present invention, and the same reference numerals denote the same elements in the drawings.

1 is a flowchart illustrating a method of manufacturing an oxide thin film transistor according to an embodiment of the present invention.

Referring to FIG. 1, a method of fabricating an oxide thin film transistor according to an embodiment of the present invention includes forming a gate 110 on a substrate 10 (S100); Forming an insulator layer 120 on the gate 110 (S200); And forming a channel layer 130 on the insulator layer 120. Step S300 of forming the channel layer 130 may include forming a channel layer 130 on the insulator layer 120, (S310) a first oxide semiconductor layer (131) on the first oxide semiconductor layer (131); And forming a second oxide semiconductor layer 132 having a different electrical conductivity from the first oxide semiconductor layer 131 on the first oxide semiconductor layer 131 (S320).

First, a gate 110 is formed on a substrate 10 (S100). The gate 110 may be a gate of a conventional thin film transistor (TFT), and the gate 110 may be made of a metal or a conductive oxide. For example, a conductive oxide such as a metal such as Ti, Pt, Ru, Au, Ag, Mo, Al, W and Cu, IZO (Indium Zinc Oxide), ITO (Indium Tin Oxide) .

Next, an insulator layer 120 is formed on the gate 110 (S200). The insulator layer 120 may be formed to cover the gate 110, and may be a single layer or a multi-layer. The insulator layer 120 may be formed of an oxide or a nitride, and the thickness of at least a portion formed on the upper surface of the gate 110 in the insulator layer 120 may be constant. That is, the insulator layer 120 may have a portion parallel to the top surface of the gate 110, and this portion may be on the gate 110.

Next, a channel layer 130 is formed on the insulator layer 120 (S300). The channel layer 130 may be formed of an oxide, may be an oxide layer that does not include silicon (Si), and may be located on the gate 110.

The forming of the channel layer 130 (S300) may include forming a first oxide semiconductor layer 131 on the insulator layer 120 (S310); And forming a second oxide semiconductor layer 132 having a different electrical conductivity from the first oxide semiconductor layer 131 on the first oxide semiconductor layer 131 (S320). Here, the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be stacked to form the channel layer 130, and the channel layer 130 may be formed by a dual channel .

The mobility of the oxide thin film transistor 100 is improved by forming an oxide thin film layer having a high carrier concentration in the channel layer 130 in the oxide thin film transistor 100 having a bottom gate structure. And it is possible to further improve the mobility of the oxide thin film transistor 100 by forming an additional thin film on the oxide thin film layer having a high carrier concentration (i.e., the first oxide semiconductor layer).

In step S300 of forming the channel layer 130, the first oxide semiconductor layer 131 may be formed on the insulator layer 120 (S310). The first oxide semiconductor layer 131 may be formed by activating a first oxide layer 131a deposited on the insulator layer 120. Here, the first oxide layer 131a may be in an insulated state before being activated, and may be activated and converted into a first oxide semiconductor layer 131. [ At this time, the first oxide semiconductor layer 131 may be different from a transparent conductive oxide (TCO) such as ITO, and a transparent conductive oxide (TCO) such as ITO may be uniformly formed The first oxide semiconductor layer 131 can be uniformly formed. In the present invention, the first oxide semiconductor layer 131 may be uniformly formed on the gate 110 to improve electrical characteristics with the gate 110.

In the process of forming the channel layer 130, a second oxide semiconductor layer 132 having a different electrical conductivity from the first oxide semiconductor layer 131 may be formed on the first oxide semiconductor layer 131 (S320). The second oxide semiconductor layer 132 may be formed by activating a second oxide layer 132a deposited on the first oxide semiconductor layer 131. [ Here, the second oxide layer 132a may be in an insulating state before being activated, and may be activated and changed to the second oxide semiconductor layer 132. [ At this time, the second oxide semiconductor layer 132 may be different from the transparent conductive oxide (TCO) such as ITO and the transparent conductive oxide (TCO) can not be uniformly formed. However, . The second oxide semiconductor layer 132 may be uniformly formed on the first oxide semiconductor layer 131 in order to improve electrical characteristics between the gate 110 and the channel layer 130. The second oxide semiconductor layer 132 may have electrical conductivity different from that of the first oxide semiconductor layer 131. In this case, the oxide semiconductor layer 131 having relatively low electrical conductivity among the plurality of oxide semiconductor layers 131 and 132 or 132, the oxide layer 131a or 132a can be activated by heat treatment at a temperature of 300 ° C or lower (or at a low temperature).

2 (a) and 2 (b) are cross-sectional views sequentially illustrating the formation of a channel layer according to an embodiment of the present invention, wherein FIG. 2A shows deposition of a first oxide layer, 2 (c) shows the deposition of the second oxide layer.

Referring to FIG. 2, the process of forming the first oxide semiconductor layer 131 (S310) includes depositing a first oxide layer 131a on the insulator layer 120 (S311). And irradiating an electron beam (E-beam) on the first oxide layer 131a (S312).

In step S310 of forming the first oxide semiconductor layer 131, a first oxide layer 131a may be deposited on the insulator layer 120 as shown in FIG. 2A (S311). The first oxide layer 131a may include indium (In), gallium (Ga), zinc (Zn), and may be a layer containing at least two elements selected from the elements and oxygen (O) Lt; RTI ID = 0.0 > 5 < / RTI >

In step S310 of forming the first oxide semiconductor layer 131, an electron beam may be irradiated onto the first oxide layer 131a as shown in FIG. 2B (S312). The first oxide layer 131a can be activated by irradiating an electron beam. That is, the first oxide semiconductor layer 131 may be formed by irradiating the first oxide layer 131a deposited on the insulator layer 120 with an electron beam to activate the first oxide layer 131a. When the first oxide layer 131a is irradiated with an electron beam, the oxygen bonds in the first oxide layer 131a are cut off to form an oxygen vacancy, and oxygen deficiency is ionized to form electrons And can be an n-type semiconductor layer. More specifically, activation of the first oxide layer 131a using an electron beam accelerates a large amount of electrons extracted from a plasma source using only an electron beam having energy and irradiates the first oxide layer 131a to form a first oxide layer 131a. When electrons having relatively low energies of several keV are scanned and scanned over a large area, only the surface of the electrons collides with the surface of the electron beam evenly without any physical damage. Through this, the bond of oxygen which is coupled is cut off, oxygen deficiency is formed, and oxygen deficiency is ionized to emit electrons, which can be an n-type semiconductor layer.

If the first oxide semiconductor layer 131 is formed by irradiating the first oxide layer 131a with an electron beam (E-beam) as in the present invention, heat treatment at a high temperature exceeding 300 ° C and the first oxide semiconductor layer 131 having a high electrical conductivity can be formed. Accordingly, the electrical connection between the first oxide semiconductor layer 131 and the gate 110 can be stabilized, and the mobility of the channel layer 130 can be improved.

On the other hand, the E-beam differs from the laser beam and the material constituting the beam and the beam, and thus the magnitude of energy varies depending on the mass of each material. The laser beam and the ion beam are mainly used for the etching and processing of a thin film which is not easy for the post-treatment for stabilization and activation of the thin film, since the mass of the material is too large to damage the thin film when used for post-treatment of the thin film . However, in the case of an electron beam (E-beam), since electrons having the smallest mass are used, the energy from the mass of the material is small, so that no large daisy is given to the thin film, The stabilization and the improvement of the characteristics can be obtained.

In the step S312 of irradiating the electron beam onto the first oxide layer 131a, an electron beam of 10 to 5,000 eV may be irradiated. When the channel layer 130 is made of crystalline, on / off characteristics (or switching characteristics) of the channel layer 130 may deteriorate or semiconductor characteristics may be lost. When the electron beam is irradiated in an amount exceeding 5,000 eV, the first oxide semiconductor layer 131 can be crystallized. When the electron beam is irradiated at less than 10 eV, the first oxide layer 131a in an insulated state It may not be changed into the oxide semiconductor layer 131. The first oxide semiconductor layer 131 may be formed in an amorphous state by irradiating electron beams of 10 to 5,000 eV in the step of irradiating the first oxide layer 131a with an electron beam (S312).

Meanwhile, in the process of forming the second oxide semiconductor layer 132 (S320), a lower intensity electron beam is irradiated onto the second oxide layer 132a than the process of irradiating the electron beam on the first oxide layer 131a (S312) The electron beam is irradiated onto the first oxide layer 131a in the range of 10 to 5,000 eV so that the intensity of the electron beam is lower than that in the step of irradiating the electron beam on the first oxide layer 131a And the second oxide semiconductor layer 132 may be formed of an amorphous material.

The step of forming the second oxide semiconductor layer 132 (S320) may include depositing a second oxide layer 132a on the first oxide semiconductor layer 131 (S321); And electron beam irradiation on the first oxide layer 131a at a temperature of 200 to 300 占 폚 or S312 of irradiating the electron beam onto the second oxide layer 132a, (Step S322).

2C, a second oxide layer 132a may be deposited on the first oxide semiconductor layer 131 (S321) in the process of forming the second oxide semiconductor layer 132 (S320). The second oxide layer 132a may include indium, gallium, and zinc. The second oxide layer 132a may be a layer containing at least two elements selected from the group consisting of indium, gallium, and zinc, and oxygen (O) .

In the step of forming the second oxide semiconductor layer 132 (S320), the second oxide layer 132a may be thermally treated at a temperature of 200 to 300 ° C, and an electron beam may be irradiated onto the first oxide layer 131a The electron beam having a lower intensity than that in step S312 may be irradiated onto the second oxide layer 132a (S322).

The second oxide layer 132a may be formed by heat-treating the second oxide layer 132a at a temperature of 200 to 300 ° C to activate the second oxide layer 132a. Here, since the electrical conductivity of the first oxide semiconductor layer 131 can be increased through electron beam irradiation, the second oxide layer 132a can be activated by heat at a temperature of 300 ° C or lower. (Or damage) to other structures (for example, a substrate) of the oxide thin film transistor 100 may be caused by heat treatment at a high temperature exceeding 300 ° C. In particular, when the substrate 10 is a transparent substrate The substrate 10 may be damaged at a high temperature exceeding 300 ° C. On the other hand, if the second oxide layer 132a is annealed at a temperature lower than 200 ° C, the second oxide semiconductor layer 132 is not formed due to insufficient activation, or the electrical conductivity of the desired second oxide semiconductor layer 132 is obtained I can not.

On the other hand, there is a limitation in improving the electrical conductivity of the second oxide semiconductor layer 132 through the heat treatment at 200 to 300 ° C. However, since the second oxide semiconductor layer 132 is formed by activating the second oxide layer 132a There is no problem with Dee. At this time, if the heat treatment temperature is too high, the electrical characteristics can be improved. However, there is a critical point of improving the electrical characteristics, and the heat more than necessary causes damage to other structures of the oxide thin film transistor 100, It is possible to deteriorate the characteristics of the substrate 100. When the oxide layer 131a or 132a is heat-treated at a temperature higher than 300 ° C, an effect similar to the improvement of the electrical conductivity through electron beam irradiation can be obtained. However, due to adverse effects due to high temperature, a glass substrate, a flexible substrate, It is difficult to apply heat treatment at a high temperature exceeding 300 캜. The electrical characteristics of the second oxide layer 132a in the same state as the insulator are activated by the electrical characteristics of the second oxide semiconductor layer 132 through the heat treatment of the second oxide layer 132a, Can be used.

The second oxide layer 132a is activated by irradiating the second oxide layer 132a with an electron beam having a lower intensity than the step S312 of irradiating the first oxide layer 131a with the electron beam, (132) may be formed.

FIG. 3 is a graph for explaining electric conductivity improvement of an oxide layer through electron beam irradiation according to an embodiment of the present invention. FIG. 3 (a) is a graph for comparing annealing at 300.degree. (b) is a graph for comparing deactivation and heat treatment at 300 ° C.

Referring to FIG. 3, the second oxide layer 132a is activated by irradiating the second oxide layer 132a with an electron beam having a lower intensity than the step S312 of irradiating the electron beam onto the first oxide layer 131a . It is possible to control the electric conductivity of the oxide semiconductor layers 131 and 132 by controlling the intensity of the electron beam so that the second oxide layer 132a is irradiated with an electron beam on the first oxide layer 131a The second oxide semiconductor layer 132 having lower electrical conductivity than the first oxide semiconductor layer 131 can be formed by irradiating the electron beam.

The first oxide semiconductor layer 131 may have a higher electrical conductivity than the second oxide semiconductor layer 132. Since the mobility of the channel layer 130 mainly relates to the electrical connection between the channel layer 130 and the gate 110, the electrical conductivity of the first oxide semiconductor layer 131 is increased, The electrical connection of the gate 110 can be stabilized and the mobility of the channel layer 130 can be improved. Accordingly, the second oxide semiconductor layer 132 may have a lower electrical conductivity than the first oxide semiconductor layer 131.

The position of the oxide semiconductor layer 131 or 132 having a high electrical conductivity greatly affects the mobility of the channel layer 130 and the oxide semiconductor layer The first oxide semiconductor layer 131 serves as a carrier of a carrier in the oxide thin film transistor 100 by locating the first oxide semiconductor layer 131 having a higher carrier density of the oxide semiconductor layer 131, The movement of the thin film transistor 100 can be improved.

The second oxide semiconductor layer 132 may have a conductivity higher than that of the first oxide semiconductor layer 131. The second oxide semiconductor layer 131 may be heat treated at a high temperature exceeding 300 ° C, It is necessary to irradiate the second oxide layer 132a with an electron beam having an electron beam intensity equal to or higher than the electron beam intensity in the step S312 of irradiating the electron beam onto the second oxide layer 132a. In the case of performing the heat treatment at a high temperature exceeding 300 ° C, it is possible to affect other structures of the oxide thin film transistor 100, and the electron beam intensity in the step of irradiating the electron beam on the first oxide layer 131a A source 140 formed on the second oxide semiconductor layer 132 with a surface roughness of the second oxide semiconductor layer 132 at the top of the channel layer 130 changed due to electron beam irradiation, There may arise problems such as reproducibility and uniformity of electrical characteristics between the drain 150 and the protective layer 160. [

The substrate 10 may be a transparent substrate. For example, the transparent substrate may be a glass substrate. In the present invention, since the annealing process at a high temperature exceeding 300 ° C. is not performed, the oxide thin film transistor 100, which can use a transparent substrate such as a glass substrate and has improved mobility of the channel layer 130, can be applied to a glass substrate .

The first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be made of an oxide including indium, gallium, and zinc, and may include at least two elements selected from indium, gallium, and zinc and oxygen (O) / RTI > For example, the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be formed of indium-gallium-zinc oxide (IGZO), indium-gallium-zinc-tin oxide Gallium-Zinc-Tin Oxide (IGZTO), Zinc-Gallium-Tin Oxide (ZnGaSnO), Indium Zinc Oxide (InZnO), Zinc Tin Oxide (ZnSnO) And the oxide may be at least one of oxides. These oxides can be deposited at a low temperature (for example, 300 DEG C or less) and have an advantage of facilitating large-area deposition. The first oxide semiconductor layer 131 can be uniformly deposited on the gate 110 so that the uniformity of the first oxide semiconductor layer 131 can be improved and the electrical characteristics of the first oxide semiconductor layer 131 and the gate 110 can be improved. The connection can be more stabilized.

However, such oxide-based thin film transistors exhibit a mobility of about 10 cm2 / Vs, and thus have a mobility of 1 to 2 orders of magnitude more than thin film transistors using other materials (for example, Si, SiC or GaN) order, and it is necessary to secure a mobility of about 30 ㎠ / Vs or more in order to enable UD class large area display.

In the present invention, the first oxide semiconductor layer 131 is formed by irradiating the first oxide layer 131a with an electron beam to improve the electrical conductivity of the first oxide semiconductor layer 131, Can be secured. The second oxide semiconductor layer 132 may be made of an oxide including indium, gallium, and zinc and may be uniformly deposited on the first oxide semiconductor layer 131 and the uniformity of the second oxide semiconductor layer 132 may be Can be improved.

The first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may include an oxide having the same composition as the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132, ≪ / RTI > For example, the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be made of the same material (or oxide), and may be made of the same material or of the same material. When the first oxide semiconductor layer 131 is formed by irradiating an electron beam onto the first oxide layer 131a in order to improve the electrical conductivity of the first oxide semiconductor layer 131, the second oxide layer 132a is deposited The surface roughness of the first oxide semiconductor layer 131 may be changed. In this case, there may arise problems such as reproducibility and uniformity of electrical characteristics with the second oxide semiconductor layer 132 formed on the first oxide semiconductor layer 131. However, if the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 include the same oxide as the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132, Crystallinity matching between the interfaces of the second oxide semiconductor layer 132 and / or the channel layer 130 may be improved to improve the uniformity of the second oxide semiconductor layer 132 and / or the channel layer 130, The reproducibility of electrical characteristics between the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 can be improved and the electrical characteristics and stability of the channel layer 130 can be improved. Can be improved.

The first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may have different electrical conductivities through the different materials. In this case, however, the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be formed. The effect of the dual channel may not be exhibited because the crystallographic matching or the like is not performed between the interfaces of the channel regions 132. In the present invention, the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 include an oxide of the same component, thereby making the overall channel layer 130 similar to a single-layer channel layer. So that the effect of the dual channel can be maximized.

In other words, when a metal or another hetero-material is used as the material of the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132, a heterojunction interface, a schottky barrier, The first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 are made of the same kind of material as that of the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132, There may be no deterioration of the electrical characteristics of the oxide thin film transistor 100 due to the interface formation by the heterojunction or the Schottky barrier using the material or the like material.

In the step of forming the channel layer 130 (S300), the first oxide semiconductor layer 131 may be formed to a thickness smaller than that of the second oxide semiconductor layer 132. At this time, the first oxide layer 131a and the second oxide layer 132a may be deposited to have different thicknesses by a sputtering method. Since the electron beam is irradiated from the upper portion of the first oxide layer 131a, when the thickness of the first oxide layer 131a is thick, the electron beam is irradiated to the inside of the first oxide layer 131a The first oxide layer 131a may not be activated. Accordingly, the first oxide semiconductor layer 131 can be formed to have a small thickness so that the entire first oxide layer 131a can be activated and the first oxide semiconductor layer 131 can be formed. When an electron beam is irradiated onto the oxide layers 131a and 132a, an activation reaction occurs not only on the surfaces of the oxide layers 131a and 132a but also to an energy penetration depth of about several nm to several tens nm. The energy penetration depth may vary depending on the constituent materials of the oxide layers 131a and 132a and may be a thickness (or a thickness or less) corresponding to (or matched with) an energy penetration depth depending on the constituent materials of the oxide layers 131a and 132a. The first oxide layer 131a may be deposited on the first oxide layer 131a. Accordingly, the entire first oxide layer 131a may be activated to form the first oxide semiconductor layer 131.

On the other hand, a sufficient number of carriers must be secured for the excellent electrical characteristics of the channel layer 130, so that the channel layer 130 can be formed with a predetermined thickness for a sufficient number of carriers. Since the first oxide semiconductor layer 131 is thin at this time, the second oxide semiconductor layer 132 may be thicker than the first oxide semiconductor layer 131 in order to secure a predetermined thickness of the channel layer 130 So that a sufficient number of carriers can be secured in the channel layer 130.

For example, the channel layer 130 may have a thickness of 10 to 100 nm (preferably about 40 to 60 nm), and the thickness of the first oxide semiconductor layer 131 may be a thickness of the second oxide semiconductor layer 132, The thickness of the first oxide semiconductor layer 131 may be about 0.5 to about 23 nm (preferably about 2 to about 14 nm), the thickness of the second oxide semiconductor layer 132 may be about 5 to 30% About 8 to 95 nm (preferably about 31 to 57 nm). At this time, the ratio of the thickness of the first oxide semiconductor layer 131 to the thickness of the second oxide semiconductor layer 132 may be about 1: 3, the thickness of the first oxide semiconductor layer 131 is 1, Good electrical characteristics can be obtained when the thickness of the layer 132 is 3. The thickness of the first oxide semiconductor layer 131 may be determined according to the energy penetration depth of the electron beam and may be determined according to the thickness of the channel layer 130 and the thickness of the first oxide semiconductor layer 131. [ The thickness of the second oxide semiconductor layer 132 can be determined.

In the step of forming the channel layer 130 (S300), the first oxide layer 131a and the second oxide layer 132a may be deposited to have different thicknesses by sputtering. In the sputtering method, the thickness of the oxide layers 131a and 132a can be easily adjusted, and the oxide layers 131a and 132a can be densely deposited. On the other hand, the other deposition method (s) may have a faster deposition rate, but the oxide layers 131a and 132a can not be densely deposited. Accordingly, in the present invention, the first oxide layer 131a and the second oxide layer 132a are densely grown for the excellent electrical characteristics of the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 by sputtering The thicknesses of the oxide layers 131a and 132a can be easily adjusted and the first oxide layer 131a and the second oxide layer 132a can be deposited with different thicknesses.

The formation of the channel layer 130 S300 may include forming the first oxide semiconductor layer 131 and forming the second oxide semiconductor layer 132 a plurality of times The first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be alternately stacked. At this time, for the reproducibility and uniformity of electrical characteristics between the source 140, the drain 150, and the protective layer 160 formed on the channel layer 130, The second oxide semiconductor layer 132 whose roughness is unchanged can be formed. The channel layer 130 may be formed by alternately stacking the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132. In this case, the total volume of the first oxide semiconductor layer 131 having high electrical conductivity (Or the total ratio of the first oxide semiconductor layer in the channel layer) increases, the mobility of the channel layer 130 may be further improved.

The formation of the channel layer 130 S300 may include forming a third oxide semiconductor layer (S330) on the first oxide semiconductor layer 131 or the second oxide semiconductor layer 132 ). ≪ / RTI > A third oxide semiconductor layer (not shown) may be formed on the first oxide semiconductor layer 131 or the second oxide semiconductor layer 132 (S330). The third oxide semiconductor layer (not shown) may be formed on the top of the channel layer 130 or between the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132. The third oxide semiconductor layer (not shown) may have the same electrical conductivity as the second oxide semiconductor layer 132 or lower than the second oxide semiconductor layer 132 when formed at the top of the channel layer 130, When the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 are formed between the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132, The first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may have electrical conductivity between the electrical conductivity of the first oxide semiconductor layer 131 and the electrical conductivity of the second oxide semiconductor layer 132. At this time, the electrical conductivity of the first oxide semiconductor layer 131, the second oxide semiconductor layer 132, and / or the third oxide semiconductor layer (not shown) can be controlled by adjusting the intensity of the electron beam. The thickness of the third oxide semiconductor layer (not shown) may be properly determined according to the thickness of the channel layer 130, the thickness of the first oxide semiconductor layer 131, and the thickness of the second oxide semiconductor layer 132.

4 is a cross-sectional view illustrating an oxide thin film transistor according to another embodiment of the present invention.

Referring to FIG. 4, the oxide thin film transistor according to another embodiment of the present invention will be described in detail. However, the elements overlapping with those described above in connection with the method of manufacturing an oxide thin film transistor according to an embodiment of the present invention will be omitted .

An oxide thin film transistor 100 according to another embodiment of the present invention includes a substrate 10; A gate 110 formed on the substrate 10; An insulator layer 120 formed on the gate 110; A first oxide semiconductor layer 131 formed on the insulator layer 120 and a second oxide semiconductor layer 132 formed on the first oxide semiconductor layer 131, A channel layer 130 provided on the channel layer 130; A source 140 provided on one side of the channel layer 130; And a drain 150 provided on the other side of the channel layer 130. The first oxide semiconductor layer 131 may have a higher electrical conductivity than the second oxide semiconductor layer 132 .

The substrate 10 may function as a supporting layer on which the oxide thin film transistor 100 is formed. For example, the substrate 10 may be a plastic substrate, a silicon substrate, a compound semiconductor substrate, or the like, or may be a glass substrate. Further, the substrate 10 may be flexible.

The gate 110 may be formed on the substrate 10 and may be a gate of a conventional thin film transistor. The gate 110 may be a general electrode material, and may be formed of a metal, a conductive oxide, or the like. For example, a conductive oxide such as a metal such as Ti, Pt, Ru, Au, Ag, Mo, Al, W and Cu, IZO (Indium Zinc Oxide), ITO (Indium Tin Oxide) .

The insulator layer 120 may be formed to cover the gate 110 on the gate 110, and may be a single layer or a multi-layer. The insulator layer 120 may be formed of an oxide or a nitride, and the thickness of at least a portion formed on the upper surface of the gate 110 in the insulator layer 120 may be constant. That is, the insulator layer 120 may have a portion parallel to the top surface of the gate 110, and this portion may be on the gate 110.

The channel layer 130 may be provided on the insulator layer 120 and may include a first oxide semiconductor layer 131 formed on the insulator layer 120 and a second oxide semiconductor layer 131 formed on the first oxide semiconductor layer 131. [ And an oxide semiconductor layer 132. The channel layer 130 may be formed of an oxide, may be an oxide layer that does not include silicon (Si), and may be located on the gate 110.

The first oxide semiconductor layer 131 may be formed on the insulator layer 120 and may be formed by activating the first oxide layer 131a deposited on the insulator layer 120. Here, the first oxide layer 131a may be in an insulated state before being activated, and may be activated and converted into a first oxide semiconductor layer 131. [

The second oxide semiconductor layer 132 may be formed on the first oxide semiconductor layer 131 and the second oxide layer 132a deposited on the first oxide semiconductor layer 131 may be activated . Here, the second oxide layer 132a may be in an insulating state before being activated, and may be activated and changed to the second oxide semiconductor layer 132. [ At this time, the second oxide semiconductor layer 132 may have electrical conductivity different from that of the first oxide semiconductor layer 131.

The source 140 may be provided on one side of the channel layer 130 and may be in contact with one side (or one side) of the channel layer 130.

The drain 150 may be provided on the other side of the channel layer 130 facing one side of the channel layer 130 and may contact the other side (or the other side) of the channel layer 130, ). ≪ / RTI >

The source 140 and the drain 150 may be formed of a material selected from the group consisting of Ni, Cr, Mo, Al, Ti, Cu, ≪ / RTI > The source 140 and the drain 150 may be formed of a single film or multiple films using the metal and the source 140 and the drain 150 may be formed of a transparent conductive material. At this time, the source 140 and the drain 150 may be formed of the same material as or different from the gate 110. For example, when the gate 110 is formed of a titanium / copper laminated film, the source 140 and the drain 150 may also be formed of a titanium / copper laminated film.

The first oxide semiconductor layer 131 may have a higher electrical conductivity than the second oxide semiconductor layer 132. In this case, when forming the second oxide semiconductor layer 132 having a relatively low electrical conductivity, the second oxide layer 132a can be activated by heat treatment at a temperature of 300 ° C or lower. Since the mobility of the channel layer 130 mainly relates to the electrical connection between the channel layer 130 and the gate 110, the electrical conductivity of the first oxide semiconductor layer 131 is increased, The electrical connection of the gate 110 can be stabilized and the mobility of the channel layer 130 can be improved. Accordingly, the second oxide semiconductor layer 132 may have a lower electrical conductivity than the first oxide semiconductor layer 131.

The oxide thin film transistor 100 according to the present invention can be manufactured by a method for manufacturing an oxide thin film transistor according to an embodiment of the present invention.

The first oxide semiconductor layer 131 may be thinner than the second oxide semiconductor layer 132. At this time, the first oxide semiconductor layer 131 may be formed by irradiating the first oxide layer 131a with an electron beam, and the second oxide semiconductor layer 132 may be formed by heat-treating the second oxide layer 132a. have. Since the electron beam is irradiated from the top of the first oxide layer 131a, when the thickness of the first oxide layer 131a is large, sufficient energy is not transferred into the first oxide layer 131a, ) May not be activated. Accordingly, the first oxide semiconductor layer 131 can be formed to have a small thickness so that the entire first oxide layer 131a can be activated and the first oxide semiconductor layer 131 can be formed.

On the other hand, a sufficient number of carriers must be secured for the excellent electrical characteristics of the channel layer 130, so that the channel layer 130 can be formed with a predetermined thickness for a sufficient number of carriers. Since the first oxide semiconductor layer 131 is thin at this time, the second oxide semiconductor layer 132 may be thicker than the first oxide semiconductor layer 131 in order to secure a predetermined thickness of the channel layer 130 So that a sufficient number of carriers can be secured in the channel layer 130.

For example, the channel layer 130 may have a thickness of 10 to 100 nm (preferably about 40 to 60 nm), and the thickness of the first oxide semiconductor layer 131 may be a thickness of the second oxide semiconductor layer 132, The thickness of the first oxide semiconductor layer 131 may be about 0.5 to about 23 nm (preferably about 2 to about 14 nm), the thickness of the second oxide semiconductor layer 132 may be about 5 to 30% About 8 to 95 nm (preferably about 31 to 57 nm). However, the present invention is not limited thereto.

The substrate 10 may be a transparent substrate. For example, the transparent substrate may be a glass substrate. The oxide thin film transistor 100 of the present invention does not undergo a heat treatment process at a high temperature exceeding 300 캜 and can use a transparent substrate such as a glass substrate, The thin film transistor 100 can be provided.

The first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be made of an oxide including indium, gallium, and zinc, and may include at least two elements selected from indium, gallium, and zinc and oxygen (O) / RTI > For example, the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be formed of indium-gallium-zinc oxide (IGZO), indium gallium-zinc-tin oxide (IGZTO), zinc gallium- Tin Oxide (ITO), Indium Zinc Oxide (InZnO), and Zinc Tin Oxide (ZnSnO). These oxides can be deposited at a low temperature (for example, 300 DEG C or less) and have an advantage of facilitating large-area deposition. The first oxide semiconductor layer 131 may be uniformly deposited on the gate 110 to improve the uniformity of the first oxide semiconductor layer 131 and thus the electrical connection between the first oxide semiconductor layer 131 and the gate 110 may be improved. Can be stabilized. The second oxide semiconductor layer 132 may be made of an oxide including indium, gallium, and zinc and may be uniformly deposited on the first oxide semiconductor layer 131, and the uniformity of the second oxide semiconductor layer 132 may be improved. .

The first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may include an oxide of the same component and the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be the same Component. For example, the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be made of the same material, the same material, or the same material. When the first oxide semiconductor layer 131 is formed by irradiating an electron beam onto the first oxide layer 131a in order to improve the electrical conductivity of the first oxide semiconductor layer 131, the second oxide layer 132a is deposited The surface roughness of the first oxide semiconductor layer 131 may be changed. In this case, there may arise problems such as reproducibility and uniformity of electrical characteristics with the second oxide semiconductor layer 132 formed on the first oxide semiconductor layer 131. However, if the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 include the same oxide as the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132, Crystallinity matching between the interfaces of the second oxide semiconductor layer 132 and / or the channel layer 130 may be improved to improve the uniformity of the second oxide semiconductor layer 132 and / or the channel layer 130, The reproducibility of electrical characteristics between the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 can be improved and the electrical characteristics and stability of the channel layer 130 can be improved. Can be improved.

The first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be alternately stacked. In this case, the total volume of the first oxide semiconductor layer 131 having a high electrical conductivity can be increased in the channel layer 130, and the mobility of the channel layer 130 can be further improved.

In addition, the first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be formed of amorphous. When the channel layer 130 is made of crystalline, on / off characteristics of the channel layer 130 may deteriorate or semiconductor characteristics may be lost. The first oxide semiconductor layer 131 and the second oxide semiconductor layer 132 may be formed of amorphous materials.

The oxide thin film transistor 100 can obtain a uniform thin film at a room temperature (about 25 ° C) by using a deposition apparatus such as a sputter. Especially, in the case of an amorphous oxide semiconductor, And the oxide thin film transistor 100 can exhibit excellent reliability even in the operation of the oxide thin film transistor 100. FIG. In addition, since the oxide thin film transistor 100 using an amorphous oxide semiconductor has an advantage of being transparent in a visible light region, it can be applied to a transparent display. For example, amorphous IGZO (α-IGZO) is a compound in which zinc and zinc are added to zinc-oxide and has a Wurtzite crystal structure, which is a type of hexagonal crystal structure , indium oxide (In ₂ O ₃ ) in α-IGZO improves mobility, gallium oxide (Ga ₂ O ₃ ) is a charge control network stabilizer, and zinc oxide (ZnO) forms a network. The conduction band of α-IGZO is formed in the ns orbit of the metal ion, and the electrical charge band is formed in the 2p orbit of the oxygen anion. At this time, metal cations with a large radius can provide a path for effectively moving electrons because of a large occurrence of orbital overlap with adjacent cations. Therefore, it is less influenced by the oxygen-metal-oxygen coupling angle because of the large overlap of the orbit and the spherical symmetry of the orbit, and it has a large mobility even in the amorphous state .

Since the amorphous oxide semiconductor layers 131 and 132 have a high mobility even though they are amorphous, the oxide thin film transistor 100 can be fabricated on a bent plastic substrate since a low temperature process can be performed. The bandgap has an excellent transmittance and can act as a driving element of a transparent display.

An oxide thin film transistor (100) of the present invention includes a buffer layer (50) provided on a substrate (10); And a protective layer 160 provided on the channel layer 130. The buffer layer 50 may be provided on the substrate 10, and the buffer layer 50 may be an insulating layer. For example, the buffer layer 50 may be made of a high dielectric material such as silicon oxide, silicon nitride, silicon oxynitride, metal oxide and the like (e.g., aluminum oxide, hafnium oxide, etc.) have. Further, a gate 110 may be formed on the buffer layer 50. [

And a passivation layer 160 may be provided on the channel layer 130 and may include a channel layer 130 and a shape that covers at least a portion of the source 140 and the drain 150 As shown in FIG. The protective layer 160 may have a structure in which a silicon oxide layer, a silicon oxynitride layer, a silicon nitride layer, an organic insulating layer, or a stacked structure of at least two or more thereof. Since the oxide semiconductor layers 131 and 132 have reliability problems that they are vulnerable to external influences such as moisture and the like, a protective layer 160 is formed on the channel layer 130 to protect the oxide semiconductor layers 131 and 132 from external influences .

As described above, in the present invention, by forming a channel layer on a gate with a dual channel (i.e., a plurality of oxide semiconductor layers having different electrical conductivities) having different electrical conductivities, the mobility of the channel layer can be improved . Further, the electrical conductivity of the first oxide semiconductor layer adjacent to the gate of the plurality of oxide semiconductor layers is made higher than that of the second oxide semiconductor layer on the opposite side, so that the electrical connection between the channel layer and the gate can be stabilized, Can be improved. Since the first oxide semiconductor layer is formed by irradiating the first oxide layer with an electron beam, a heat treatment process at a high temperature exceeding 300 ° C may not be performed to obtain a high electrical conductivity, Damage) can be prevented. Particularly, when a glass substrate is used, there is a problem that the glass substrate is damaged at a high temperature exceeding 300 ° C. In the present invention, since the heat treatment process at a high temperature exceeding 300 ° C. is not performed, Can be applied to a glass substrate. On the other hand, since the first oxide semiconductor layer and the second oxide semiconductor layer are made of an oxide containing indium (In), gallium (Ga), and zinc (Zn) and contain the same component, the first oxide semiconductor layer and the second oxide semiconductor layer Crystallization matching between the interfaces of the semiconductor layers can be performed well to form a channel layer in which a plurality of oxide semiconductor layers are stacked (i.e., made of a dual channel) similar to a channel layer having a single thin film property as a whole, The electrical characteristics and stability of the channel layer can be improved.

The term " on " used in the above description includes the case where the upper surface (upper side) or the lower side (lower side) of the upper surface Or they may be located opposite to the entire lower surface as well as partially opposed to each other, regardless of their area, they are used to mean facing away from each other or directly contacting the upper or lower surface. For example, " on substrate " may be the surface (upper or lower surface) of the substrate, or it may be the surface of the film deposited on the surface of the substrate. The term " upper part (or lower part) " means that the upper part (or the lower part) includes a case where the upper part (or lower part) (Or down) or in direct contact with the upper (or lower) surface.

While the present invention has been particularly shown and described with reference to exemplary embodiments thereof, it is clearly understood that the same is by way of illustration and example only and is not to be construed as limited to the embodiments set forth herein. Those skilled in the art will appreciate that various modifications and equivalent embodiments may be possible. Accordingly, the technical scope of the present invention should be defined by the following claims.

10: substrate 50: buffer layer
100: oxide thin film transistor 110: gate
120: insulator layer 130: channel layer
131: first oxide semiconductor layer 131a: first oxide layer
132: second oxide semiconductor layer 132a: second oxide layer
140: source 150: drain
160: protective layer

Claims (17)

Forming a gate on a substrate;
Forming an insulator layer on the gate; And
And forming a channel layer on the insulator layer,
The forming of the channel layer may include:
Forming a first oxide semiconductor layer on the insulator layer; And
And forming a second oxide semiconductor layer having a different electrical conductivity from the first oxide semiconductor layer on the first oxide semiconductor layer. The method according to claim 1,
The forming of the first oxide semiconductor layer includes:
Depositing a first oxide layer on the insulator layer; And
And irradiating an electron beam onto the first oxide layer. The method of claim 2,
And irradiating an electron beam of 10 to 5,000 eV in the process of irradiating the electron beam onto the first oxide layer. The method according to claim 1,
The forming of the second oxide semiconductor layer may include:
Depositing a second oxide layer on the first oxide semiconductor layer; And
Irradiating the second oxide layer with an electron beam having a lower intensity than a process of annealing the second oxide layer at a temperature of 200 to 300 DEG C or irradiating the electron beam onto the first oxide layer, Gt; The method according to claim 1,
Wherein the substrate is a transparent substrate. The method according to claim 1,
Wherein the first oxide semiconductor layer is thinner than the second oxide semiconductor layer in the process of forming the channel layer. The method according to claim 1,
Wherein the first oxide semiconductor layer has higher electrical conductivity than the second oxide semiconductor layer. The method according to claim 1,
Wherein the first oxide semiconductor layer and the second oxide semiconductor layer are made of an oxide including indium, gallium, and zinc. The method according to claim 1,
Wherein the first oxide semiconductor layer and the second oxide semiconductor layer include an oxide composed of the same component. The method according to claim 1,
The channel layer may be formed by repeating the process of forming the first oxide semiconductor layer and the process of forming the second oxide semiconductor layer a plurality of times to form the first oxide semiconductor layer and the second oxide semiconductor layer, Lt; / RTI > Board;
A gate formed on the substrate;
An insulator layer formed on the gate;
A channel layer provided on the insulator layer, the channel layer including a first oxide semiconductor layer formed on the insulator layer and a second oxide semiconductor layer formed on the first oxide semiconductor layer;
A source provided on one side of the channel layer; And
And a drain provided on the other side of the channel layer,
Wherein the first oxide semiconductor layer has higher electrical conductivity than the second oxide semiconductor layer. The method of claim 11,
Wherein the first oxide semiconductor layer is thinner than the second oxide semiconductor layer. The method of claim 11,
Wherein the substrate is a transparent substrate. The method of claim 11,
Wherein the first oxide semiconductor layer and the second oxide semiconductor layer are made of an oxide including indium, gallium, and zinc. The method of claim 11,
Wherein the first oxide semiconductor layer and the second oxide semiconductor layer include an oxide composed of the same component. The method of claim 11,
Wherein the first oxide semiconductor layer and the second oxide semiconductor layer are alternately laminated. The method of claim 11,
Wherein the first oxide semiconductor layer and the second oxide semiconductor layer are formed of amorphous.

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