KR101989829B1 - Liquid crystal display device and method for driving the same - Google Patents

Abstract

The present invention relates to a liquid crystal display device capable of reducing power consumption and improving display quality by improving image characteristics (color difference, smear, crosstalk) and a driving method thereof.
A driving method of a liquid crystal display device according to an embodiment of the present invention is a driving method of a liquid crystal display device having a double reduced data (DRD) pixel structure, wherein the order in which scan signals are supplied to gate lines in units of 8 gate lines Repeatedly turning on the plurality of sub-pixels, and supplying the data voltage in the form of a vertically four-dot version to the sub-pixels turned on by the scan signal.

Description

TECHNICAL FIELD [0001] The present invention relates to a liquid crystal display device and a method of driving the same,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a driving method thereof that can reduce power consumption and improve image quality (color difference, smear, crosstalk)

Liquid crystal display devices have been popularized with advances in mass production technology, ease of driving means, low power consumption, realization of high image quality and large screen realization, and application fields are continuously expanding.

1 is a diagram showing a pixel structure and a pixel driving sequence of a liquid crystal display device according to the related art. 1 shows a part of pixels formed in a matrix form on a liquid crystal panel.

1, a liquid crystal panel is formed with a plurality of gate lines GL and a plurality of data lines DL so as to intersect with each other, a pixel region is defined, and red (R), green (G) (B) sub-pixels SP are formed. R, G and B sub-pixels of three colors are gathered to constitute one unit pixel (P). A full color image is displayed by adjusting the transmittance of light emitted from each backlight unit (not shown) to each sub-pixel.

A liquid crystal display device has a structure in which a data voltage having a polarity opposite to each other in a unit of a frame, a unit of a line, a unit of a column, or a dot is interchangeably applied to a pixel The inversion method is applied.

FIG. 1 shows a double reduced data (DRD) structure in which gate lines GL are formed above and below sub-pixels and one sub-pixel shares one data line DL. The data voltage is applied in a version of 2 dots (2 dots), and the pixel is driven in the Z-inversion mode, and the pixel is driven in a horizontal 2 dot (H-2 dot) form.

FIG. 2 is a view showing a problem in which a defective image is generated in a liquid crystal display device according to the related art.

Referring to FIG. 2, the liquid crystal display device according to the related art can reduce the manufacturing cost of the data driver by sharing the data signal for one horizontal (1H) time. However, since the pixels are driven in the Z-inversion driving sequence and the data voltages are supplied to the pixels in the horizontal two-dot (H-2 dot) form, defects may occur in a specific screen.

In addition, since the parasitic capacitance of the pixel element is increased, the consumption current is increased and the power consumption is increased as compared with a general pixel structure in which the data line is not shared.

The positive polarity (+) and the negative polarity (-) are generated asymmetrically when the data voltage is charged in the red, green, and blue pixels, Resulting in instability, color difference, smear, and showdown CT are generated.

SUMMARY OF THE INVENTION The present invention provides a liquid crystal display device and a method of driving the same that can reduce power consumption when driving a pixel structure of a DRD scheme.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems and it is an object of the present invention to provide a liquid crystal display device capable of improving image quality such as color difference, smear and showdown crosstalk by applying inversion driving in a pixel structure of a DRD scheme, And a driving method thereof.

Other features and advantages of the invention will be set forth in the description which follows, or may be obvious to those skilled in the art from the description and the claims.

A liquid crystal display device according to an embodiment of the present invention includes a plurality of gate lines and a plurality of data lines formed to have a double reduced data (DRD) pixel structure; A gate driver for supplying a scan signal to the plurality of gate lines; A data driver for supplying a data voltage to the plurality of data lines; And a timing controller for controlling the driving of the gate driver and the data driver, wherein the order of supplying the scan signals to the gate lines in units of eight gate lines is repeated, and the data voltages in the form of a vertically four- To the plurality of data lines.

A driving method of a liquid crystal display device according to an embodiment of the present invention is a driving method of a liquid crystal display device having a double reduced data (DRD) pixel structure, wherein the order in which scan signals are supplied to gate lines in units of 8 gate lines And a plurality of sub-pixels are repeatedly turned on to supply a data voltage in the form of a vertically four-dot version to the sub-pixels turned on by the scan signal.

The liquid crystal display device and the driving method thereof according to the embodiment of the present invention can reduce the power consumption when driving the DRD type pixel structure.

The liquid crystal display device and the driving method thereof according to the embodiment of the present invention can improve the display quality by improving image characteristics such as color difference, smear and showdown crosstalk when applying inversion driving in the DRD type pixel structure .

The liquid crystal display device according to the embodiment of the present invention can form the pixel elements symmetrically.

Other features and effects of the present invention may be newly understood through the embodiments of the present invention in addition to the features and effects of the present invention mentioned above.

1 is a diagram showing a pixel structure and a pixel driving sequence of a liquid crystal display device according to the related art.
FIG. 2 is a view showing a problem in which a defective image is generated in a liquid crystal display device according to the related art.
3 is a view schematically showing a liquid crystal display device according to an embodiment of the present invention.
4 is a diagram illustrating a pixel structure and a pixel driving sequence of a liquid crystal display device according to an embodiment of the present invention.
5 is a view illustrating a driving method of a liquid crystal display device according to an embodiment of the present invention.
6 is a diagram showing polarities of data voltages supplied to pixels of a liquid crystal display device according to an embodiment of the present invention.

Various liquid crystal panels such as TN (Twisted Nematic) mode, VA (Vertical Alignment) mode, IPS (In Plane Switching) mode and FFS (Fringe Field Switching) mode have been developed according to a method of controlling the arrangement of liquid crystal layers.

In the TN mode and the VA mode, a pixel electrode is disposed on a lower substrate, a common electrode is disposed on an upper substrate, and a liquid crystal layer is aligned by a vertical electric field between the pixel electrode and the common electrode.

In the IPS mode and the FFS mode, a pixel electrode and a common electrode are disposed on a lower substrate, and the alignment of the liquid crystal layer is adjusted by a horizontal electric field between the pixel electrode and the common electrode.

In particular, in the IPS mode, the pixel electrode and the common electrode are alternately arranged in parallel so that a horizontal electric field is generated between the both electrodes to adjust the arrangement of the liquid crystal layer.

In such an IPS mode, the alignment of the liquid crystal layer in the upper portion of the pixel electrode and the common electrode is not adjusted, and the transmittance of light is reduced in the region.

The FFS mode is designed to overcome the shortcomings of the IPS mode. In the FFS mode, the pixel electrode and the common electrode are formed to be spaced apart with an insulating layer therebetween.

At this time, one electrode is formed in a plate shape or a pattern and the other electrode is formed in a finger shape, and the arrangement of the liquid crystal layer is controlled through a fringe field generated between the electrodes Method.

The liquid crystal display device according to the embodiment of the present invention may be applied to both the TN mode, the VA mode, the IPS mode, and the FFS mode.

Hereinafter, a liquid crystal display device and a driving method thereof according to an embodiment of the present invention will be described with reference to the accompanying drawings.

FIG. 3 is a view schematically showing a liquid crystal display device according to an embodiment of the present invention, and FIG. 4 is a diagram illustrating a pixel structure and a pixel driving sequence of a liquid crystal display device according to an embodiment of the present invention.

3 and 4, a liquid crystal display device according to an embodiment of the present invention includes a display panel 100, a gate driver 200, a data driver 300, and a timing controller 400. Also, a backlight unit and a power supply unit, not shown, are included.

The display panel 100 includes an upper substrate and a lower substrate bonded together with a liquid crystal layer interposed therebetween.

On the upper substrate, red, green, and blue color filters for displaying color images are formed in a matrix form. A black matrix is formed between the red, green, and blue color pillars to separate the sub-pixel regions and prevent optical interference between adjacent sub-pixels, and an overcoat layer for planarizing the upper substrate.

A plurality of gate lines GL and a plurality of data lines DL are formed so as to cross each other on the lower substrate, and pixel regions are defined by the intersection of the gate lines and the data lines.

One pixel is composed of red (R), green (G) and blue (B) sub-pixels of three colors, and each sub-pixel is provided with a thin film transistor (TFT), a storage capacitor (Cst) A pixel electrode is formed.

Pixels are formed in a double reduced data (DRD) structure in which a gate line GL is formed above and below a sub-pixel and one sub-pixel is shared by one sub-pixel DL.

Here, in order to adjust the alignment of the liquid crystal layer, a common electrode may be formed on the lower substrate or the upper substrate. When the TN mode or the VA mode is applied, a common electrode is formed on the upper substrate. On the other hand, when the IPS mode or the FFS mode is applied, a common electrode is formed on the lower substrate.

Here, the gate electrode of the TFT is connected to the gate line GL, the source electrode thereof is connected to the data line DL, and the drain electrode thereof is connected to the pixel electrode.

The display panel 100 including the above-described structure changes the arrangement of the liquid crystals by using the data voltage supplied to the sub-pixels, that is, the pixel voltage and the electric field corresponding to the common voltage Vcom supplied to the common electrode, To adjust the transmittance by light from the backlight unit. The light transmitted through the red, green, and blue color filters is emitted as a unique color light to display a color image.

The timing controller 400 converts the input video signal data into the digital video data R, G, and B based on the input timing signal TS and outputs digital video data And supplies it to the data driver 300. The timing signal TS includes a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, and a clock signal CLK.

The timing controller 400 receives the gate control signal GCS for controlling the gate driver 200 and the gate driver control signal GCS using the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, and the clock signal CLK, The data control signal DCS for the control of the control unit 300 is generated. Supplies the gate control signal GCS to the gate driver 200 and supplies the data control signal DCS to the data driver 300. [

The data control signal DCS includes a source start pulse (SSP), a source sampling clock (SSC), a source output enable (SOE) and a polarity control signal (POL) . ≪ / RTI >

The gate control signal GCS may include a gate start pulse (GSP), a gate shift clock (GSC), and a gate output enable (GOE).

In addition, the timing controller 400 may generate a backlight control signal for controlling the backlight based on the input image data and the timing signal TS to control the driving of the backlight driver.

The gate driver 200 generates a scan signal (gate drive signal) for driving the TFT formed on each of the plurality of pixels based on a gate control signal (GCS) from the timing controller 400 . The generated scan signal is supplied to a plurality of gate lines formed in the display panel 100 during one frame period.

5 is a view illustrating a driving method of a liquid crystal display device according to an embodiment of the present invention.

5, when the generated scan signal is supplied to a plurality of gate lines formed on the display panel 100, the gate driver 200 supplies a scan signal to the gate lines in sequence from the first gate line to the last gate line, The scan signal is supplied in the order set in the scan signal.

The order in which the scan signals are supplied in units of eight gate lines is repeated. The first gate line GL1, the fourth gate line GL4, the second gate line GL2 and the third gate line GL3 ), The sixth gate line (GL6), the seventh gate line (GL7), the seventh gate line (GL5), and the eighth gate line (GL8). The TFT formed in each sub pixel is turned on by the scan signal supplied to the gate line so that the data voltage can be supplied to the sub pixel.

The data driver 300 includes a plurality of source driver ICs, and each source driver IC converts the digital image data supplied from the timing controller 400 into analog image data, that is, a data voltage. On the basis of the data control signal (DCS: Data Control Signal) from the timing controller 400, a data voltage of one horizontal line is supplied to the plurality of To the data line.

In addition, a common voltage Vcom is supplied to the common electrodes formed on the plurality of pixels formed on the display panel 100. An electric field is formed in each pixel by the data voltage supplied to each of the plurality of pixels and the common voltage Vcom and the light transmittance of each pixel can be controlled by arranging the liquid crystal by the electric field.

6 is a diagram showing polarities of data voltages supplied to pixels of a liquid crystal display device according to an embodiment of the present invention.

Referring to FIGS. 5 and 6, the order in which the scan signals are supplied to the gate lines in units of eight gate lines is repeated to turn on the plurality of sub-pixels, and the sub-pixels turned on by the scan signals V-4dot).

Specifically, the data voltage is input in the form of a vertically four-dot (V-4 dot) version, and the scan signal is applied to the first gate line GL1, the fourth gate line GL4, Gate line GL2? Third gate line GL3? Sixth gate line GL6? Seventh gate line GL7? Fifth gate line GL5? Eighth gate line GL8? Respectively.

The sub-pixels of the first horizontal line are formed between the first gate line GL1 and the second gate line GL2.

A scan signal is supplied to the first gate line GL1 to supply the data voltage to the sub-pixels connected to the first gate line GL1 among the sub-pixels formed in the first horizontal line.

A scan signal is supplied to the second gate line GL2 to supply the data voltage to the sub-pixels connected to the second gate line GL2 among the sub-pixels formed in the first horizontal line.

Accordingly, the data voltages of (+) - (-) (-) (+) (+) (-) polarity are repeatedly supplied to the sub-pixels formed in the first horizontal line. In this way, data voltages of (+) (-) (+) (-) (+) (-) (-) polarity are supplied in units of eight subpixels, The positive polarity (+) and the negative polarity (-) are symmetrical. Therefore, it is possible to prevent the degradation of the image characteristic that has occurred due to the asymmetric supply of the polarity of the data voltage supplied to the sub-pixel.

Sub-pixels of the second horizontal line are formed between the third gate line GL3 and the fourth gate line GL4.

A scan signal is supplied to the third gate line GL3 and a data voltage is supplied to the sub-pixels connected to the third gate line GL3 among the sub-pixels formed in the second horizontal line.

A scan signal is supplied to the fourth gate line GL4 and a data voltage is supplied to the sub-pixels connected to the fourth gate line GL4 among the sub-pixels formed in the second horizontal line.

Accordingly, the data voltages of (+) - (-) (-) (+) (+) (-) polarity are repeatedly supplied to the sub-pixels formed in the second horizontal line. In this way, data voltages of (+) (-) (+) (-) (+) (-) (-) polarity are supplied in units of eight subpixels, The positive polarity (+) and the negative polarity (-) are symmetrical.

The data voltages are supplied to the sub pixels formed in the third horizontal line and the fourth horizontal line in the same manner as the data voltage supplied to the sub pixels formed in the first horizontal line and the second horizontal line.

In this way, in the DRD pixel structure, the first gate line GL1, the fourth gate line GL4, the second gate line GL2, the third gate line GL3, GL6), a sixth gate line (GL7), a fifth gate line (GL5), and an eighth gate line (GL8), and supplies a scan signal in a vertical four-dot (V- If the polarity is changed, the consumption current for driving the data driver can be reduced by 30% compared with the conventional technology. Based on the total power consumption of the liquid crystal display device, the consumption current can be reduced by 10%.

Further, the element structure of the pixel can be designed symmetrically, defects that are caused only by the asymmetric design of the existing pixel element can be improved, and the aperture ratio of the pixel can be increased. Particularly, display quality can be improved by improving color difference, smear, showdown crosstalk, and vertical dim defects of a picture.

It will be understood by those skilled in the art that the present invention can be embodied in other specific forms without departing from the spirit or essential characteristics thereof. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive.

The scope of the present invention is defined by the appended claims rather than the detailed description and all changes or modifications derived from the meaning and scope of the claims and their equivalents are to be construed as being included within the scope of the present invention do.

100: display panel 200: gate driver
300: Data driver 400: Timing controller

Claims (8)

A plurality of gate lines and a plurality of data lines formed to have a double reduced data (DRD) pixel structure;
A gate driver for supplying a scan signal to the plurality of gate lines;
A data driver for supplying a data voltage to the plurality of data lines; And
And a timing controller for controlling driving of the gate driver and the data driver,
The order of supplying the scan signals to the gate lines in units of eight gate lines is repeated, and the data voltages are supplied to the plurality of data lines in a form of a vertically four-dot version,
A liquid crystal display device for supplying the scan signals in the order of a first gate line, a fourth gate line, a second gate line, a third gate line, a sixth gate line, a seventh gate line, a fifth gate line, . delete A plurality of gate lines and a plurality of data lines formed to have a double reduced data (DRD) pixel structure;
A gate driver for supplying a scan signal to the plurality of gate lines;
A data driver for supplying a data voltage to the plurality of data lines; And
And a timing controller for controlling driving of the gate driver and the data driver,
The order of supplying the scan signals to the gate lines in units of eight gate lines is repeated, and the data voltages are supplied to the plurality of data lines in a form of a vertically four-dot version,
The liquid crystal display device repeatedly supplies a pattern of data voltages of (+) (-) (-) (+) (+) (-) polarity to sub-pixels formed on one horizontal line. A plurality of gate lines and a plurality of data lines formed to have a double reduced data (DRD) pixel structure;
A gate driver for supplying a scan signal to the plurality of gate lines;
A data driver for supplying a data voltage to the plurality of data lines; And
And a timing controller for controlling driving of the gate driver and the data driver,
The order of supplying the scan signals to the gate lines in units of eight gate lines is repeated, and the data voltages are supplied to the plurality of data lines in a form of a vertically four-dot version,
(+) (-) - (+) (-) (+) (-) (-) polarity in units of eight subpixels so that the polarities of the subpixels formed on the same horizontal line are symmetrical Liquid crystal display device. A driving method of a liquid crystal display device having a double reduced data (DRD) pixel structure,
The order in which the scan signals are supplied to the gate lines in units of eight gate lines is repeated to turn on the plurality of sub-pixels,
A data voltage is supplied in the form of a vertically four-dot version to sub-pixels turned on by the scan signal,
A liquid crystal display device for supplying the scan signals in the order of a first gate line, a fourth gate line, a second gate line, a third gate line, a sixth gate line, a seventh gate line, a fifth gate line, . delete A driving method of a liquid crystal display device having a double reduced data (DRD) pixel structure,
The order in which the scan signals are supplied to the gate lines in units of eight gate lines is repeated to turn on the plurality of sub-pixels,
A data voltage is supplied in the form of a vertically four-dot version to sub-pixels turned on by the scan signal,
A driving method of a liquid crystal display device which repetitively supplies a pattern of data voltages of (+) (-) (-) (+) (+) (-) polarity to sub- . A driving method of a liquid crystal display device having a double reduced data (DRD) pixel structure,
The order in which the scan signals are supplied to the gate lines in units of eight gate lines is repeated to turn on the plurality of sub-pixels,
A data voltage is supplied in the form of a vertically four-dot version to sub-pixels turned on by the scan signal,
(+) (-) - (+) (-) (+) (-) (-) polarity in units of eight subpixels so that the polarities of the subpixels formed on the same horizontal line are symmetrical A method of driving a liquid crystal display device.

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