KR101830439B1 - Liquid Crystal Display device and Fabricating Method thereof - Google Patents

Abstract

A liquid crystal display device and a manufacturing method thereof are disclosed.
A liquid crystal display device according to the present invention comprises a first substrate, a gate electrode formed on the first substrate, a gate insulating film formed on the entire surface of the first substrate on which the gate electrode is formed, A second semiconductor layer formed on the first semiconductor layer and containing an impurity; source and drain electrodes formed on the second semiconductor layer and spaced apart from each other by a predetermined distance; A pixel electrode electrically connected to the drain electrode through the contact hole formed on the protective film; and a pixel electrode electrically connected to the drain electrode through the contact hole, A second substrate facing the first substrate and a liquid crystal layer formed between the first and second substrates, It consists of de material.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a liquid crystal display device and a fabrication method thereof,

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display device and a manufacturing method thereof that can improve the reliability of a product.

In recent years, in response to the development of an information society, demands for display devices have been increasing. In response to this demand, recently, a liquid crystal display (LCD), a plasma display panel (PDP), an electro luminescent display (ELD), a vacuum fluorescent display ) Have been studied, and some of them have already been utilized as display devices in various devices.

Among them, the LCD is the most widely used in place of the CRT (Cathod Tay Tube) for the use of the portable type image display device because of its excellent image quality, light weight, thinness and low power consumption. In addition, various monitors such as a television and a computer monitor receiving and displaying a broadcast signal have been developed.

Although various technological developments have been made in order for the liquid crystal display self-controller to function as a screen display device in various fields, there are many aspects in which the work of increasing the quality of the image as the screen display device is arranged with the above advantages.

Therefore, in order for a liquid crystal display device to be used in various parts as a general screen display device, it is important to develop a high-quality image such as a fixed screen, a high brightness, and a large area while maintaining the features of light weight, thinness and low power consumption can do.

A liquid crystal display device is composed of upper and lower substrates having a certain cell gap and bonded together, and a liquid crystal layer formed between the two substrates. At this time, in the lower substrate, a plurality of gate lines are arranged in one direction at regular intervals to define a pixel region P, a plurality of data lines are arranged at regular intervals in a direction perpendicular to the gate lines, A pixel electrode is formed in each pixel region P where a line and a data line intersect, and the pixel electrode is electrically connected to a thin film transistor (TFT).

The upper substrate is provided with a black matrix layer for blocking light in the portion excluding the pixel region P, an R, G, and B color filter layers for expressing color hues, and a common electrode for implementing an image have.

The thin film transistor includes a gate electrode protruded from the gate line, a gate insulating film formed on the front surface, an active layer formed on the gate insulating film above the gate electrode, a source electrode protruded from the data line, And a drain electrode formed so as to be opposite to the drain electrode.

At this time, the source electrode and the drain electrode are formed on the gate electrode so as to overlap with the side edges of the gate electrode, respectively. This is to prevent misalignment of the gate electrode and the source and drain electrodes.

That is, source and drain electrodes formed on the gate electrode are partially overlapped with the gate electrode in order to prevent misalignment that may occur during the process. The parasitic capacitance component is generated in the overlapping portion because the source and drain electrodes are overlapped with both side edges of the gate electrode.

This parasitic capacitance component increases the on-current of the thin-film transistor (TFT) and increases the power consumption for driving the thin-film transistor (TFT), thereby lowering the reliability of the product.

In the present invention, a short channel is formed by using an oxide material which is reduced in the length of the gate electrode and is made conductive by UV irradiation so as not to overlap with the source and drain electrodes, so that the parasitic capacitance component generated between the source and drain electrodes and the gate electrode And to provide a liquid crystal display device and a method of manufacturing the same that can reduce power consumption and improve reliability of a product.

A liquid crystal display according to an embodiment of the present invention includes a first substrate, a gate electrode formed on the first substrate, a gate insulating film formed on the entire surface of the first substrate on which the gate electrode is formed, A second semiconductor layer formed on the first semiconductor layer and containing an impurity; source and drain electrodes formed on the second semiconductor layer and spaced apart from each other by a predetermined distance; A protective film formed on the entire surface of the first substrate on which the source and drain electrodes are formed and having a contact hole exposing a portion of the drain electrode and a source electrode electrically connected to the drain electrode through the contact hole formed on the protective film, An electrode, a second substrate facing the first substrate, and a liquid crystal layer formed between the first and second substrates, wherein the first semiconductor It is composed of oxide material.

According to another aspect of the present invention, there is provided a method of manufacturing a liquid crystal display device, comprising: preparing first and second substrates; forming a gate electrode on the first substrate; Forming a first semiconductor layer on the gate insulating film, the first semiconductor layer corresponding to the gate electrode, forming a second semiconductor layer containing impurities on the first semiconductor layer, Forming a source electrode and a drain electrode spaced apart from each other by a predetermined distance on the first semiconductor layer, forming a protective film on the entire surface of the first substrate on which the source and drain electrodes are formed, and forming a contact hole exposing a portion of the drain electrode Forming a pixel electrode electrically connected to the drain electrode through the contact hole on the protective film, Irradiating the back surface with UV light, and dropping the liquid crystal onto the first substrate and bonding the first and second substrates together, wherein the first semiconductor layer is made of an oxide material.

The liquid crystal display device and the method of manufacturing the same according to the embodiment of the present invention minimize the parasitic capacitance and form a short channel equal to the line width of the gate electrode to sufficiently secure the on current of the thin film transistor and improve the reliability of the product.

1 is a view illustrating a liquid crystal display device according to an embodiment of the present invention.
2A to 2E are views sequentially illustrating a process of forming a thin film transistor on the lower substrate of FIG.
3 is a flowchart showing a manufacturing process of the liquid crystal display device of FIG.

Hereinafter, embodiments according to the present invention will be described with reference to the accompanying drawings.

1 is a view illustrating a liquid crystal display device according to an embodiment of the present invention.

1, a liquid crystal display 100 according to an embodiment of the present invention includes a lower substrate 101, an upper substrate 201, and a liquid crystal layer (not shown) formed between two substrates .

On the lower substrate 101, a thin film transistor (TFT) and a pixel electrode 112 electrically connected to the thin film transistor (TFT) are formed.

The thin film transistor (TFT) includes a gate electrode 102 formed on a lower substrate 101, a gate insulating film 103 formed on the gate electrode 102, and a gate electrode 102 formed sequentially on the gate insulating film 103 A first semiconductor layer 104a and a second semiconductor layer 104b and a source electrode 106 and a drain electrode 108 formed on the second semiconductor layer 104 and spaced apart from each other by a predetermined distance.

At this time, the source and drain electrodes 106 and 108 do not overlap with the gate electrode 102. The first semiconductor layer 104a is made of an oxide material. The oxide material has a semiconducting property in the annealing process and a conductor in the case of UV irradiation.

The lower substrate 101 may further include a protection layer 110 having a contact hole H for electrically connecting the source electrode 106 and the pixel electrode 112. 1, the contact hole H is formed to electrically connect the source electrode 106 and the pixel electrode 112. However, the contact hole H may be formed between the drain electrode 108 and the pixel electrode 112 And may be formed to be electrically connected. The passivation layer 110 may be formed of an inorganic insulating material such as silicon oxide (SiO2) or silicon nitride (SiNx), and may be formed of an organic insulating material such as photo acryl or benzocyclobutene (BCB) .

The pixel electrode 112 may include at least one of indium-tin-oxide, indium-zinc-oxide, and indium-tin-zinc-oxide .

On the upper substrate 201, a black matrix 210 for shielding the thin film transistor (TFT) from light, a color filter 220 having color, and a common electrode 230 forming an electric field with the pixel electrode 112 Is formed.

2A to 2E are views sequentially illustrating a process of forming a thin film transistor on the lower substrate of FIG.

2A, a gate metal layer 102a made of any one of Al, Cr, Mo, Al alloy, and Cu is deposited on the lower substrate 101 and then patterned to form a gate electrode (not shown) An electrode 102 is formed. A silicon nitride film (SiNx), a silicon oxide film (SiOx), an organic insulating film such as BCB (BenzoCycloButene), an acrylic resin, or the like is used over the entire surface of the lower substrate 101 on which the gate electrode 102 is formed, An insulating film 103 is formed.

An oxide layer of InGaZnOx is formed on the gate insulating layer 103 and then the oxide layer is patterned to correspond to the gate electrode 102 through a photolithography process to form the first semiconductor layer 104a.

The first semiconductor layer 104a has a semiconducting property in the annealing process and has a conductor property in UV irradiation as described above. When the first semiconductor layer 104a is irradiated with UV having a wavelength of 300 nm or less, the first semiconductor layer 104a has a conductor component.

A data metal layer using Al, Cr, Mo, Al alloy, Cu, or the like and a semiconductor layer including impurities are sequentially deposited on the lower substrate 101 on which the first semiconductor layer 104a is formed, The second semiconductor layer 104b and the source and drain electrodes 106 and 108 are formed as shown in Figs.

At this time, the source and drain electrodes 106 and 108 are aligned so as not to overlap the gate electrode 102.

2B, a silicon nitride film (SiNx), a silicon oxide film (SiOx), BCB or an organic insulating film such as acrylic resin or the like is formed on the entire surface of the lower substrate 101 on which the source and drain electrodes 106 and 108 are formed, A protective film 110 is formed. The passivation layer 110 includes a contact hole H exposing a portion of the source electrode 106.

A pixel electrode 112 electrically connected to the source electrode 106 is formed on the passivation layer 110 including the contact hole H. 2D and 2E, the contact hole H is formed to electrically connect the source electrode 106 and the pixel electrode 112. However, the contact hole H may be formed between the drain electrode 108 and the pixel electrode 112 112 may be connected.

On the back surface of the lower substrate 101 through such a process, UV having a wavelength of 300 nm or less is irradiated as shown in FIG. 2E. When UV having a wavelength of 300 nm or less is irradiated on the lower substrate 101, the first semiconductor layer 104a made of oxide is made conductive.

Specifically, portions (A and B) of the first semiconductor layer 104a that do not overlap the gate electrode 102 except for the portion overlapping by the gate electrode 102 are made conductive. The first semiconductor layer 104a has a semiconductor property in a portion overlapping with the gate electrode 102 and a portion A and B not overlapped with the gate electrode 102 has a conductor property . Thus, the current flows in the direction of the arrow in Fig. 2E.

Therefore, the thin film transistor (TFT) formed on the lower substrate 101 can minimize parasitic capacitance because the gate electrode 102 does not overlap the source and drain electrodes 106 and 108. In addition, since the first semiconductor layer 104a made of oxide is made conductive by UV irradiation, a short channel equivalent to the length L of the gate electrode 102 is formed to sufficiently secure the ON current of the thin film transistor TFT have.

3 is a flowchart showing a manufacturing process of the liquid crystal display device of FIG.

1 and 3, a thin film transistor array TFT is formed on a lower substrate 101 and a black matrix layer and a color filter layer or a common electrode are formed on the upper substrate 201 Thereby forming a color filter array. (S7)

Subsequently, the lower substrate 101 and the upper substrate 201, which are formed as described above, are cleaned by the cleaning apparatus, respectively, in order to apply an alignment film to each substrate (S2, S8)

UV light having a wavelength of 300 nm or less is irradiated to the back surface of the cleaned lower substrate 101. (S3) A portion of the first semiconductor layer 104a formed on the lower substrate 101 due to such UV irradiation is converted do.

(S4, S9) In place of the rubbing process, a photo-alignment film is formed as the alignment film, and a photo-alignment film is formed on the photo- And can be optically aligned using non-polarized light, polarized light, or partially polarized light.

At this time, the step of irradiating the lower substrate 101 with UV having a wavelength of 300 nm or less can be performed during the cleaning process, the alignment film printing process, and the rubbing process before the alignment film is aligned on the lower substrate 101.

Then, the lower substrate and the upper substrates 101 and 201 are cleaned to remove particles generated during the application of the alignment layer and the rubbing process (S5 and S10).

Liquid crystal is dropped on the active area of each panel on the lower substrate 101 in step S6 and seam material is printed on each edge of each panel of the upper substrate 201. (S11) The sealant is made of UV curable resin This is because, when a thermosetting resin is used as a sheathing material in a post-process sheathing curing process, the sheath material flows during heating to contaminate the liquid crystal. When a common electrode is formed on the upper substrate 201, Ag dots for electrically connecting the lower substrate 101 and the upper substrate 201 are formed.

In order to remove the particles generated during the sheathing or Ag dot process, the upper substrate 201 on which the seed material or Ag dot is formed is cleaned using a cleaning device.

One of the two substrates 101 and 201 is inverted to attach the lower substrate 101 and the upper substrate 201 together. Then, the lower substrate 101 and the upper substrate 201 are loaded on a vacuum lacquer to bond the two substrates together. (S12)

When the UV and the thermosetting resin are used as the sealant, the sealant is first cured by using UV (S13), and then the sealant is completely cured by using heat again. In addition, the sealant may be cured using only UV.

The two substrates, which are cured and completely cured, are cut by each unit panel. (S14) At this time, the scribing and braking processes are performed at the same time. After cutting the substrate divided by each unit panel (S15), the substrate is finally inspected and shipped. (S16)

As described above, the liquid crystal display device according to the present invention is characterized in that a first semiconductor layer of an oxide material is formed on a lower substrate and irradiated with UV having a wavelength of 300 nm or less during a rinsing step, an alignment film orientation step and a rubbing step, The first semiconductor layer is made conductive.

Therefore, in the liquid crystal display according to the present invention, since the gate electrode does not overlap with the source and drain electrodes, the parasitic capacitance is minimized compared to the conventional method in which the gate electrode overlaps the source and drain electrodes to generate parasitic capacitance, So that the reliability of the product can be improved.

100: liquid crystal display device 101: lower substrate
102: gate electrode 102a: gate metal layer
103: gate insulating film 104a: first semiconductor layer
104b: second semiconductor layer 106: source electrode
108: drain electrode 110: protective film
112: pixel electrode 201: upper substrate
210: black matrix 220: color filter layer
230: common electrode

Claims (10)

A first substrate;
A gate electrode formed on the first substrate;
A gate insulating film formed on the entire surface of the first substrate on which the gate electrode is formed;
A first semiconductor layer formed on the gate insulating film and corresponding to the gate electrode;
A second semiconductor layer formed on the first semiconductor layer and containing an impurity;
A source electrode and a drain electrode formed on the second semiconductor layer and spaced apart by a line width of the gate electrode;
And a contact hole formed on the entire surface of the first substrate on which the source electrode and the drain electrode are formed, the contact hole exposing a portion of the source electrode or the drain electrode;
A pixel electrode formed on the protective film and electrically connected to the source electrode or the drain electrode through the contact hole;
A second substrate facing the first substrate;
A common electrode disposed on the second substrate;
A liquid crystal layer formed between the first substrate and the second substrate; And
And Ag dots disposed on the second substrate to electrically connect the first substrate and the second substrate,
Wherein the first semiconductor layer is made of an oxide material. The method according to claim 1,
Wherein the source electrode and the drain electrode do not overlap the gate electrode. The method according to claim 1,
Wherein the first semiconductor layer has a conductor property when irradiated with UV light. The method of claim 3,
Wherein the UV has a wavelength of 300 nm or less. Preparing a first substrate and a second substrate;
Forming a gate electrode on the first substrate;
Forming a gate insulating film on the entire surface of the first substrate on which the gate electrode is formed;
Forming a first semiconductor layer corresponding to the gate electrode on the gate insulating layer;
Forming a second semiconductor layer including an impurity on the first semiconductor layer and forming a source electrode and a drain electrode on the second semiconductor layer by a line width of the gate electrode;
Forming a protective film on the entire surface of the first substrate on which the source electrode and the drain electrode are formed, and forming a contact hole exposing a portion of the source electrode or the drain electrode;
Forming a pixel electrode electrically connected to the source electrode or the drain electrode through the contact hole on the protective film;
Forming a common electrode on the second substrate and Ag dots for electrically connecting the first substrate and the second substrate;
Irradiating UV light on the back surface of the first substrate on which the pixel electrodes are formed; And
Dripping liquid crystal onto the first substrate and bonding the first and second substrates together,
Wherein the first semiconductor layer is made of an oxide material. 6. The method of claim 5,
The step of UV-irradiating the back surface of the first substrate includes:
And cleaning the first substrate on which the pixel electrode is formed. 6. The method of claim 5,
The step of UV-irradiating the back surface of the first substrate includes:
A step of aligning the alignment film on the first substrate on which the pixel electrode is formed or a step of rubbing the alignment film. 6. The method of claim 5,
Wherein the UV has a wavelength of 300 nm or less. 6. The method of claim 5,
Wherein the first semiconductor layer has a conductor property when irradiated with UV light. 6. The method of claim 5,
And the source and drain electrodes do not overlap the gate electrode.

Images