KR101818457B1 - Thin film transistor substrate and method of fabricating the same - Google Patents

Abstract

The present invention relates to a thin film transistor substrate capable of preventing a data line from being connected to a common electrode, and a method of manufacturing the thin film transistor substrate. A gate line and a data line arranged perpendicularly to each other to define a pixel region on the substrate, and a common line arranged in parallel with the gate line; A thin film transistor including a gate electrode connected to the gate lines, a source electrode connected to the data line, a drain electrode formed to face the source electrode, and an active layer formed to overlap the gate electrode with a gate insulating film interposed therebetween, ; A first, a second, and a third protective films formed to cover the thin film transistors and including a pixel contact hole exposing a drain electrode of the thin film transistor and a common contact hole exposing the common line; A common electrode formed on the second protective film; A pixel electrode formed on the third passivation layer and connected to the drain electrode through the pixel contact hole; And a connection electrode formed on the second protective film and connecting the common electrode and the common line through the common contact hole.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a thin film transistor substrate,

The present invention relates to a thin film transistor substrate, and more particularly, to a thin film transistor substrate and a method of manufacturing the same that can prevent a data line and a common electrode from being connected to each other.

(PDP), Electro Luminescent Display (ELD), Vacuum Fluorescent (VFD), and the like have been developed in recent years in response to the demand for display devices. Display) have been studied, and some of them have already been used as display devices in various devices.

Among them, liquid crystal display devices are mostly used in place of CRT (Cathode Ray Tube) for the purpose of portable image display devices because of their excellent image quality, light weight, thinness and low power consumption, But also various kinds of monitors such as a television and a computer monitor receiving and displaying a broadcast signal in addition to the use of the same mobile type.

Such a liquid crystal display device includes a color filter substrate on which a color filter array is formed, a thin film transistor substrate on which a thin film transistor array is formed, and a liquid crystal layer formed between the color filter substrate and the thin film transistor substrate.

The color filter substrate is formed with a color filter for color implementation and a black matrix for light leakage prevention. A plurality of pixel electrodes, to which data signals are individually supplied, are formed in a matrix form on the thin film transistor substrate. Further, a thin film transistor for driving a plurality of pixel electrodes individually, a gate line for controlling the thin film transistor, and a data line for supplying a data signal to the thin film transistor are formed on the thin film transistor substrate.

A typical driving mode most commonly used in a liquid crystal display device is a TN (Twisted Nematic) mode in which a liquid crystal director is arranged so as to be twisted by 90 ° and then a voltage is applied to control the liquid crystal director, And a transverse electric field (In-Plane Switching Mode) mode in which the liquid crystal is driven by a horizontal electric field between the electrode and the common electrode.

In the transverse electric field mode, the pixel electrode and the common electrode are alternately formed in the opening of the thin film transistor substrate so that the liquid crystal is aligned by the transverse electric field generated between the pixel electrode and the common electrode. However, since the transverse electric field mode liquid crystal display device has a wide viewing angle but low aperture ratio and transmittance, a fringe field switching (FFS) mode liquid crystal display device has been proposed in order to solve the above problems.

A fringe field-effect mode liquid crystal display device has a structure in which a common electrode in the form of a tubular electrode is formed in a pixel region and a plurality of pixel electrodes are formed in a slit shape on a common electrode, The liquid crystal molecules are operated by a fringe electric field formed between the pixel electrode and the common electrode.

Here, the manufacturing method of the fringe field effect mode thin film transistor substrate includes the steps of forming the gate line, the gate electrode and the common line using the first mask, forming the active layer using the second mask, Forming a first protective film including a contact hole for exposing a pixel contact hole and a common line by using a fourth mask, forming a source / drain electrode on the first protective film by using a fifth mask, Forming a common electrode to be connected to a common line, forming a second protective film exposing a pixel contact hole on the common electrode using a sixth mask, Forming a pixel electrode that is connected to the electrode and generates a fringe electric field with a common electrode across the second protective film; All.

However, as described above, the common line and the common electrode are connected through the contact hole formed by selectively removing the first protective film. When the etching process is performed to selectively remove the first protective film, Can be exposed.

FIGS. 1A to 1D are process cross-sectional views showing the data line exposed, and FIG. 2 is an optical photograph of the exposed data line.

1A, a gate line (not shown) and a common line (not shown) are formed on a substrate 10 and a gate line (not shown) and a common line An insulating film 20 is formed. The data lines DL are formed on the gate insulating film 20 and the first and second protective films 50 and 60 are formed on the entire surface of the gate insulating film 20 including the data lines DL. (60) is formed of a photosensitive resin so that the unexposed area is removed. At this time, if the foreign object is located on the second protective film 60 corresponding to the data line DL, the second protective film 60 of the unexposed region is removed as shown in FIG. 1B, . When the first protective film 50 is etched to expose a common line (not shown), the data line DL is exposed as shown in FIGS. 1C and 2.

When the common electrode 70 connected to the common line (not shown) is formed on the second protective film 60, the exposed data line DL and the common electrode 70 are connected to each other Defects are generated and the reliability of the thin film transistor substrate is deteriorated.

In particular, since the fringe field effect mode thin film transistor substrate is formed in the form of a common electrode or a pixel electrode in the form of a tubular electrode, there are many difficulties in repairing not only the defect connecting the data line and the common electrode, A problem arises in that the data load is increased and the image quality is lowered due to the ripple of the common electrode because the size of the pixel region is small.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a thin film transistor which can prevent a common electrode from being connected to a data line by forming a connection electrode for connecting a common line and a common electrode when forming a pixel electrode, A substrate, and a method of manufacturing the same.

According to an aspect of the present invention, there is provided a thin film transistor substrate comprising: a substrate; A gate line and a data line arranged perpendicularly to each other to define a pixel region on the substrate, and a common line arranged in parallel with the gate line; A thin film transistor including a gate electrode connected to the gate lines, a source electrode connected to the data line, a drain electrode formed to face the source electrode, and an active layer formed to overlap the gate electrode with a gate insulating film interposed therebetween, ; A first, a second, and a third protective films formed to cover the thin film transistors and including a pixel contact hole exposing a drain electrode of the thin film transistor and a common contact hole exposing the common line; A common electrode formed on the second protective film; A pixel electrode formed on the third passivation layer and connected to the drain electrode through the pixel contact hole; And a connection electrode formed on the second protective film and connecting the common electrode and the common line through the common contact hole.

The second protective film is formed of a photosensitive resin.

The pixel electrode, the common electrode, and the connection electrode are formed of a transparent conductive material.

And the common electrode is formed only on the second protective film.

The common contact hole exposes a part of the common electrode.

The connection electrode is formed to cover the common electrode exposed through the common contact hole.

In addition, a method of manufacturing a thin film transistor substrate for achieving the same object includes: forming a metal layer on a substrate and patterning the metal layer to form a gate line, a gate electrode, and a common line; Forming a gate insulating film on the entire surface of the substrate including the gate line, the gate electrode, and the common line, and forming an active layer having a structure in which a semiconductor layer and an ohmic contact layer are sequentially stacked on the gate insulating film corresponding to the gate electrode ; Forming a metal layer on the entire surface of the gate insulating film including the active layer and patterning the metal layer to form a source, a drain electrode, and a data line; Forming first and second protective films on the entire surface of the gate insulating film including the source electrode, the drain electrode and the data line, selectively removing the second protective film to form the first protective film corresponding to the drain electrode and the common line, Exposing; Forming a common electrode on the second protective film and forming a third protective film on the entire surface of the second protective film including the common electrode; The gate electrode, the first and the third protective films corresponding to the common lines are removed to form the common electrode, Forming a common contact hole exposing the line; And forming a pixel electrode connected to the drain electrode through the pixel contact hole on the third protective film and forming a connection electrode connecting the common line and the common electrode through the common contact hole .

The second protective film is formed of a photosensitive resin.

And the common electrode is formed only on the second protective film.

The common contact hole is formed to expose a part of the common electrode.

And the connection electrode is formed to cover the common electrode exposed through the common contact hole.

The thin film transistor substrate and the method of manufacturing the same according to the present invention can prevent the common electrode from being connected to the data line by forming the connection electrode connecting the common line and the common electrode when forming the pixel electrode, And reliability can be improved.

Figures 1A-1D are process cross-sectional views illustrating the exposure of a data line.
Figure 2 is an optical photograph of an exposed data line.
3A is a plan view of a thin film transistor substrate of the present invention.
FIG. 3B is a cross-sectional view of the thin film transistor substrate shown in FIG. 3A taken along lines I-I ', II-II', and III-III '.
4A to 4G are process plan views of the thin film transistor substrate of the present invention.
5A to 5G are process sectional views of a thin film transistor substrate of the present invention.

Hereinafter, the thin film transistor substrate of the present invention will be described.

3A is a plan view of the thin film transistor substrate of the present invention, and FIG. 3B is a cross-sectional view of the thin film transistor substrate shown in FIG. 3A taken along lines I-I ', II-II' and III-III '.

3A and 3B, a thin film transistor substrate according to the present invention includes a thin film transistor formed at an intersection region of a gate line GL and a data line DL, and a thin film transistor formed at intersections of the gate line GL and the data line DL A common electrode 170 forming a pixel electrode 190 and a fringe field, a gate pad GP connected to the gate line GL, and a data line DL (Not shown), and a common pad connected to the common line CL.

The thin film transistor causes the pixel electrode 190a to be charged with the pixel signal supplied to the data line DL in response to the scan signal supplied to the gate line GL. To this end, the thin film transistor includes a gate electrode 110a, a source electrode 140a, a drain electrode 140b, a semiconductor layer 130a, and an ohmic contact layer 130b.

The gate electrode 110a is protruded from the gate line GL to supply a scan signal from the gate line GL and the gate electrode 110a is not protruded from one side of the gate line GL, (GL).

The source electrode 140a is connected to the data line DL to receive the pixel signal of the data line DL. The drain electrode 140b is formed to face the source electrode 140a with the channel of the semiconductor layer 130a interposed therebetween to supply the pixel signal from the data line DL to the pixel electrode 190a.

The semiconductor layer 130a overlaps the gate electrode 110a with the gate insulating film 120 formed of an inorganic insulating material such as silicon oxide (SiOx), silicon nitride (SiNx) or the like interposed therebetween. The ohmic contact layer 130b formed on the semiconductor layer 130a serves to reduce electrical contact resistance between the source and drain electrodes 140a and 140b and the semiconductor layer 130a. Then, the regions corresponding to the separated regions of the source and drain electrodes 140a and 140b are removed to form a channel.

The second protective film 160 is formed of a negative type photosensitive resin from which an unexposed area is removed or a positive type photosensitive resin from which an exposed area is removed. The negative photosensitive resin is formed by incorporating a negative photosensitive agent into a resin such as an acrylic type, BenzoCycloButane (BCB), and polyimide, and a first protective film 150 to expose the third common contact hole 160b.

Particularly, when a protective film is formed of a negative photosensitive resin, light transmittance can be improved as compared with a positive photosensitive resin, and high brightness can be achieved. In addition, since the negative photosensitive resin has a low dielectric constant, the parasitic capacitance caused by overlapping the common electrode 170 and the data line DL is reduced.

The common electrode 170 formed on the second passivation layer 160 may be formed of at least one selected from the group consisting of tin oxide (TO), indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (Indium Tin Zinc Oxide: ITZO) or the like.

The common electrode 170 is formed in the form of a tubular electrode only on the second protective film 160 and is not directly connected to the common line CL but is formed on the gate insulating film 120 and the first and second protective films 150 and 160 And is electrically connected to the common line CL through the connection electrode 190b formed along the first, second, and third common contact holes 120a, 150b, and 160b, respectively, to receive a common voltage.

The connection electrode 190b is formed simultaneously with the pixel electrode 190a and a tin oxide (TO) oxide (ITO) is formed on the entire surface of the third passivation layer 180 where the third pixel contact hole 180a and the fourth common contact hole 180b are formed. ), A transparent conductive material layer is formed by using indium tin oxide (ITO), indium zinc oxide (IZO), indium tin zinc oxide (ITZO) do. At the same time, a plurality of slit-shaped pixel electrodes 190a electrically connected to the drain electrode 140b are formed.

That is, since the fourth common contact hole 180b of the third protective film 180 exposes a part of the common electrode 170, the first, second, and third common contact holes 120a, 150b, and 160b And a part of the exposed common electrode 170 is formed. Particularly, the connection electrode 190b is formed to cover a part of the common electrode 170 exposed through the fourth common contact hole 180b, thereby improving the contact characteristics of the common electrode 170 and the connection electrode 190b .

The pixel electrode 190a includes first, second, and third pixel contact holes 160a, 170a, and 180a formed in the first, second, and third protective layers 150, 160, and 180, And receives a pixel signal from the data line DL through the thin film transistor. As a result, the pixel electrode 190a overlaps the common electrode 170 with the third protective film 180 interposed therebetween to form a fringe field.

The liquid crystal molecules arranged in the horizontal direction between the thin film transistor substrate and the color filter substrate are rotated by the dielectric anisotropy by the fringe field. An image is realized by changing the light transmittance through the pixel region according to the degree of rotation of the liquid crystal molecules.

The gate pad GP supplies a scan signal to the gate line GL from a gate driver (not shown). The gate pad GP includes a gate pad lower electrode 110b connected to the gate line GL and first and second gate electrodes GL1 and GL2 passing through the gate insulating layer 120 and the first to third protective layers 150, And a gate pad upper electrode 190c connected to the gate pad lower electrode 110b via third and fourth gate contact holes 120b, 150c, 160c and 180c.

 In addition, the data pad DP supplies a pixel signal from a data driver (not shown) to the data line DL. The data pad DP includes a data pad lower electrode 140c connected to the data line GL and first, second, and third data contact holes 140a, 140b, 140c, And a data pad upper electrode 190d connected to the data pad lower electrode 140c via the data pad lower electrodes 150d, 160d, and 180d.

Hereinafter, a method for fabricating a thin film transistor substrate according to the present invention will be described in detail.

FIGS. 4A to 4G are process plan views of the thin film transistor substrate of the present invention, and FIGS. 5A to 5G are process sectional views of the thin film transistor substrate of the present invention.

4A and 5A, a gate electrode 110a, a gate line GL, a gate pad lower electrode 110b, and a common line CL are formed on a substrate 100. Referring to FIG. Specifically, after a metal layer is formed on the substrate 100 by a deposition method such as a sputtering method, the metal layer is patterned to form the gate electrode 110a, the gate line GL, the gate pad lower electrode 110b, Thereby forming a line CL.

(Nd) / Cr, Mo / Al (Nd) / Mo, Cu / Mo, Ti / Al (Nd) / Ti, Mo / Al, Mo / Ti / Al (Nd), Cu alloy / Mo, Cu alloy / Al, Cu alloy / Mo alloy, Cu alloy / Al alloy, Al / Mo alloy, Mo alloy / Al, Al alloy / Mo alloy, Al alloy, Mo / Al alloy, or the like, or may have a single layer structure of Mo, Ti, Cu, AlNd, Al, Cr, Mo alloy, Cu alloy, Al alloy or the like.

4B and 5B, a gate insulating layer 120 is formed on the entire surface of the substrate 100 including the gate electrode 110a, the gate line GL, the gate pad lower electrode 110b, and the common line CL The active layer 130 having a structure in which the semiconductor layer 130a and the ohmic contact layer 130b are sequentially stacked is formed on the gate insulating film 120 corresponding to the gate electrode 110a.

4C and FIG. 5C, a metal layer is formed on the gate insulating film 120 including the active layer 130 by a deposition method such as a sputtering method, and then the metal layer is patterned to form data lines DL, And source and drain electrodes 140a and 140b and a data pad lower electrode 140c are formed. Then, the ohmic contact layer 130b exposed in the spaced interval between the source and drain electrodes 140a and 140b is removed to form a channel.

(Nd) / Cr, Mo / Al (Nd) / Mo, Cu / Mo, Ti / Al (Nd) / Ti, Mo / Al, Mo / Ti / Al (Nd), Cu alloy / Mo, Cu alloy / Al, Cu alloy / Mo alloy, Cu alloy / Al alloy, Al / Mo alloy, Mo alloy / Al, Al alloy / Mo alloy, Al alloy, Mo / Al alloy, or the like, or may have a single layer structure of Mo, Ti, Cu, AlNd, Al, Cr, Mo alloy, Cu alloy, Al alloy or the like.

4D and 5D, first and second protective layers 150 and 150 are formed on the entire surface of the gate insulating layer 120 including the source and drain electrodes 140a and 140b, the data line DL and the data pad lower electrode 140c. 160 are formed. The second pixel contact hole exposes the first passivation layer 150 corresponding to a part of the drain electrode 140b, the common line CL, the gate pad lower electrode 110b and the data pad lower electrode 140c. The second passivation layer 160 is selectively removed to form the first common contact hole 160a, the second common contact hole 160b, the third gate contact hole 160c, and the second data contact hole 160d.

In particular, the second protective film 160 is formed of a negative photosensitive resin from which an unexposed region is removed, or a positive photosensitive resin from which an exposed region is removed. In the drawing, the second protective film 160 is formed of a negative photosensitive resin.

Accordingly, the second protective layer 160 can be selectively removed by an exposure process using a mask having a blocking portion only in a region corresponding to the region to be removed. When the second protective layer 160 is formed of a positive photosensitive resin, The second protective layer 160 can be selectively removed using a mask having a transparent portion only in a region corresponding to the region to be removed. At this time, the first protective layer 150 is not removed, and the drain electrode 140b, the common line CL, the gate pad lower electrode 110b, and the data pad lower electrode 140c are not exposed to the outside.

Next, as shown in FIGS. 4E and 5E, a second protective film 160 including a second pixel contact hole 160a, a second common contact hole 220b, a third gate contact hole 160c, and a second data contact hole 160d, A transparent conductive material layer is formed on the entire surface of the transparent conductive layer 160, and a common electrode 170 is formed by patterning the transparent conductive material layer.

Referring to FIGS. 4F and 5F, a third passivation layer 180 is formed on the entire surface of the second passivation layer 160 including the common electrode 170. The third passivation layer 180 is selectively removed to form the third pixel contact hole 180a and the second pixel contact hole 160a is exposed. The insulating film 120 is removed to form the first pixel contact hole 150a.

The fourth common contact hole 180b exposing a part of the common electrode 170 is formed by selectively removing the third protective film 180. After exposing the third common contact hole 160b, The gate insulating layer 120 and the first passivation layer 150 are selectively removed to form the first and second common contact holes 120a and 150b.

That is, in the method of manufacturing a thin film transistor substrate of the present invention, after the second protective film 160 is selectively removed, the common electrode 170 is formed, and the third protective film 180 including the common electrode 170 is selectively removed The first passivation layer 150 and the gate insulating layer 120 are etched. The first data line DL is covered with the first data line DL so that the data line DL is exposed and connected to the common electrode 170 .

At the same time, the third passivation layer 180 is selectively removed to expose the gate pad lower electrode 110b to form the fourth gate contact hole 180c to expose the third gate contact hole 160c, The insulating layer 120 and the first passivation layer 150 are selectively removed to form the first and second gate contact holes 120b and 150c. The third protective layer 180 is selectively removed to expose the data pad lower electrode 140c to form a third data contact hole 180d to expose the second data contact hole 160d. The protective film 150 is selectively removed to form the first data contact hole 150d.

4G and 5G, a transparent conductive material layer is formed on the entire surface of the third passivation layer 180 including the gate contact holes and the data contact holes, and patterned to form the first, second, and third pixel contact holes A plurality of slit-shaped pixel electrodes 190a, which are connected to the drain electrode 140b through the gate electrodes 150a, 160a, and 180a and form a fringe electric field with the common electrode 170, are formed. At the same time, a connection electrode 190b formed along the first, second, and third common contact holes 120a, 150b, and 160b is formed to electrically connect the common line CL and the common electrode 170. [ At this time, the connection electrode 190b is formed to cover a part of the common electrode 170 exposed through the fourth common contact hole 180b, thereby improving the contact property between the common electrode 170 and the connection electrode 190b do.

A gate pad upper electrode 190c electrically connected to the gate pad lower electrode 110b exposed through the first, second, third and fourth gate contact holes 120c, 150c, 160c and 180c is formed, A data pad upper electrode 190d is formed which is electrically connected to the data pad lower electrode 140c exposed through the first, second and third data contact holes 150d, 160d and 180d.

That is, in the thin film transistor substrate of the present invention, after the common electrode is formed, the gate insulating layer 120 and the first protective layer 150 corresponding to the common line CL are removed. Therefore, by forming the connecting electrode connecting the common line and the common electrode when forming the pixel electrode, it is possible to prevent the common electrode from being connected to the data line, thereby improving the yield and reliability of the thin film transistor substrate.

While the present invention has been described in connection with what is presently considered to be the most practical and preferred embodiment, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, is intended to cover various modifications and equivalent arrangements included within the spirit and scope of the appended claims. Will be apparent to those of ordinary skill in the art.

CL: common line DL: data line
DP: Data pad GL: Gate line
GP: gate pad 100: substrate
110a: gate electrode 110b: gate pad lower electrode
120: gate insulating film 130: active layer
130a: semiconductor layer 130b: ohmic contact layer
140a: source electrode 140b: drain electrode
140c: Data pad lower electrode 150: First protective film
160: second protective film 170: common electrode
180: Third protective film 190a:
190b: connecting electrode 190c: gate pad upper electrode
190d: Data pad upper electrode
160a, 170a, 180a: first, second, and third pixel contact holes
120a, 150b, 160b, 180b: first, second, third, and fourth common contact holes
120b, 150c, 160c, and 180c: first, second, third, and fourth gate contact holes
150d, 160d, and 180d: first, second, and third data contact holes

Claims (11)

delete delete delete delete delete delete Forming a metal layer on the substrate and patterning the metal layer to form a gate line, a gate electrode, and a common line;
Forming a gate insulating film on the entire surface of the substrate including the gate line, the gate electrode, and the common line, and forming an active layer having a structure in which a semiconductor layer and an ohmic contact layer are sequentially stacked on the gate insulating film corresponding to the gate electrode ;
Forming a metal layer on the entire surface of the gate insulating film including the active layer and patterning the metal layer to form a source, a drain electrode, and a data line;
Forming first and second protective films on the entire surface of the gate insulating film including the source electrode, the drain electrode and the data line, selectively removing the second protective film to form the first protective film corresponding to the drain electrode and the common line, Exposing;
Forming a common electrode on the second protective film and forming a third protective film on the entire surface of the second protective film including the common electrode;
The gate electrode, the first and the third protective films corresponding to the common lines are removed to form the common electrode, Forming a common contact hole exposing the line; And
Forming a pixel electrode connected to the drain electrode through the pixel contact hole on the third protective film and forming a connection electrode connecting the common line and the common electrode via the common contact hole Wherein the thin film transistor substrate is formed on the substrate. 8. The method of claim 7,
Wherein the second protective film is formed of a negative photosensitive resin. 8. The method of claim 7,
Wherein the common electrode is formed only on the second protective film. 8. The method of claim 7,
Wherein the common contact hole is formed to expose a part of the common electrode. 11. The method of claim 10,
And the connection electrode is formed to cover the common electrode exposed through the common contact hole.

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