KR101749754B1 - Organic Light Emitting Display Device and Driving Method thereof - Google Patents

Abstract

According to an embodiment of the present invention, there is provided a display device including a first transistor for transferring a data signal supplied through a data line to a first node in response to a first scan signal supplied through a first scan line; A second transistor for transferring a reference voltage supplied through a reference line to a second node in response to a second scan signal supplied through the second scan line; A first capacitor for storing a difference voltage between the reference voltage and the data signal; A third transistor for connecting a first node and a second node, both ends of the first capacitor, in response to a third scan signal supplied through the third scan line; A driving transistor for generating a driving current by the data voltage supplied to the first node; A fourth transistor for supplying a low voltage to a third node connected to the second electrode of the driving transistor in response to the first scan signal; A second capacitor for storing a data voltage based on a voltage supplied from the second node and the third node; And an organic light emitting diode that emits light corresponding to a driving current supplied from the driving transistor.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to an organic light emitting display,

The present invention relates to an organic light emitting display and a driving method thereof.

An organic electroluminescent device used in an organic electroluminescent display device is a self-luminous device in which a light emitting layer is formed between two electrodes. The organic electroluminescent device injects electrons and holes from the electron injecting electrode and the hole injecting electrode into the light emitting layer, and excites the excited electrons and holes, And emits light when it is dropped to the ground state.

The organic light emitting display device using the organic electroluminescent device has a top emission mode, a bottom emission mode, and a dual emission mode depending on a direction in which light is emitted, Passive matrix type and active matrix type according to the following.

In the organic light emitting display, when a scan signal, a data signal, a power supply, and the like are supplied to a plurality of subpixels arranged in a matrix form, the selected subpixel emits light, thereby displaying an image.

Some of the organic electroluminescent display devices have a method of addressing data signals in a superimposed manner in order to drive the panel at a high speed. This method has an advantage that the current flowing through the organic light emitting diode can be compensated for even in the case of a negative threshold voltage region and a low potential voltage. Even in the above-mentioned advantages, the conventional organic electroluminescent display device has a problem that the contrast ratio is lowered due to a current glitch in which a current flows when a threshold voltage is programmed.

An embodiment of the present invention for solving the problems of the background art described above is an organic electroluminescent display device capable of preventing a current glitch in which an electric current flows in an undesired section at the time of threshold voltage programming to improve a contrast ratio, And a method of driving the same.

According to an embodiment of the present invention, there is provided a data driver for a data driver, comprising: a first transistor for transferring a data signal supplied through a data line to a first node in response to a first scan signal supplied through a first scan line; A second transistor for transferring a reference voltage supplied through a reference line to a second node in response to a second scan signal supplied through the second scan line; A first capacitor for storing a difference voltage between the reference voltage and the data signal; A third transistor for connecting a first node and a second node, both ends of the first capacitor, in response to a third scan signal supplied through the third scan line; A driving transistor for generating a driving current by the data voltage supplied to the first node; A fourth transistor for supplying a low voltage to a third node connected to the second electrode of the driving transistor in response to the first scan signal; A second capacitor for storing a data voltage based on a voltage supplied from the second node and the third node; And an organic light emitting diode that emits light corresponding to a driving current supplied from the driving transistor.

The fourth transistor can supply a low voltage to the third node when the data signal and the reference voltage are supplied, so that the organic light emitting diode maintains the turn-off state.

In the first transistor, a gate electrode is connected to a first scan line, a first electrode is connected to a data line, a second electrode is connected to a first node, a gate electrode is connected to a second scan line, The first electrode is connected to the first node and the second electrode is connected to the second node, one end of the first capacitor is connected to the first node and the other end is connected to the second node, and the gate electrode is connected to the first node A first electrode is connected to a high potential power supply line to which a high voltage is supplied, a second electrode is connected to a third node, a gate electrode of the third transistor is connected to a third scan line, And the second electrode is connected to the second node, one end of the second capacitor is connected to the second node and the other end is connected to the third node, the anode electrode of the organic light emitting diode is connected to the third node, A low-potential power source to which a voltage is supplied The fourth transistor may have a gate electrode connected to a first scan line, a first electrode connected to a third node, and a second electrode connected to a signal line supplying a low voltage.

The signal line may be the third scan line.

According to another aspect of the present invention, there is provided a method of driving a liquid crystal display device, comprising: turning on a first transistor and a second transistor to supply a data signal and a reference voltage to a first capacitor connected between a first node and a second node, Supplying a low voltage to a second capacitor connected between the second node and the third node; A programming step of maintaining the turn-on state of the second transistor and turning off the first transistor and the fourth transistor to store the data voltage in the first and second capacitors; And a light emitting step of turning off the second transistor and turning on the third transistor to drive the driving transistor with the data voltage stored in the first and second capacitors and emit the organic light emitting diode using the driving current generated from the driving transistor And a driving method of the organic light emitting display device.

The first scan signal for turning on the first and fourth transistors and the second scan signal for turning on the second transistor are overlapped in the addressing step and the time for supplying the first scan signal is shorter than the time for supplying the second scan signal. .

When the first scan signal is in a logic high signal state, the third scan signal for turning on the third transistor may be a logic low signal state.

In the addressing step, the fourth transistor may supply the low voltage to the third node so that the organic light emitting diode remains in the turned off state.

The level of the low voltage may be much lower than the level of the low potential voltage supplied to the cathode electrode of the organic light emitting diode.

In the addressing step, the reference voltage may have a level lower than the maximum value of the data signal.

An embodiment of the present invention provides an organic light emitting display device and a method of driving the same, which can improve a contrast ratio by preventing defects in which a current flows in an undesired section during threshold voltage programming.

1 is a schematic block diagram of an organic electroluminescence display device of the present invention.
2 is a circuit configuration diagram of a subpixel according to the first embodiment of the present invention;
FIGS. 3 to 5 are circuit diagrams for explaining a method of driving a subpixel according to an embodiment of the present invention; FIG.
6 is a drive waveform of a subpixel.
7 is a simulation waveform diagram of a subpixel.
8 and 9 are simulation waveforms of conventional subpixels and subpixels in the embodiment.
10 is a circuit configuration diagram of a subpixel according to another embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a schematic block diagram of an organic light emitting display device of the present invention.

As shown in FIG. 1, the organic light emitting display includes a timing driver TCN, a display panel PNL, a scan driver SDRV, and a data driver DDRV.

The timing driver TCN receives a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE, a clock signal CLK and a data signal RGB from the outside. The timing driver TCN is connected to the data driver DDRV and the data driver DDRV using timing signals such as a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE, and a clock signal CLK. And controls the operation timing of the driving unit SDRV. The timing driver TCN can count the data enable signal DE in one horizontal period to determine the frame period so that the externally supplied vertical sync signal Vsync and horizontal sync signal Hsync can be omitted. The control signals generated in the timing driver TCN include a gate timing control signal GDC for controlling the operation timing of the scan driver SDRV and a data timing control signal DDC for controlling the operation timing of the data driver DDRV. ) May be included. The gate timing control signal GDC includes a gate start pulse GSP, a gate shift clock GSC and a gate output enable signal GOE. The gate start pulse GSP is supplied to the scan driver SDRV where the first scan signal is generated. The gate shift clock GSC is a clock signal commonly input to the scan driver SDRV, and is a clock signal for shifting the gate start pulse GSP. The gate output enable signal GOE controls the output of the scan driver SDRV. The data timing control signal DDC includes source start pulses (Source, Start Pulse, SSP), Source Sampling Clock (SSC), Source Output Enable (SOE), and the like. The source start pulse SSP controls the data sampling start timing of the data driver DDRV. The source sampling clock SSC is a clock signal for controlling the sampling operation of data in the data driver DDRV based on the rising or falling edge. The source output enable signal SOE controls the output of the data driver DDRV. On the other hand, the source start pulse SSP supplied to the data driver DDRV may be omitted depending on the data transfer method.

The scan driver SDRV is responsive to the gate timing control signal GDC supplied from the timing driver TCN to turn on the swing width of the gate drive voltage at which the transistors of the subpixels SP included in the display panel PNL are operable And sequentially generates a scan signal while shifting the level of the signal. The scan driver SDRV supplies the scan signals generated through the scan lines to the sub-pixels SP included in the display panel PNL.

The data driver DDRV samples and latches the digital data signal RGB supplied from the timing driver TCN in response to the data timing control signal DDC supplied from the timing driver TCN, . The data driver DDRV converts a digital data signal RGB into a gamma reference voltage and converts the digital data signal into an analog data signal. The data driver DDRV supplies the data signals converted through the data lines to the sub-pixels SP included in the display panel PNL.

The display panel PNL includes a display unit having sub-pixels SP arranged in a matrix form. The subpixels SP are each composed of five transistors, two capacitors and one organic light emitting diode. The subpixels SP according to the embodiment use a driving element having a negative Vth characteristic or a driving element having a threshold voltage negative shifted by deterioration etc. of the amorphous silicon element.

Hereinafter, the subpixels formed on the display panel PNL will be described in more detail.

2 is a circuit configuration diagram of a subpixel according to an embodiment of the present invention.

As shown in FIG. 2, the sub-pixels according to the exemplary embodiment of the present invention include first through fourth transistors T1 through T4, a driving transistor DR, first and second capacitors Vc1 and Vc2, And a light emitting diode (OLED).

The connection relationship of the first to fourth transistors T1 to T4, the driving transistor DR, the first and second capacitors Vc1 and Vc2 and the organic light emitting diode OLED included in the subpixel will be described as follows .

The first transistor T1 has a gate electrode connected to the first scan line G1 [n], a first electrode connected to the data line Data, and a second electrode connected to the first node Vg. The second transistor T2 has a gate electrode connected to the second scan line G2 [n], a first electrode connected to the reference line Vref, and a second electrode connected to the second node Vd. One end of the first capacitor Vc1 is connected to the first node Vg and the other end is connected to the second node Vd. In the driving transistor DR, the first electrode is connected to the high potential power supply line Vdd to which the gate electrode is connected to the first node Vg and the high potential voltage is supplied, and the second electrode is connected to the third node Vs do. The third transistor T3 has a gate electrode connected to the third scan line EM [n], a first electrode connected to the first node Vg, and a second electrode connected to the second node Vd. The second capacitor Vc2 has one end connected to the second node Vd and the other end connected to the third node Vs. In the organic light emitting diode OLED, a cathode electrode is connected to a low potential power supply line Vss to which an anode electrode is connected to a third node Vs and a low potential voltage is supplied. The fourth transistor T4 has a gate electrode connected to the first scan line G1 [n], a first electrode connected to the third node Vs, and a signal line EM [n] Two electrodes are connected. Here, the signal line EM [n] may use the same line as the third scan line EM [n], but is not limited thereto.

The roles of the first to fourth transistors T1 to T4, the driving transistor DR, the first and second capacitors Vc1 and Vc2 and the organic light emitting diode OLED included in the subpixel described above are shown schematically As follows.

The first transistor T1 transmits a data signal supplied through the data line Data to the first node Vg in response to the first scan signal supplied through the first scan line G1 [n] .

The second transistor T2 transfers a reference voltage supplied through the reference line Vref to the second node Vd in response to a second scan signal supplied through the second scan line G2 [n] .

The first capacitor Vc1 serves to store the difference voltage between the reference voltage and the data signal.

The third transistor T3 is responsive to the third scan signal supplied through the third scan line EM [n] to apply a voltage to the first node Vg and the second node Vd, both ends of the first capacitor Vc1, .

The driving transistor DR serves to generate a driving current by the data voltage supplied to the first node Vg.

The fourth transistor T4 supplies a low voltage to the third node Vs connected to the second electrode of the driving transistor DR in response to the first scan signal supplied through the first scan line G1 [n] It plays a role. Here, when the data signal and the reference voltage are supplied, the fourth transistor T4 supplies a low voltage to the third node Vs so that the organic light emitting diode OLED maintains the turn-off state.

The second capacitor Vc2 serves to store the data voltage based on the voltage supplied from the second node Vd and the third node Vs.

The organic light emitting diode OLED emits light corresponding to the driving current supplied from the driving transistor DR.

Hereinafter, a driving method of a sub-pixel according to an embodiment of the present invention will be described in more detail.

FIGS. 3 to 5 are circuit diagrams for explaining a subpixel driving method according to an embodiment of the present invention, FIG. 6 is a drive waveform diagram of a subpixel, FIG. 7 is a simulation waveform diagram of a subpixel, Figs. 8 and 9 are simulation waveforms of subpixels in the comparative example and subpixels in the embodiment.

2 to 6, the subpixel according to an embodiment of the present invention is driven in the order of the addressing step (FIG. 3), the programming step (FIG. 4) and the light emitting step (FIG. 5).

The addressing step 1 includes turning on the first transistor T1 and the second transistor T2 to apply a data signal and a reference voltage Vd to the first capacitor Vc1 connected between the first node Vg and the second node Vd, And supplies the low voltage to the second capacitor Vc2 connected between the first node Vg and the third node Vs by turning on the fourth transistor T4.

In the addressing step 1, the first transistor T1 and the fourth transistor T4 receive the first scan signal G1 [n] in the logic high signal state supplied through the first scan line G1 [n] And is turned on. The second transistor T2 is turned on in response to the second scan signal G2 [n] in the logic high signal state supplied through the second scan line G1 [n].

The voltage corresponding to the difference between the reference voltage Vref and the data signal Va is charged to the first node Vg as the first transistor T1 is turned on. Expressing this as Vg = Vref - Va. As the second transistor T2 is turned on, the reference voltage Vref greater than the maximum value Va_max of the data signal is charged to the second node Vd. Expressing this as Vd = Vref> Va_max. As the fourth transistor T4 is turned on, the third node Vs is charged with a low voltage VGL which is much lower than the low voltage Vss. Expressing it as Vs = VGL << Vss. As the voltage is charged, a voltage corresponding to the difference between the reference voltage Vref and the low voltage VGL is charged in the first and second capacitors Vc1 and Vc2. Expressing it as Vc = Vref - VGL.

If the low voltage VGL supplied through the fourth transistor T4 in the addressing step 1 is much lower than the low potential Vss, the organic light emitting diode OLED is maintained in the turned off state. A first scan signal G1 [n] for turning on the first and fourth transistors T1 and T4 and a second scan signal G2 [n] for turning on the second transistor T2 in the addressing step 1, The time when the first scan signal G1 [n] is supplied in the logic high signal state is ahead of the time when the second scan signal G2 [n] is supplied in the logic high signal state. Here, when the first scan signal G1 [n] is supplied in the logic high signal state, the third scan signal EM [n] is switched from the logic high signal state to the logic low signal state. That is, when the first scan signal G1 [n] for turning on the first and fourth transistors T1 and T4 is in the logic high signal state, the third scan signal EM [n] for turning on the third transistor And becomes a logic low signal state.

As described above, when the first scan signal G1 [n] is in a logic high signal state and the third scan signal EM [n] is switched to a logic low signal state, each node Vg, Vd, The state of the applied voltage and the state of the voltage of the current Ioled flowing through the organic light emitting diode OLED are shown in FIG.

The programming step 2 is a step of storing the data voltage in the capacitors Vc1 and Vc2 by maintaining the turn-on state of the second transistor T2 and turning off the first transistor T1 and the fourth transistor T4 .

In the programming step 2, the second transistor T2 maintains a turn-on state in response to the second scan signal G2 [n] remaining in the logic high signal state. The first transistor T1 and the fourth transistor T4 are turned off in response to the first scan signal G1 [n] being switched to the logic low signal state.

The voltage corresponding to the difference between the reference voltage Vref and the data signal Va is maintained at the first node Vg as the first transistor T1 is turned off. Expressing this as Vg = Vref - Va. The reference voltage Vref is maintained at the second node Vd as the second transistor T2 maintains the turned-on state. Expressing this as Vd = Vref. As the fourth transistor T4 is turned off, the third node Vs

The turn-off sustaining voltage _VTO and the low potential voltage Vss which are larger than the reference voltage Vref, the data signal Va and the threshold voltage Vth of the driving transistor are charged. Vs = Vref - Va - Vth <V _TO + Vss. The data voltage Vc which is the sum of the data signal Va and the threshold voltage Vth of the driving transistor is charged in the first and second capacitors Vc1 and Vc2 as the voltage is charged. Expressing it as Vc = Va + Vth.

As described above, the fourth transistor T4 in the addressing step 1 and the programming step 2 supplies the low voltage VGL to the third node Vs so that the organic light emitting diode OLED maintains the turn-off state And blocks a current from flowing into the organic light emitting diode (OLED) during threshold voltage programming (Vth programming). That is, the fourth transistor T4 is driven to remove a current glitch phenomenon in which an electric current flows in an undesired section.

The light emitting step 0 turns on the second transistor T2 and turns on the third transistor T3 to drive the driving transistor DR with the data voltage stored in the first and second capacitors Vc1 and Vc2, And driving the organic light emitting diode OLED using the driving current generated from the transistor DR.

In the light emission step (0), the second transistor T2 is turned off in response to the second scan signal G2 [n] being switched to the logic low signal state. The third transistor T3 is turned on in response to the third scan signal EM [n] of the logic high signal state supplied through the third scan line EM [n].

The voltage Vgs between the gate electrode and the source electrode of the driving transistor DR becomes equal to the voltage between the data signal Va and the driving transistor TR1 as the second transistor T2 is turned off and the third transistor T3 is turned on. DR), and a driving current is generated based on the data voltage Vc. Expressing it as Vgs = Va + Vth = Vc. As described above, the driving current generated from the driving transistor DR flows through the organic light emitting diode OLED, and the organic light emitting diode OLED emits light in response to the driving current. This is expressed as Ioled = 1 / 2K (Va + Vth - Vth) ² . A voltage obtained by adding the data signal Va, the threshold voltage Vth of the driving transistor DR and the voltage Voled of the organic light emitting diode is applied to the first node Vg in the light emission step (0).

The driving waveforms as shown in FIG. 7 can be obtained by superimposing and addressing the data signals under the high-speed driving conditions and performing the simulation in the manner as described above.

Referring to FIGS. 8 and 9, it can be seen that a glitch occurs in a subpixel of the comparative example of FIG. 8 in which a current flows in an undesired section due to a current flow generated in a process of programming a threshold voltage. On the other hand, the subpixel of the embodiment of FIG. 9 blocks the current flow during the programming of the threshold voltage, so that the organic light emitting diode OLED is suppressed from emitting light in the non-emission period. Therefore, the subpixel according to the embodiment can prevent the current from flowing into the organic light emitting diode OLED in an undesired section, thereby improving the contrast ratio.

Meanwhile, an embodiment of the present invention can achieve the above effect even if the connection relationship of the circuits included in the subpixels is changed as follows.

10 is a circuit block diagram of a subpixel according to another embodiment of the present invention.

10, a subpixel according to another exemplary embodiment of the present invention may also include first to fourth transistors T1 to T4, a driving transistor DR, first and second capacitors Vc1 and Vc2, And a light emitting diode (OLED).

The connection relationship of the first to fourth transistors T1 to T4, the driving transistor DR, the first and second capacitors Vc1 and Vc2 and the organic light emitting diode OLED included in the subpixel will be described as follows .

The first transistor T1 has a gate electrode connected to the first scan line G1 [n], a first electrode connected to the reference line Vref, and a second electrode connected to the first node Vg. The second transistor T2 has a gate electrode coupled to the second scan line G2 [n], a first electrode coupled to the data line Data, and a second electrode coupled to the second node Vd. One end of the first capacitor Vc1 is connected to the first node Vg and the other end is connected to the second node Vd. In the driving transistor DR, the first electrode is connected to the high potential power supply line Vdd to which the gate electrode is connected to the first node Vg and the high potential voltage is supplied, and the second electrode is connected to the third node Vs do. The third transistor T3 has a gate electrode connected to the third scan line EM [n], a first electrode connected to the first node Vg, and a second electrode connected to the second node Vd. The second capacitor Vc2 has one end connected to the second node Vd and the other end connected to the third node Vs. In the organic light emitting diode OLED, a cathode electrode is connected to a low potential power supply line Vss to which an anode electrode is connected to a third node Vs and a low potential voltage is supplied. The fourth transistor T4 has a gate electrode connected to the first scan line G1 [n], a first electrode connected to the third node Vs, and a signal line EM [n] Two electrodes are connected. Here, the signal line EM [n] may use the same line as the third scan line EM [n], but is not limited thereto.

The subpixel according to another embodiment of the present invention may switch between the reference line Vref connected to the first electrode of each of the first and second transistors T1 and T2 and the data line Data, An effect similar to the example can be achieved.

In the subpixel according to the present invention, the first scan signal supplied to the subpixel of the previous stage and the first scan signal supplied to the subpixel of the current stage are partially overlapped and the data signal supplied through the data line is overlapped and addressed Data overlap addressing method. According to the embodiment, since the signal line for storing the threshold voltage Vth is separated by the above connection method, it is possible to compensate for the change in the current Ioled flowing through the organic light emitting diode even under high-speed driving . In the subpixel according to the embodiment, when the data signal is inputted, the compensation drive for inputting the data signal after storing the threshold voltage Vth of the driving transistor DR proceeds.

In addition, the subpixel according to the embodiment can compensate for the change in the current Ioled flowing through the organic light emitting diode in accordance with the negative threshold voltage (negative Vth) and the low potential voltage variation (Vss) according to the above driving method. The subpixel according to the embodiment can prevent a current glitch phenomenon in which an electric current flows in an undesired section by blocking a current generated during threshold voltage programming (Vth programming) from flowing to the organic light emitting diode OLED, contrast ratio can be improved.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It will be understood that the invention may be practiced. It is therefore to be understood that the embodiments described above are to be considered in all respects only as illustrative and not restrictive. In addition, the scope of the present invention is indicated by the following claims rather than the detailed description. Also, all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included within the scope of the present invention.

T1: first transistor T2: second transistor
T3: third transistor T4: fourth transistor
DR: driving transistor Vc1: first capacitor
Vc2: second capacitor OLED: organic light emitting diode
Vg: first node Vd: second node
Vs: third node

Claims (10)

A first transistor for transferring a data signal supplied through a data line to a first node in response to a first scan signal supplied through a first scan line;
A second transistor for transferring a reference voltage supplied through a reference line to a second node in response to a second scan signal supplied through the second scan line;
A first capacitor for storing a difference voltage between the reference voltage and the data signal;
A third transistor for connecting the first node and the second node, which are both ends of the first capacitor, in response to a third scan signal supplied through a third scan line;
A driving transistor for generating a driving current by a data voltage supplied to the first node;
A fourth transistor for supplying a low voltage to a third node connected to the second electrode of the driving transistor in response to the first scan signal;
A second capacitor for storing a data voltage based on a voltage supplied from the second node and the third node; And
And an organic light emitting diode that emits light corresponding to the driving current supplied from the driving transistor. The method according to claim 1,
Wherein the fourth transistor comprises:
When the data signal and the reference voltage are supplied,
And supplies the low voltage to the third node so that the organic light emitting diode maintains a turn-off state. The method according to claim 1,
Wherein the first transistor has a gate electrode connected to the first scan line, a first electrode connected to the data line, and a second electrode connected to the first node,
The second transistor has a gate electrode connected to the second scan line, a first electrode connected to the reference line, and a second electrode connected to the second node,
Wherein the first capacitor is connected at one end to the first node and at the other end to the second node,
Wherein the driving transistor has a gate electrode connected to the first node, a first electrode connected to a high potential power supply line to which a high potential voltage is supplied, and a second electrode connected to the third node,
The third transistor has a gate electrode connected to the third scan line, a first electrode connected to the first node, and a second electrode connected to the second node,
The second capacitor is connected at one end to the second node and at the other end to the third node,
The organic light emitting diode has a cathode electrode connected to a low potential power supply line to which an anode electrode is connected to the third node and a low potential voltage is supplied,
Wherein the fourth transistor has a gate electrode connected to the first scan line, a first electrode connected to the third node, and a second electrode connected to a signal line supplying the low voltage. The method of claim 3,
The signal line includes:
And the third scan line is the third scan line. A first transistor for transferring a data signal supplied through a data line in response to a first scan signal supplied through a first scan line to a first node, a second transistor for transferring a reference signal in response to a second scan signal supplied through the second scan line, A second transistor for transmitting a reference voltage supplied through a line to a second node, a first capacitor for storing a difference voltage between the reference voltage and the data signal, A third transistor for connecting the first node and the second node, which are both ends of the first capacitor, a driving transistor for generating a driving current by a data voltage supplied to the first node, A fourth transistor for supplying a low voltage to a third node connected to a second electrode of the driving transistor, a fourth transistor for supplying a low voltage to the third node connected to the second electrode of the driving transistor, In the second capacitor, and a driving method of an organic light emitting display including the organic light-emitting diode for emitting light corresponding to the driving current supplied from the drive transistor to store,
Turning on the first transistor and the second transistor to supply the data signal and the reference voltage to the first capacitor and turning on the fourth transistor to supply the low voltage to the second capacitor;
A programming step of maintaining the turn-on state of the second transistor and turning off the first transistor and the fourth transistor to store the data voltage in the first and second capacitors; And
The second transistor is turned off, the third transistor is turned on to drive the driving transistor with the data voltage stored in the first and second capacitors, and using the driving current generated from the driving transistor, And a light emitting step of emitting a diode. 6. The method of claim 5,
The first scan signal for turning on the first and fourth transistors and the second scan signal for turning on the second transistor are overlapped in the addressing step,
Wherein the time of supplying the first scan signal is earlier than the time of supplying the second scan signal. 6. The method of claim 5,
Wherein when the first scan signal is in a logic high signal state, the third scan signal for turning on the third transistor becomes a logic low signal state. 6. The method of claim 5,
In the addressing step,
And the fourth transistor supplies the low voltage to the third node so that the organic light emitting diode is maintained in a turned off state. 9. The method of claim 8,
The level of the low-
Wherein the level of the low potential voltage supplied to the cathode electrode of the organic light emitting diode is lower than the level of the low potential voltage supplied to the cathode electrode of the organic light emitting diode. 6. The method of claim 5,
In the addressing step,
Wherein the reference voltage has a level lower than a maximum value of the data signal.

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