KR20120069137A - Organic light emitting display device - Google Patents

Abstract

PURPOSE: An organic electroluminescence display device is provided to prevent a flickering phenomenon by arranging a compensation capacitor in a sampling transistor part. CONSTITUTION: A sub pixel includes a pixel driver(SPC). The pixel driver operates an organic light emitting diode(OLED). The pixel driver comprises four transistors(T1,T3,T4), a driving transistor(DR), a sampling transistor(TS), a single capacitor(Cst), and a compensation capacitor(Ch). The four transistors are operated in order to emit light using the organic light emitting diode. The driving transistor operates the organic light emitting diode. The sampling transistor is operated for sampling threshold voltage of the driving transistor. The capacitor stores a data signal. The compensation capacitor improves voltage holding properties of the sampling transistor.

Description

Organic Light Emitting Display Device

The present invention relates to an organic light emitting display device.

The organic light emitting display device used in the organic light emitting display device is a self-light emitting device having a light emitting layer formed between two electrodes. In the organic light emitting display device, electrons and holes are injected into the light emitting layer from an electron injection electrode and a hole injection electrode, respectively, and an exciton in which the injected electrons and holes combine is excited. The device emits light when it falls from the ground state to the ground state.

An organic light emitting display device using an organic light emitting display device includes a top emission type, a bottom emission type, and a dual emission type according to a direction in which light is emitted. According to this, it is divided into passive matrix type and active matrix type.

The organic light emitting display device has a problem in that the threshold voltage of the driving transistor moves with time. Thus, conventionally, a sampling method for sampling the threshold voltage of the driving transistor has been proposed.

However, in the conventional organic light emitting display device, when sampling the threshold voltage of the driving transistor, as a specific node of the sampling transistor is in a floating state, it flows to occupy the gate electrode of the driving transistor, thereby forming flicker due to a leakage path. As a result, there is a problem in that the luminance of the organic light emitting diode is changed, and thus an improvement thereof is required.

Embodiments of the present invention to solve the above-described problems of the present invention, by providing a compensation capacitor in the sampling transistor included in the sub-pixel of the 6T1C or 6T3C structure to prevent the problem of flicker and the organic light emitting diode It is an object of the present invention to provide an organic light emitting display device capable of preventing a problem of changing luminance.

Embodiments of the present invention as a means for solving the above problems, an organic light emitting diode; And a subpixel having a pixel driver for driving the organic light emitting diode, wherein the pixel driver is initialized to a reference voltage by a first scan signal supplied through a first scan line and supplied through a third scan line. The data signal supplied through the data line by the four transistors operative to emit the organic light emitting diode by the scan signal, the driving transistor for driving the organic light emitting diode, and the second scan signal supplied through the second scan line. And a sampling transistor unit operative to sample the threshold voltage of the driving transistor, a capacitor for storing a data signal supplied through the data line, and a compensation capacitor to help voltage holding characteristics of the sampling transistor unit. An electroluminescent display device is provided.

The subpixel includes a first transistor having a gate electrode connected to a first scan line, a first electrode connected to a reference terminal, a second electrode connected to an anode electrode of an organic light emitting diode, and a gate electrode connected to a second scan line. A second transistor having a first electrode connected to the data line and a second electrode connected to one end of the capacitor, a driving transistor connected to the other end of the capacitor with a gate electrode connected to the first power supply terminal, and a second scan line A sampling transistor portion having a gate electrode connected to the first electrode, a first electrode connected to the other end of the capacitor, a second electrode connected to the second electrode of the driving transistor, and one end connected to the second electrode of the second transistor, and a gate electrode of the driving transistor A capacitor connected to the other end thereof, a gate electrode connected to a third scan line, a first electrode connected to a reference terminal, and a second electric charge connected to one end of the capacitor. A fourth transistor connected to the third transistor, a gate electrode connected to the third scan line, a first electrode connected to the second electrode of the driving transistor, and a second electrode connected to the anode electrode of the organic light emitting diode, and a fourth transistor The organic light emitting diode having an anode electrode connected to the second electrode of the cathode and a cathode electrode connected to the second power supply terminal, and a compensation capacitor connected between the sampling transistor unit and the gate of the fourth transistor and assisting voltage holding of the sampling transistor unit. Can be.

The sampling transistor unit may be configured as a dual gate transistor.

The sampling transistor unit includes a first sampling transistor and a second sampling transistor having a gate electrode connected to a second scan line, and the first sampling transistor has a gate electrode connected to a second scan line and a first electrode connected to the other end of the capacitor. The second electrode is connected to the first electrode of the second sampling transistor. The second sampling transistor has a gate electrode connected to the second scan line and the first electrode connected to the second electrode of the first sampling transistor. The second electrode may be connected to the second electrode.

The compensation capacitor may have one end connected to the second electrode of the first sampling transistor and the first electrode of the second sampling transistor, and the other end to the gate electrode of the fourth transistor.

In another aspect, an embodiment of the present invention, an organic light emitting diode; And a subpixel having a pixel driver for driving the organic light emitting diode, wherein the pixel driver is initialized to a reference voltage by a first scan signal supplied through a first scan line and supplied through a third scan line. The data signal supplied through the data line by the four transistors operative to emit the organic light emitting diode by the scan signal, the driving transistor for driving the organic light emitting diode, and the second scan signal supplied through the second scan line. And a sampling transistor unit operative to sample the threshold voltage of the driving transistor, two capacitors for storing the data signal supplied through the data line, and a variable compensation for the threshold voltage sampled from the sampling transistor unit. Variable Capacitors and Compensation Capacitors Helping Voltage-holding Characteristics of Sampling Transistors It provides an organic light emitting display apparatus including a.

The subpixel includes a first transistor having a gate electrode connected to a first scan line, a first electrode connected to a reference terminal, a second electrode connected to an anode electrode of an organic light emitting diode, and a gate electrode connected to a second scan line. A second transistor having a first electrode connected to the data line and a second electrode connected to one end of the first capacitor, a driving transistor connected with a gate electrode connected to the other end of the first capacitor and a first electrode connected to the first power supply terminal; A sampling transistor portion having a gate electrode connected to the second scan line, a first electrode connected to the other end of the first capacitor, and a second electrode connected to the second electrode of the driving transistor; and one end connected to the second electrode of the second transistor. A first capacitor having the other end connected to the gate electrode of the driving transistor, a second capacitor having one end connected to the first power supply terminal and the other end connected to the gate electrode of the driving transistor; A variable capacitor having one end connected to the gate electrode of the fling transistor part and the other end connected to the gate electrode of the driving transistor, a gate electrode connected to the third scan line, a first electrode connected to the reference terminal, and a second electrode connected to one end of the capacitor A fourth transistor connected to the third transistor, a gate electrode connected to the third scan line, a first electrode connected to the second electrode of the driving transistor, and a second transistor connected to the anode electrode of the organic light emitting diode, and a fourth transistor The organic light emitting diode may include an organic light emitting diode having an anode electrode connected to the second electrode and a cathode electrode connected to the second power supply terminal, and a compensation capacitor connected between the sampling transistor unit and the gate of the fourth transistor to assist voltage holding of the sampling transistor unit. .

The sampling transistor unit may be configured as a dual gate transistor.

The sampling transistor unit includes a first sampling transistor and a second sampling transistor having a gate electrode connected to a second scan line, and the first sampling transistor has a gate electrode connected to a second scan line and a first electrode at the other end of the first capacitor. The second electrode is connected to the first electrode of the second sampling transistor, the second sampling transistor is connected to the gate electrode of the second scanning line, and the first electrode is connected to the second electrode of the first sampling transistor. The second electrode may be connected to the second electrode of the transistor.

The compensation capacitor may have one end connected to the second electrode of the first sampling transistor and the first electrode of the second sampling transistor, and the other end to the gate electrode of the fourth transistor.

According to an exemplary embodiment of the present invention, a compensation capacitor is provided in a sampling transistor included in a subpixel having a 6T1C or 6T3C structure to help voltage holding characteristics of an intermediate node of a sampling transistor unit in a light emitting step, and thus a leakage pass toward a gate electrode of a driving transistor. The present invention has an effect of providing an organic light emitting display device which can be formed to prevent a problem of generating flicker and to prevent a problem of changing luminance of an organic light emitting diode.

1 is a schematic block diagram of an organic light emitting display device.
2 is a schematic structural diagram of a sub pixel according to the first embodiment of the present invention;
3 is a driving waveform diagram of a sub-pixel shown in FIG. 2;
4 and 5 are diagrams for explaining the flicker improvement according to the capacity of the compensation capacitor shown in FIG.
6 is a graph showing the amount of white luminance change between the sub pixel circuit of the comparative example and the sub pixel circuit of the first embodiment;
7 is a circuit diagram of a subpixel according to a second embodiment of the present invention;

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

≪ Embodiment 1 >

1 is a schematic block diagram of an organic light emitting display device.

As shown in FIG. 1, the organic light emitting display device includes a timing driver TCN, a panel PNL, a scan driver SDRV, and a data driver DVB.

The timing driver TCN receives a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal Data Enable, DE, a clock signal CLK, and a data signal RGB from the outside. The timing driver TCN scans the data driver DDRV using timing signals such as the vertical synchronization signal Vsync, the horizontal synchronization signal Hsync, the data enable signal Data Enable, and the clock signal CLK. The operation timing of the driver SDRV is controlled. Since the timing driver TCN may determine the frame period by counting the data enable signal DE of one horizontal period, the vertical synchronization signal Vsync and the horizontal synchronization signal Hsync supplied from the outside may be omitted. The control signals generated by the timing driver TCN include a gate timing control signal GDC for controlling the operation timing of the scan driver SDRV and a data timing control signal DDC for controlling the operation timing of the data driver DDR. ) May be included. The gate timing control signal GDC includes a gate start pulse (GSP), a gate shift clock (GSC), a gate output enable signal (Gate Output Enable, GOE), and the like. The gate start pulse GSP is supplied to the scan driver SDRV where the first scan signal is generated. The gate shift clock GSC is a clock signal commonly input to the scan driver SDRV, and is a clock signal for shifting the gate start pulse GSP. The gate output enable signal GOE controls the output of the scan driver SDRV. The data timing control signal DDC includes a source start pulse (Source, Start Pulse, SSP), a source sampling clock (SSC), a source output enable signal (Source Output Enable, SOE), and the like. The source start pulse SSP controls the data sampling start time of the data driver DDRV. The source sampling clock SSC is a clock signal that controls the sampling operation of data in the data driver DDRV based on the rising or falling edge. The source output enable signal SOE controls the output of the data driver DDRV. Meanwhile, the source start pulse SSP supplied to the data driver DVV may be omitted according to the data transmission method.

The scan driver SDRV signals the swing width of the gate driving voltage at which the transistors of the subpixels SP included in the panel PNL can operate in response to the gate timing control signal GDC supplied from the timing driver TCN. Scan signals are sequentially generated while shifting the level of. The scan driver SDRV supplies the scan signals generated through the scan lines SL1 to SLm to the subpixels SP included in the panel PNL.

The data driver DDRV samples and latches the digital data signal RGB supplied from the timing driver TCN in response to the data timing control signal DDC supplied from the timing driver TCN. Convert to The data driver DVV converts the digital data signal RGB into a gamma reference voltage and converts the data into an analog data signal. The data driver DDRV supplies the data signal converted through the data lines DL1 to DLn to the subpixels SP included in the panel PNL.

The panel PNL includes subpixels SP arranged in a matrix. The subpixels SP included in the panel PNL emit light by the scan signal and the data signal supplied from the scan driver SDRV and the data driver DDR. One subpixel includes an organic light emitting diode and a pixel driver for driving the organic light emitting diode, which is configured as follows.

FIG. 2 is a circuit diagram of a subpixel according to a first exemplary embodiment of the present invention, FIG. 3 is a driving waveform diagram of the subpixel shown in FIG. 2, and FIGS. 4 and 5 are schematic diagrams of the compensation capacitor shown in FIG. 2. FIG. 6 is a diagram for explaining a flicker improvement degree according to capacitance, and FIG. 6 is a graph showing the amount of white luminance variation between the subpixel circuit of the comparative example and the subpixel circuit of the first embodiment.

As shown in FIGS. 2 and 3, the subpixel according to the first embodiment of the present invention includes an organic light emitting diode OLED and a pixel driver SPC for driving the organic light emitting diode OLED.

The pixel driver SPC is initialized to the reference voltage by the first scan signal Vinit supplied through the first scan line SL1a and is applied to the third scan signal EM supplied through the third scan line SL1c. Four transistors T1, T3, T4, and T5 which operate to emit light by the organic light emitting diode OLED are included. In addition, the pixel driver SPC receives the data line DL1 through the driving transistor DR for driving the organic light emitting diode OLED and the second scan signal Sampling supplied through the second scan line SL1b. The sampling transistor unit TS is provided to transmit the data signal Vdata supplied through the data signal, and to operate to sample the threshold voltage of the driving transistor DR. In addition, the pixel driver SPC includes one capacitor Cst for storing the data signal Vdata supplied through the data line DL1, and a compensation capacitor Ch for helping the voltage holding characteristic of the sampling transistor unit TS. Included.

The OLED, four transistors T1, T3, T4, and T5, the driving transistor DR, the sampling transistor unit TS, the capacitor Cst, and the compensation capacitor Ch included in the subpixel. The circuit configuration and its operation will be described below.

In the first transistor T1, a gate electrode is connected to the first scan line SL1a, a first electrode is connected to the reference terminal Vref, and a second electrode is connected to the anode electrode of the organic light emitting diode OLED.

In the second transistor T2, a gate electrode is connected to the second scan line SL1b, a first electrode is connected to the data line DL1, and a second electrode is connected to one end of the capacitor Cst.

The driving transistor DR has a gate electrode connected to the other end of the capacitor Cst, a first electrode connected to the first power supply terminal ELVDD, and a second electrode connected to the first electrode of the fourth transistor T4.

In the sampling transistor unit TS, a gate electrode is connected to the second scan line SL1b, a first electrode is connected to the other end of the capacitor Cst, and a second electrode is connected to the second electrode of the driving transistor DR. The sampling transistor unit TS is configured of a dual gate transistor. The sampling transistor unit TS formed of a dual gate transistor includes a first sampling transistor TS1 and a second sampling transistor TS2 having a gate electrode connected to the second scan line SL2a. In the first sampling transistor TS1, a gate electrode is connected to the second scan line SL1b, a first electrode is connected to the other end of the capacitor Cst, and a second electrode is connected to the first electrode of the second sampling transistor TS2. Connected. In the second sampling transistor TS2, a gate electrode is connected to the second scan line SL1b, a first electrode is connected to the second electrode of the first sampling transistor TS1, and a second electrode of the driving transistor DR is connected to the second electrode of the driving transistor DR. The second electrode is connected.

One end of the capacitor Cst is connected to the second electrode of the second transistor T2 and the other end of the capacitor Cst is connected to the gate electrode of the driving transistor DR.

In the third transistor T3, a gate electrode is connected to the third scan line SL1c, a first electrode is connected to the reference terminal Vref, and a second electrode is connected to one end of the capacitor Cst.

In the fourth transistor T4, a gate electrode is connected to the third scan line SL1c, a first electrode is connected to the second electrode of the driving transistor DR, and a second electrode is connected to the anode electrode of the organic light emitting diode OLED. Connected.

In the organic light emitting diode OLED, an anode electrode is connected to the second electrode of the fourth transistor T4, and a cathode electrode is connected to the second power supply terminal ELVSS.

The compensation capacitor Ch is connected between the sampling transistor unit TS and the gate of the fourth transistor T4. The compensation capacitor Ch has one end connected to the second electrode of the first sampling transistor TS1 and the first electrode of the second sampling transistor TS2, and the other end connected to the gate electrode of the fourth transistor T4.

In the above description, the transistors included in the four transistors T1, T3, T4, and T5, the driving transistor DR, and the sampling transistor unit TS are configured of P-type. The first electrode and the second electrode of the transistors mean a source electrode and a drain electrode, but their positions may be changed.

The subpixel described above is operated as follows.

An initialization step 1 is performed in which the fifth transistor T5 is turned on by the first scan signal Vinit. By the initialization step 1, the anode of the organic light emitting diode OLED is initialized to the reference voltage.

The data voltage storage and sampling step 2 in which the second transistor T2 and the sampling transistor unit TS are turned on by the second scan signal Sampling is performed. In the data voltage storing and sampling step 2, the capacitor Cst stores the data signal supplied through the data line DL1 as a data voltage. In addition, the data storage and sampling step 2 causes the sampling transistor TS to sample the threshold voltage of the driving transistor DR.

The light emission step 3 is performed in which the third transistor T3 and the fourth transistor T4 are turned on by the third scan signal EM. By the light emitting step 3, the organic light emitting diode OLED emits light and one end of the capacitor Cst is initialized to the reference voltage.

If the compensation capacitor Ch does not exist while the subpixel is driven as described above and the organic light emitting diode OLED is driven, the intermediate node N1 of the sampling transistor unit TS configured as a dual gate transistor is It appears to be floating. In this case, even when the organic light emitting diode OLED emits light, it is observed that the voltage of the intermediate node N1 drops about 2.5V and a leak path is formed in the direction of the gate electrode of the driving transistor DR. Accordingly, since the charge flows to the gate electrode of the driving transistor DR, the voltage of the gate electrode node is increased and the brightness of the organic light emitting diode OLED is influenced, thereby being recognized as a flicker.

On the other hand, when the compensation capacitor Ch is provided as in the first embodiment, the compensation capacitor Ch can configure the coupling effect of the gate electrode of the fourth transistor T4, so that the sampling transistor unit TS It is possible to hold the intermediate node (N1) of N) to a predetermined level of voltage. Therefore, as shown in the first embodiment, the provision of the compensation capacitor Ch prevents the voltage rise of the gate electrode node of the driving transistor DR and can block the influence of the brightness of the organic light emitting diode OLED. It can be improved.

4 and 5, a flicker improvement simulation according to the capacity of the compensation capacitor Ch provided in accordance with the first embodiment is shown. In the case of the compensation capacitor (Ch), as shown in the cap 0.1f, cap 3f, cap 10f increased as shown by the better flicker improvement effect. Simulation results show that the capacitance of the compensation capacitor Ch can be formed in the range of 0.1f to 10f, but is not limited thereto.

FIG. 6A is a graph showing the amount of change in white luminance due to a 6T (Transistor) 1C (Capcitor) sub-pixel without a compensation capacitor Ch, and FIG. 6B is a diagram (A) of FIG. FIG. 7 is a graph showing the amount of change in white luminance caused by the sub pixel of the first embodiment in which the compensation capacitor Ch is provided in the sub pixel.

As can be seen from the above graph, since the compensating capacitor h does not exist in the sub-pixel circuit of the comparative example, a leak path is formed and an unstable luminance change such as "P" appears.

On the other hand, the subpixel of the first embodiment may provide the compensation capacitor Ch in the 6T1C structure to help the voltage holding characteristic of the intermediate node N1 of the sampling transistor unit TS in the light emitting step 3. Accordingly, in the subpixel of the first embodiment, a leak path is formed in the direction of the gate electrode of the driving transistor DR by floating the intermediate node N1 of the sampling transistor unit TS, thereby preventing flicker. As a result, a problem of changing luminance of the organic light emitting diode OLED is prevented.

Second Embodiment

7 is a circuit diagram illustrating a subpixel according to a second embodiment of the present invention.

As illustrated in FIG. 7, the subpixel according to the second embodiment of the present invention includes an organic light emitting diode OLED and a pixel driver SPC for driving the organic light emitting diode OLED.

The pixel driver SPC is initialized to the reference voltage by the first scan signal Vinit supplied through the first scan line SL1a and is applied to the third scan signal EM supplied through the third scan line SL1c. Four transistors T1, T3, T4, and T5 which operate to emit light by the organic light emitting diode OLED are included. In addition, the pixel driver SPC receives the data line DL1 through the driving transistor DR for driving the organic light emitting diode OLED and the second scan signal Sampling supplied through the second scan line SL1b. The sampling transistor unit TS is provided to transmit the data signal Vdata supplied through the data signal, and to operate to sample the threshold voltage of the driving transistor DR. In addition, the pixel driver SPC variably includes two capacitors Cst1 and Cst2 for storing the data signal Vdata supplied through the data line DL1 and a threshold voltage sampled from the sampling transistor TS. The compensating variable capacitor Cvar and the compensating capacitor Ch for helping the voltage holding characteristic of the sampling transistor unit TS are included.

The organic light emitting diode OLED included in the subpixel, four transistors T1, T3, T4, and T5, the driving transistor DR, the sampling transistor unit TS, the first and second capacitors Cst1 and Cst2. The circuit configuration and operation of the variable capacitor Cvar and the compensation capacitor Ch are similar to those of the first embodiment. However, since the first and second capacitors Cst1 and Cst2 and the variable capacitor Cvar are further included, only their connection relationship will be described in order to avoid duplication of description. See FIG. 3 for a drive waveform of the second embodiment.

One end of the first capacitor Cst1 is connected to the second electrode of the second transistor T2 and the other end of the first capacitor Cst1 is connected to the gate electrode of the driving transistor DR. One end of the second capacitor Cst2 is connected to the other end of the first capacitor Cst1 and the other end of the second capacitor Cst2 is connected to the first power terminal ELVDD. When the data signal is supplied, the second capacitor Cst2 compensates for the data voltage stored in the first capacitor Cst1 to be stably maintained.

One end of the variable capacitor Cvar is connected to the gate electrode of the sampling transistor unit TS and the other end of the variable capacitor Cvar is connected to the gate electrode of the driving transistor DR. The variable capacitor Cvar serves as a variable capacitor provided to variably compensate for the threshold voltage sampled from the sampling transistor unit TS in the data voltage storage and sampling step 2 shown in FIG. 3.

The second embodiment is also similar to the first embodiment, but the sub-pixel of the second embodiment is provided with a compensation capacitor Ch in the 6T3C structure so that the intermediate node N1 of the sampling transistor unit TS in the light emitting step 3 is provided. It can help the voltage holding characteristics. Accordingly, in the subpixel of the second embodiment, a leakage path is formed in the direction of the gate electrode of the driving transistor DR by the floating of the intermediate node N1 of the sampling transistor unit TS, thereby causing flicker. Is prevented, thereby preventing the problem that the luminance of the organic light emitting diode (OLED) is changed.

Embodiments of the present invention provide a compensation capacitor in a sampling transistor included in a subpixel having a 6T1C or 6T3C structure to assist voltage holding characteristics of an intermediate node of a sampling transistor in a light emitting step, and thus leak path toward a gate electrode of a driving transistor. The present invention has an effect of providing an organic light emitting display device capable of preventing a problem in which flicker is formed and preventing a change in luminance of an organic light emitting diode.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments thereof, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It will be understood that the invention may be practiced. It is therefore to be understood that the embodiments described above are to be considered in all respects only as illustrative and not restrictive. In addition, the scope of the present invention is indicated by the following claims rather than the detailed description. Also, it is to be construed that all changes or modifications derived from the meaning and scope of the claims and their equivalent concepts are included in the scope of the present invention.

TCN: Timing driver PNL: Panel
SDRV: Scan driver DDRV: Data driver
OLED: organic light emitting diode SPC: pixel driver
SLa: first scan line SL1b: second scan line
SL1c: third scan line TS: sampling transistor section
Ch: compensation capacitor T1: first transistor
T2: second transistor T3: third transistor
T4: 4th transistor T5: 5th transistor
DR: drive transistor

Claims (10)

Organic light emitting diodes; And
A subpixel having a pixel driver for driving the organic light emitting diode,
The pixel driver,
Four transistors initialized to a reference voltage by a first scan signal supplied through a first scan line and operated to emit the organic light emitting diodes by a third scan signal supplied through a third scan line;
A driving transistor for driving the organic light emitting diode;
A sampling transistor unit configured to transfer the data signal supplied through the data line by the second scan signal supplied through the second scan line and to sample the threshold voltage of the driving transistor;
A capacitor for storing a data signal supplied through the data line;
An organic light emitting display device comprising a compensation capacitor to help voltage holding characteristics of the sampling transistor unit. The method of claim 1,
The sub pixel is,
A first transistor having a gate electrode connected to the first scan line, a first electrode connected to a reference terminal, and a second electrode connected to an anode electrode of the organic light emitting diode;
A second transistor having a gate electrode connected to the second scan line, a first electrode connected to a data line, and a second electrode connected to one end of a capacitor;
The driving transistor having a gate electrode connected to the other end of the capacitor and a first electrode connected to a first power supply terminal;
The sampling transistor unit having a gate electrode connected to the second scan line, a first electrode connected to the other end of the capacitor, and a second electrode connected to a second electrode of the driving transistor;
The capacitor having one end connected to a second electrode of the second transistor and the other end connected to a gate electrode of the driving transistor;
A third transistor having a gate electrode connected to the third scan line, a first electrode connected to the reference terminal, and a second electrode connected to one end of the capacitor;
A fourth transistor having a gate electrode connected to the third scan line, a first electrode connected to a second electrode of the driving transistor, and a second electrode connected to an anode electrode of the organic light emitting diode;
The organic light emitting diode having an anode electrode connected to a second electrode of the fourth transistor and a cathode electrode connected to a second power supply terminal;
And a compensation capacitor connected between the sampling transistor unit and the gate of the fourth transistor to help hold the voltage of the sampling transistor unit. The method of claim 2,
The sampling transistor unit,
An organic light emitting display device comprising a dual gate transistor. The method of claim 2,
The sampling transistor unit,
A first sampling transistor and a second sampling transistor having a gate electrode connected to the second scan line,
In the first sampling transistor, a gate electrode is connected to the second scan line, a first electrode is connected to the other end of the capacitor, and a second electrode is connected to the first electrode of the second sampling transistor.
In the second sampling transistor, a gate electrode is connected to the second scan line, a first electrode is connected to a second electrode of the first sampling transistor, and a second electrode is connected to a second electrode of the driving transistor. Organic light emitting display device. The method of claim 4, wherein
The compensation capacitor,
And one end of the second electrode of the first sampling transistor and the other of the first electrode of the second sampling transistor, and the other end of the second electrode of the first sampling transistor. Organic light emitting diodes; And
A subpixel having a pixel driver for driving the organic light emitting diode,
The pixel driver,
Four transistors initialized to a reference voltage by a first scan signal supplied through a first scan line and operated to emit the organic light emitting diodes by a third scan signal supplied through a third scan line;
A driving transistor for driving the organic light emitting diode;
A sampling transistor unit configured to transfer the data signal supplied through the data line by the second scan signal supplied through the second scan line and to sample the threshold voltage of the driving transistor;
Two capacitors for storing the data signal supplied through the data line;
A variable capacitor that variably compensates for the threshold voltage sampled from the sampling transistor unit;
An organic light emitting display device comprising a compensation capacitor to help voltage holding characteristics of the sampling transistor unit. The method of claim 6,
The sub pixel is,
A first transistor having a gate electrode connected to the first scan line, a first electrode connected to a reference terminal, and a second electrode connected to an anode electrode of the organic light emitting diode;
A second transistor having a gate electrode connected to the second scan line, a first electrode connected to a data line, and a second electrode connected to one end of the first capacitor;
The driving transistor having a gate electrode connected to the other end of the first capacitor and a first electrode connected to a first power supply terminal;
A sampling transistor unit having a gate electrode connected to the second scan line, a first electrode connected to the other end of the first capacitor, and a second electrode connected to a second electrode of the driving transistor;
The first capacitor having one end connected to a second electrode of the second transistor and the other end connected to a gate electrode of the driving transistor;
A second capacitor having one end connected to the first power supply terminal and the other end connected to a gate electrode of the driving transistor;
The variable capacitor having one end connected to a gate electrode of the sampling transistor unit and another end connected to a gate electrode of the driving transistor;
A third transistor having a gate electrode connected to the third scan line, a first electrode connected to the reference terminal, and a second electrode connected to one end of the capacitor;
A fourth transistor having a gate electrode connected to the third scan line, a first electrode connected to a second electrode of the driving transistor, and a second electrode connected to an anode electrode of the organic light emitting diode;
The organic light emitting diode having an anode electrode connected to a second electrode of the fourth transistor and a cathode electrode connected to a second power supply terminal;
And a compensation capacitor connected between the sampling transistor unit and the gate of the fourth transistor to help hold the voltage of the sampling transistor unit. The method of claim 7, wherein
The sampling transistor unit,
An organic light emitting display device comprising a dual gate transistor. The method of claim 7, wherein
The sampling transistor unit,
A first sampling transistor and a second sampling transistor having a gate electrode connected to the second scan line,
In the first sampling transistor, a gate electrode is connected to the second scan line, a first electrode is connected to the other end of the first capacitor, and a second electrode is connected to the first electrode of the second sampling transistor.
In the second sampling transistor, a gate electrode is connected to the second scan line, a first electrode is connected to a second electrode of the first sampling transistor, and a second electrode is connected to a second electrode of the driving transistor. Organic light emitting display device. 10. The method of claim 9,
The compensation capacitor,
And one end of the second electrode of the first sampling transistor and the other of the first electrode of the second sampling transistor, and the other end of the second electrode of the first sampling transistor.

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