KR101720344B1 - Liquid Crystal Display Device - Google Patents

Abstract

An embodiment of the present invention is a liquid crystal display device comprising: a liquid crystal panel; A data driver for supplying a data signal to the liquid crystal panel, a gate driver for supplying a gate signal to the liquid crystal panel, a programmable power supply for supplying a gamma voltage and a common voltage to the liquid crystal panel, a driver controller for controlling the data driver and the gate driver, And a common voltage control unit for controlling the programmable power supply unit so that the level of the common voltage is varied for each position.

Description

[0001] The present invention relates to a liquid crystal display device,

An embodiment of the present invention relates to a liquid crystal display device.

As the information technology is developed, the market of display devices, which is a connection medium between users and information, is getting larger. Accordingly, a flat panel display (FPD) such as a liquid crystal display (LCD), an organic light emitting diode (OLED), and a plasma display panel (PDP) Usage is increasing. Among them, liquid crystal display devices capable of realizing high resolution and capable of not only miniaturization but also enlargement are widely used.

The liquid crystal display includes a transistor substrate on which a transistor, a storage capacitor, a pixel electrode, and the like are formed, and a liquid crystal layer disposed between the color filter substrate and the color filter substrate on which the color filter and the black matrix are formed. The liquid crystal display displays images in such a manner that light incident from the backlight unit is emitted by adjusting the arrangement direction of the electric field liquid crystal layer formed on the pixel electrode, the transistor substrate, or the common electrode formed on the color filter substrate.

The liquid crystal display device functions as a voltage for driving the liquid crystal, the difference between the data voltage supplied from the data driver and the common voltage serving as the reference potential. The common voltage varies depending on the position of the liquid crystal panel due to the influence of the wiring resistance and the capacitor formed in the liquid crystal panel. That is, the common voltage is one of the voltages having the greatest influence over the entire liquid crystal panel.

However, the conventional liquid crystal display device uses only a common voltage which is set at a fixed time by using a fixed common voltage or programmable power IC (Programmable Power Integrated Circuit). As a result, the conventional liquid crystal display device is continuously caused to cause a problem of crosstalk for each position of the liquid crystal panel, and improvement thereof is required.

According to another aspect of the present invention, there is provided a liquid crystal display device including a liquid crystal panel, a liquid crystal panel, Of the liquid crystal display device according to the first embodiment of the present invention.

According to an embodiment of the present invention, there is provided a liquid crystal display device comprising: a liquid crystal panel; A data driver for supplying a data signal to the liquid crystal panel; A gate driver for supplying a gate signal to the liquid crystal panel; A programmable power supply for supplying a gamma voltage and a common voltage to the liquid crystal panel; And a timing control unit including a driver control unit for controlling the data driving unit and the gate driving unit, and a common voltage control unit for controlling the programmable power supply unit so that the level of the common voltage is varied for each position of the liquid crystal panel.

The common voltage control unit can control the programmable power supply unit by the data communication method.

The level of the common voltage may be varied for each of at least one gate line formed in the liquid crystal panel or may be varied for each gate line defined for each region in the liquid crystal panel.

The common voltage control unit can transmit data for changing the register value of the programmable power supply unit so that the level of the common voltage can be varied.

The common voltage control section can write the data for changing the register value into the power supply control section included in the programmable power supply section.

The timing control unit may further include a memory unit in which a change value for each characteristic of the liquid crystal panel is stored.

The common voltage control unit may vary the level of the common voltage based on the characteristic change value stored in the memory unit.

The common voltage control unit may count at least one of the driving signals supplied from the timing control unit to the liquid crystal panel, and determine a time point at which the level of the common voltage is varied according to whether the counted value matches an internal set value.

The common voltage control unit may be configured to count at least one of the driving signals supplied to the liquid crystal panel from the timing control unit, to add a predetermined delay value to the internal set value, and to vary the level of the common voltage according to whether or not the counted value matches the delay value Can be determined.

According to the embodiment of the present invention, the level of the common voltage output from the programmable power supply unit under the control of the timing control unit is varied according to the position of the liquid crystal panel to prevent the generation of crosstalk according to the position of the liquid crystal panel, Can be improved.

1 is a block diagram of a liquid crystal display according to an embodiment of the present invention;
BACKGROUND OF THE INVENTION 1. Field of the Invention [0001] The present invention relates to a timing controller and a programmable power supply.
Figs. 3 and 4 are diagrams showing variations of a common voltage level for each position of a liquid crystal panel. Fig.
5 is a waveform diagram for helping understanding of the level change of the common voltage.
6 is a detailed configuration diagram of a timing control unit and a programmable power supply unit according to another embodiment of the present invention.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

1 is a block diagram of a liquid crystal display device according to an embodiment of the present invention.

1, a liquid crystal display according to an exemplary embodiment of the present invention includes a timing controller TCN, a liquid crystal panel PNL, a gate driver SDRV, a data driver DDRV, a backlight unit BLU, And a programmable power supply unit (PWR).

The timing control unit TCN receives a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE, a clock signal CLK and a data signal DATA from the outside. The timing controller TCN controls the data driver DDRV and the data driver DDRV using timing signals such as a vertical synchronization signal Vsync, a horizontal synchronization signal Hsync, a data enable signal DE, and a clock signal CLK. And controls the operation timing of the driving unit SDRV. Also, the timing control unit TCN varies the level of the common voltage output from the programmable power supply unit PWR by the position of the liquid crystal panel PNL using the power supply control signal PSC. The timing control unit TCN can determine the frame period by counting the data enable signal DE in one horizontal period so that the vertical synchronization signal Vsync and the horizontal synchronization signal Hsync supplied from the outside can be omitted. The control signals generated by the timing controller TCN include a gate timing control signal GDC for controlling the operation timing of the gate driver SDRV and a data timing control signal DDC for controlling the operation timing of the data driver DDRV. ) May be included. The gate timing control signal GDC includes a gate start pulse GSP, a gate shift clock GSC and a gate output enable signal GOE. The gate start pulse GSP is supplied to a gate drive IC (Integrated Circuit) generating the first gate signal. The gate shift clock GSC is a clock signal commonly input to the gate drive ICs, and is a clock signal for shifting the gate start pulse GSP. The gate output enable signal GOE controls the output of the gate drive ICs. The data timing control signal DDC includes source start pulses (Source, Start Pulse, SSP), Source Sampling Clock (SSC), Source Output Enable (SOE), and the like. The source start pulse SSP controls the data sampling start timing of the data driver DDRV. The source sampling clock SSC is a clock signal for controlling the sampling operation of data in the data driver DDRV based on the rising or falling edge. The source output enable signal SOE controls the output of the data driver DDRV. On the other hand, the source start pulse SSP supplied to the data driver DDRV may be omitted depending on the data transfer method.

The liquid crystal panel PNL includes sub-pixels SP arranged in a matrix form including a liquid crystal layer positioned between a thin film transistor substrate (hereinafter abbreviated as TFT substrate) and a color filter substrate. Data lines DL, gate lines GL, TFTs, storage capacitors, and the like are formed on the TFT substrate, and black matrices, color filters, and the like are formed on the color filter substrate. One subpixel SP is defined by a data line D1 and a gate line G1 intersecting with each other. One subpixel SP includes a TFT driven by a gate signal supplied through a gate line G1, a storage capacitor Cst for storing a data signal supplied through a data line D1 as a data voltage, And a liquid crystal cell Clc driven by the data voltage stored in the data line Cst. The liquid crystal cell Clc is driven by the data voltage supplied to the pixel electrode 1 and the common voltage supplied to the common electrode 2. [ The common electrode 2 is formed on a color filter substrate in a vertical field driving mode such as a TN (Twisted Nematic) mode and a VA (Vertical Alignment) mode. Is formed on the TFT substrate together with the pixel electrode 1 in the same horizontal electric field driving system. The common electrode 2 is supplied with a common voltage from the common voltage wiring VCOM. A polarizing plate is attached to the TFT substrate of the liquid crystal panel (PNL) and the color filter substrate, and an alignment film for setting a pre-tilt angle of the liquid crystal is formed. The liquid crystal mode of the liquid crystal panel PNL can be implemented in any liquid crystal mode as well as the TN mode, VA mode, IPS mode, and FFS mode described above.

The gate driver SDRV is responsive to the gate timing control signal GDC supplied from the timing controller TCN to switch the gate driver control voltage GDC in accordance with the swing width of the gate drive voltage at which the TFTs of the subpixels SP included in the liquid crystal panel PNL are operable And sequentially generates the gate signal while shifting the level of the signal. The gate driver SDRV supplies the gate signal generated through the gate lines GL to the sub-pixels SP included in the liquid crystal panel PNL. The gate driver SDRV may be mounted on the liquid crystal panel PNL in the form of an integrated circuit (IC) or may be formed on the liquid crystal panel PNL in the form of a gate in panel (GIP).

The data driver DDRV samples and latches the data signal DATA supplied from the timing control unit TCN in response to the data timing control signal DDC supplied from the timing control unit TCN and converts the sampled data signal into data of a parallel data system . The data driver DDRV converts the data signal DATA into a gamma reference voltage when converting into data of a parallel data system. The data driver DDRV supplies the data signal DATA converted through the data lines DL to the sub-pixels SP included in the liquid crystal panel PNL. The data driver DDRV may be mounted on the liquid crystal panel PNL in the form of an IC or may be formed on the liquid crystal panel PNL in the form of a gate in panel (GIP).

The backlight unit (BLU) provides light to the liquid crystal panel (PNL). The backlight unit BLU includes a light source for emitting light, a light guide plate for guiding light to the liquid crystal panel PNL, an optical sheet for condensing and diffusing light, and the like.

The programmable power supply unit PWR converts the input power supply Vin supplied from the outside to a DC power supply and outputs the gamma voltages GMA0 to GMA7 and the common voltage Vcom. The gamma voltages GMA0 to GMA7 are supplied to the data driver DDRV and the common voltage Vcom is supplied to the common voltage line VCOM. In addition, the programmable power supply unit PWR may output a driving voltage for driving the gate driving unit SDRV and the data driving unit DDRV.

Hereinafter, some configurations of the liquid crystal display device according to the embodiments of the present invention will be described in more detail.

FIG. 2 is a detailed configuration diagram of a timing control unit and a programmable power supply unit according to an exemplary embodiment of the present invention. FIGS. 3 and 4 are views showing a variation of a common voltage level for each position of a liquid crystal panel. This is a waveform chart for helping understanding of the level change.

A timing control unit TCN includes a common voltage control unit VVC for controlling the programmable power supply unit PWR such that the level of the common voltage Vcom is varied for each position of the liquid crystal panel PNL, .

The common voltage control unit (VVC) supplies a power supply control signal (PSC) for controlling the programmable power supply unit (PWR) in a data communication method. The common voltage control unit (VVC) and the programmable power supply unit (PWR) can perform data communication using a serial communication method such as I2C. At this time, the common voltage control unit VVC may be set as a master, and the programmable power supply unit PWR may be set as a slave. A communication module is included in the common voltage control unit VVC and the programmable power supply unit PWR in order to exchange the power supply control signal PSC with the data communication method.

The level of the common voltage Vcom output from the programmable power supply unit PWR is varied by the power supply unit control signal PSC output from the common voltage control unit VVC, 4 < / RTI >

3, the level of the common voltage Vcom is varied for each of at least one gate line G1, G2 to Gn formed in the liquid crystal panel PNL. When the level of the common voltage Vcom varies for each of the gate lines G1 and G2 to Gn, the common voltage Vcom is divided into different levels such as Vcom1 and Vcom2 to Vcomn in FIG. 5 according to the positions of the liquid crystal panels PNL .

As in the other example of FIG. 4, the level of the common voltage Vcom is varied for each of the gate lines GA, GB to GN defined for each region in the liquid crystal panel PNL. When the level of the common voltage Vcom is varied for each of the gate lines GA, GB to GN, the common voltage Vcom is divided into different levels such as Vcom1 and Vcom2 to Vcomn in FIG. 5 for each position of the liquid crystal panel PNL Respectively.

In FIG. 3, the common voltage control unit VVC can control the programmable power supply unit PWR so that the level of the common voltage Vcom is varied by a certain amount every line of the liquid crystal panel PNL. Accordingly, the example of FIG. 3 can improve the luminance difference appearing for each subpixel by varying the common voltage Vcom. On the other hand, in FIG. 4, the common voltage control unit VVC can control the programmable power supply unit PWR so that the level of the common voltage Vcom is varied by a constant amount for each of a plurality of lines of the liquid crystal panel PNL. Therefore, in the example of FIG. 4, the luminance difference appearing in each region of the liquid crystal panel PNL can be improved through the variation of the common voltage Vcom. Here, FIG. 5 is intended to help understand how the level of the common voltage Vcom varies, but the present invention is not limited thereto. The level may be varied in a positive or negative direction in the reference common voltage level, .

In order to vary the level of the common voltage Vcom for each position of the liquid crystal panel PNL in the manner as described above, the common voltage control unit VVC supplies data for changing the register value of the programmable power supply unit PWR It can be directly written into the power source control unit MC included in the programmable power source unit PWR. The power supply control unit MC is a device for controlling the input / output of the programmable power supply unit PWR.

The common voltage control unit VVC may write data for changing the register value of the programmable power supply unit PWR into the internal memory MM included in the programmable power supply unit PWR. However, the internal memory (MM) included in the internal portion of the programmable power supply (PWR) has a limited storage space for data writing and a limited lifetime. Therefore, if the data for changing the register value of the programmable power supply unit PWR is directly written to the power supply control unit MC included in the programmable power supply unit PWR, the internal memory MM included in the programmable power supply unit PWR is not used There is an advantage to be able to.

In the embodiment described above, the common voltage control unit (VVC) for controlling the programmable power supply unit (PWR) is configured to vary the level of the common voltage only in a specific limited manner, and additional data required to control the programmable power supply unit It is an unnecessary structure. However, in order to vary the level of the common voltage according to the model of the liquid crystal display device, the individual product, or the future setting, the following other embodiment can be used.

6 is a detailed configuration diagram of a timing controller and a programmable power unit according to another embodiment of the present invention.

1 and 6, a common voltage control unit VVC for controlling the programmable power supply unit PWR such that the level of the common voltage Vcom is varied for each position of the liquid crystal panel PNL, is provided in the timing control unit TCN, . The timing control unit TCN includes a memory unit (EEPROM) in which the change values (aa to zz) for each characteristic of the liquid crystal panel (PNL) are stored. The memory (EEPROM) is controlled to be read and written by the memory controller EEC included in the timing controller TCN.

The common voltage control unit VVC reads the change value for each characteristic stored in the memory unit EEPROM through the memory control unit EEC and supplies data for varying the level of the common voltage Vcom to the programmable power supply unit PWR to vary the level of the common voltage Vcom for each position of the liquid crystal panel PNL according to the model of the liquid crystal display device, individual products, or the future setting.

The common voltage control unit (VVC) of another embodiment also supplies a power supply control signal (PSC) for controlling the programmable power supply unit (PWR) by a data communication method. The common voltage control unit (VVC) and the programmable power supply unit (PWR) can perform data communication using a serial communication method such as I2C. At this time, the common voltage control unit VVC may be set as a master, and the programmable power supply unit PWR may be set as a slave. A communication module is included in the common voltage control unit VVC and the programmable power supply unit PWR in order to exchange the power supply control signal PSC with the data communication method.

The level of the common voltage Vcom output from the programmable power supply unit PWR is varied by the power supply unit control signal PSC output from the common voltage control unit VVC and the level of the common voltage Vcom is set to the level shown in Figs. 4 < / RTI >

In order to vary the level of the common voltage Vcom according to the position of the liquid crystal panel PNL in the manner as described above, the common voltage control unit VVC supplies data for changing the register value of the programmable power supply unit PWR Can be directly written into the power source control unit MC included in the programmable power source unit PWR.

The common voltage control unit VVC supplies a driving signal such as a gate start pulse GSP and a source output enable signal SOE supplied from the timing control unit TCN to the liquid crystal panel PNL in the embodiment described above, ), The vertical synchronizing signal (Vsync), and the data enable signal (DE), and judges whether or not the level of the common voltage (Vcom) is variable according to whether or not the counted value matches the internal set value have.

Alternatively, the common voltage control unit VVC counts at least one of the driving signals supplied from the timing control unit TCN to the liquid crystal panel PNL, adds a predetermined delay value to the internal set value, It is possible to determine the time point at which the level of the common voltage Vcom is to be varied according to whether or not they match.

The reason for determining the time point at which the level of the common voltage Vcom is varied is that the common voltage control unit VVC is supplied from the programmable power source unit PWR in response to the idle period that is not affected by the output fluctuation of the programmable power source unit PWR The level of the common voltage Vcom is varied in real time. Here, an example of the idle period that does not affect the output fluctuation of the programmable power supply unit PWR is not limited to the Vertical Blank Interval (VBI).

According to the present invention, the level of the common voltage output from the programmable power supply unit under the control of the timing control unit is varied for each position of the liquid crystal panel, thereby preventing the occurrence of crosstalk according to the position of the liquid crystal panel, Can be improved. Further, according to the present invention, the timing controller can judge and reflect the variable time and the variable amount of the common voltage level in real time, so that it is possible to respond to the improvement of the luminance difference according to the state of the liquid crystal panel. In addition, the present invention is capable of directly controlling the timing controller without using the internal memory included in the programmable power supply unit, thereby reducing the capacity of the internal memory included in the programmable power supply unit.

While the present invention has been described in connection with what is presently considered to be practical exemplary embodiments, it is to be understood that the invention is not limited to the disclosed embodiments, but, on the contrary, It will be understood that the invention may be practiced. It is therefore to be understood that the embodiments described above are to be considered in all respects only as illustrative and not restrictive. In addition, the scope of the present invention is indicated by the following claims rather than the detailed description. Also, all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included within the scope of the present invention.

TCN: Timing control part PN: liquid crystal panel
SDRV: Gate driver DDRV: Data driver
BLU: Backlight Unit PWR: Programmable Power Supply
VVC: Common voltage control part MC: Power supply control part

Claims (9)

A liquid crystal panel;
A data driver for supplying a data signal to the liquid crystal panel;
A gate driver for supplying a gate signal to the liquid crystal panel;
A programmable power supply for supplying a gamma voltage and a common voltage to the liquid crystal panel; And
And a common voltage control unit for controlling the programmable power supply unit so that the level of the common voltage is varied according to a position of the liquid crystal panel,
Wherein the common voltage control unit comprises:
Data for changing the register value of the programmable power supply unit so that the level of the common voltage is variable,
And writes data for changing the register value directly to a power supply control section included in the programmable power supply section. The method according to claim 1,
Wherein the common voltage control unit comprises:
And the programmable power supply unit is controlled by a data communication method. The method according to claim 1,
The level of the common voltage
Wherein the liquid crystal panel has a plurality of gate lines,
Wherein the gate lines are defined for each region of the liquid crystal panel. delete delete The method according to claim 1,
Wherein the timing control unit comprises:
And a memory unit for storing a change value for each characteristic of the liquid crystal panel. The method according to claim 6,
Wherein the common voltage control unit comprises:
Wherein the level of the common voltage is varied based on the characteristic change value stored in the memory unit. The method according to claim 1,
Wherein the common voltage control unit comprises:
Wherein the timing control unit counts at least one of the driving signals supplied to the liquid crystal panel, and determines a time to vary the level of the common voltage according to whether the counted value matches the internal set value. The method according to claim 1,
Wherein the common voltage control unit comprises:
Wherein the timing control unit counts at least one of the driving signals supplied to the liquid crystal panel, adds a predetermined delay value to the internal set value, and varies the level of the common voltage according to whether or not the delay value matches the count value A liquid crystal display device for judging a time point.

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