KR101652793B1 - Light emitting device having a current-limiting layer - Google Patents
Light emitting device having a current-limiting layer Download PDFInfo
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- KR101652793B1 KR101652793B1 KR1020090114636A KR20090114636A KR101652793B1 KR 101652793 B1 KR101652793 B1 KR 101652793B1 KR 1020090114636 A KR1020090114636 A KR 1020090114636A KR 20090114636 A KR20090114636 A KR 20090114636A KR 101652793 B1 KR101652793 B1 KR 101652793B1
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Abstract
The light emitting device having the current confined layer may include a substrate, a first electrode layer, a current confined layer, a pn junction diode, and a second electrode layer. The current confined layer may be connected in series with the pn junction diode to limit the current flowing across the pn junction diode to within the limiting current, even if the pn junction diode is shorted or operating abnormally.
Description
This disclosure relates to a light emitting device having a current confined layer.
A light emitting diode (LED) is a light emitting device having a pn junction semiconductor layer, and a pn junction in which an electron-hole is coupled to emit light. In order to overcome the disadvantages of low luminous efficiency, wide spectrum width and large output deviation of conventional laminated film type LEDs, a nanoscale LED or nanoscale LED forming a pn junction with a nanorod, LEDs are being studied. Nanostructured LEDs have high specific surface area and high light-extraction efficiency.
A light-emitting element having a current confined layer is provided.
A light emitting device having a current confined layer according to an aspect of the present invention includes:
Board;
A first electrode layer provided on a substrate;
A current confinement layer provided on the first electrode layer;
A plurality of pn junction diodes provided on the current confined layer;
and a second electrode layer provided to cover an upper portion of the pn junction diode.
The plurality of pn junction diodes may include a p-type semiconductor layer, an active layer, and an n-type semiconductor layer.
the p-type semiconductor layer may be a p-type GaN layer, the active layer may be an InGaN active layer, and the n-type semiconductor layer may be an n-type GaN layer.
The plurality of pn junction diodes may be nano bars or micro-bar-shaped pn junction diodes.
The plurality of pn junction diodes may be poly-crystalline pn junction diodes.
And may further include an insulating layer insulating the plurality of pn junction diodes from each other.
The resistance of the current confined layer may be between 30 OMEGA and 100 M [Omega].
Current confined layer is SiO x N y: consisting of P, SiN y, or SiO x: B, SiO x N y: P, SiO x N y, SiN y: B, SiN y: P, SiO x: B, SiO x May be formed of any one selected from the group.
x can satisfy 0.05? x? 2.
The current confined layer can be determined by heating any one selected from the group.
The current confining layer may include a plurality of resistance regions provided under the plurality of pn junction diodes and an insulating region surrounding the plurality of resistance regions.
A light emitting device having a current confined layer according to another aspect of the present invention includes:
Board;
A micro heater capable of locally heating at a high temperature, the micro heater including a heating part provided on the substrate and a supporting part supporting the heating part;
A current confinement layer provided on the micro-heater;
A plurality of pn junction diodes provided on the current confined layer;
And a second electrode layer covering the upper portion of the pn junction diode.
When the light emitting device having the current limiting layer is used, the current flowing across the LEDs can be limited to a limit current even if some LEDs are shorted or operating abnormally, and the deviation of the current flowing across the LEDs of the light emitting device is reduced .
Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the drawings, like reference numerals refer to like elements, and the size and thickness of each element may be exaggerated for clarity of explanation.
1 is a cross-sectional view schematically showing a light emitting device having a current confined layer according to an embodiment. 1, the light emitting device according to the present embodiment includes a
The
On the current
Next, the operation of the light emitting device according to the present embodiment will be described. 2A is a diagram illustrating an equivalent circuit of a light emitting device having a current confined layer according to an embodiment. Referring to FIG. 2A, the light emitting device of the present embodiment may be an
Where V app is the voltage supplied to the LED array, I is the current flowing across the LED, R is the resistance of the current limiting layer, and V LED is the voltage across the LED. When a current limiting layer having a specific resistance value (R) is connected in series to the LED, current is limited so that the current flowing through the LED and the current flowing through the current confining layer are equal. That is, the current flowing across the LEDs is determined by Equation (1).
3A is a diagram showing an equivalent circuit of a nanostructured LED array or a poly-crystalline LED array, which is a comparative example. FIG. 3B is a graph showing a relationship between a current flowing across each LED and a voltage across each LED in a nanorod shaped LED array or polycrystalline LED array of a comparative example. Referring to FIG. 3B, the V LED axis represents the voltage applied to the LED, and the I axis represents the current flowing through the LED. The first straight line is a straight line showing the current-voltage relationship at both ends of the shorted LED1. When LED1 is shorted, since the resistance at both ends of LED1 is close to zero, the slope can be large enough so that the first straight line converges to the I axis. And curves 2, 3, and 4 are curves showing the current-voltage relationship between the LEDs 2 to 4, which are normal. I limit is the maximum limit current at which the LED can operate normally. Nanostructured LED arrays or polycrystalline LED arrays are difficult to fully control for uniformity, and many surface defects can cause shorts in some LEDs. Therefore, there is a problem that the current-voltage characteristics between the both ends of the LED are uneven and the performance of the entire device is deteriorated. When the
4 is a cross-sectional view schematically showing a light emitting device having a current confined layer according to another embodiment. Hereinafter, differences from the above-described embodiment will be mainly described.
Referring to FIG. 4, the light emitting device of this embodiment may include a
On the
The operation of the light emitting device according to this embodiment is as described above. the current flowing across the
5 is a cross-sectional view schematically showing a light emitting device having a current confined layer according to another embodiment. Hereinafter, differences from the above-described embodiment will be mainly described.
Referring to FIG. 5, the light emitting device of this embodiment may include a
The
A plurality of
6 is a cross-sectional view schematically showing a light emitting device having a current confined layer according to another embodiment. Hereinafter, differences from the above-described embodiment will be mainly described.
6, the light emitting device according to the present exemplary embodiment may include a
The light emitting device having the current confined layer according to the present invention has been described with reference to the embodiments shown in the drawings for the sake of understanding. However, those skilled in the art will appreciate that various modifications and variations It will be appreciated that other embodiments are possible. Accordingly, the true scope of the present invention should be determined by the appended claims.
1 is a cross-sectional view schematically showing a light emitting device according to an embodiment of the present invention.
2A is a diagram illustrating an equivalent circuit of an LED array according to an embodiment of the present invention.
2B is a graph schematically illustrating the current-voltage characteristic across the LED improved by the LED array shown in FIG. 2A.
3A is a diagram showing an equivalent circuit of the LED array of the comparative example.
FIG. 3B is a graph showing a relationship between a current flowing through the LED and a voltage across the LED according to the short-circuit of the
4 is a cross-sectional view schematically showing a light emitting device according to another embodiment of the present invention.
5 is a cross-sectional view schematically showing a light emitting device according to another embodiment of the present invention.
6 is a cross-sectional view schematically showing a light emitting device according to another embodiment of the present invention.
Claims (13)
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KR1020090114636A KR101652793B1 (en) | 2009-11-25 | 2009-11-25 | Light emitting device having a current-limiting layer |
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KR1020090114636A KR101652793B1 (en) | 2009-11-25 | 2009-11-25 | Light emitting device having a current-limiting layer |
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KR101652793B1 true KR101652793B1 (en) | 2016-08-31 |
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4479831A (en) | 1980-09-15 | 1984-10-30 | Burroughs Corporation | Method of making low resistance polysilicon gate transistors and low resistance interconnections therefor via gas deposited in-situ doped amorphous layer and heat-treatment |
KR100317989B1 (en) * | 1999-12-27 | 2001-12-24 | 오길록 | High luminance blue dc-electroluminescent display |
KR100658938B1 (en) * | 2005-05-24 | 2006-12-15 | 엘지전자 주식회사 | Light emitting device with nano-rod and method for fabricating the same |
Family Cites Families (1)
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JP4160000B2 (en) * | 2004-02-13 | 2008-10-01 | ドンゴク ユニバーシティ インダストリー アカデミック コーポレイション ファウンデイション | Light emitting diode and manufacturing method thereof |
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Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4479831A (en) | 1980-09-15 | 1984-10-30 | Burroughs Corporation | Method of making low resistance polysilicon gate transistors and low resistance interconnections therefor via gas deposited in-situ doped amorphous layer and heat-treatment |
KR100317989B1 (en) * | 1999-12-27 | 2001-12-24 | 오길록 | High luminance blue dc-electroluminescent display |
KR100658938B1 (en) * | 2005-05-24 | 2006-12-15 | 엘지전자 주식회사 | Light emitting device with nano-rod and method for fabricating the same |
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