KR101640812B1 - Method of fabricating oxide thin film transistor - Google Patents

Abstract

A method of manufacturing an oxide thin film transistor according to the present invention is a bottom gate structure thin film transistor using an amorphous zinc oxide (ZnO) based semiconductor as an active layer. The thin film transistor has a first source / Drain electrode, and the second source / drain electrode is formed in a narrower width than the drain electrode, thereby reducing a step of the channel region.

Accordingly, the present invention provides an effect of preventing the breakage of the active layer due to the step of the source / drain electrode and preventing deterioration and uniformity of the device.

In addition, the method of manufacturing an oxide thin film transistor according to the present invention can increase the thickness of the second source / drain electrode and enable low-resistance wiring design.

Oxide thin film transistor, first and second source / drain electrodes,

Description

TECHNICAL FIELD [0001] The present invention relates to an oxide thin film transistor,

The present invention relates to a method of manufacturing an oxide thin film transistor, and more particularly, to a method of manufacturing an oxide thin film transistor of a bottom gate structure using an amorphous zinc oxide based semiconductor as an active layer.

Recently, interest in information display has increased, and a demand for using portable information media has increased, and a light-weight flat panel display (FPD) that replaces a cathode ray tube (CRT) And research and commercialization are being carried out. Particularly, among such flat panel display devices, a liquid crystal display (LCD) is an apparatus for displaying an image using the optical anisotropy of a liquid crystal, and is excellent in resolution, color display and picture quality and is actively applied to a notebook or a desktop monitor have.

The liquid crystal display comprises a color filter substrate, an array substrate, and a liquid crystal layer formed between the color filter substrate and the array substrate.

An active matrix (AM) method, which is a driving method mainly used in the liquid crystal display, is a method of driving a liquid crystal of a pixel portion by using an amorphous silicon thin film transistor (a-Si TFT) to be.

Hereinafter, the structure of a typical liquid crystal display device will be described in detail with reference to FIG.

1 is an exploded perspective view schematically showing a general liquid crystal display device.

As shown in the figure, the liquid crystal display comprises a color filter substrate 5, an array substrate 10, and a liquid crystal layer (not shown) formed between the color filter substrate 5 and the array substrate 10 30).

The color filter substrate 5 includes a color filter C composed of a plurality of sub-color filters 7 implementing colors of red (R), green (G) and blue (B) A black matrix 6 for separating the sub-color filters 7 from each other and shielding light transmitted through the liquid crystal layer 30 and a transparent common electrode for applying a voltage to the liquid crystal layer 30 8).

The array substrate 10 includes a plurality of gate lines 16 and data lines 17 arranged vertically and horizontally to define a plurality of pixel regions P and a plurality of gate lines 16 and data lines 17 A thin film transistor T which is a switching element formed in the intersection region and a pixel electrode 18 formed on the pixel region P. [

The color filter substrate 5 and the array substrate 10 are bonded together to face each other by a sealant (not shown) formed on the periphery of the image display area to constitute a liquid crystal display panel. The color filter substrate 5 (Not shown) formed on the color filter substrate 5 or the array substrate 10 are bonded to each other.

Meanwhile, since the liquid crystal display device is a light-receiving device rather than a light-emitting device and has technical limitations such as brightness, contrast ratio, and viewing angle, the liquid crystal display device is a light- Development of a new display device capable of overcoming the disadvantages has been actively developed.

OLED (Organic Light Emitting Diode), which is one of the new flat panel display devices, has excellent viewing angle and contrast ratio compared to liquid crystal displays because it is a self-luminous type. Lightweight thin type can be used because it does not need backlight And is also advantageous in terms of power consumption. In addition, it has the advantage of being able to drive a DC low voltage and has a high response speed, and is particularly advantageous in terms of manufacturing cost.

In recent years, studies have been actively made on the enlargement of an organic electroluminescent display. In order to achieve this, development of a transistor ensuring stable operation and durability by securing a constant current characteristic as a driving transistor of an organic electroluminescent device is required.

The amorphous silicon thin film transistor used in the above-described liquid crystal display device can be manufactured in a low temperature process, but has a very small mobility and does not satisfy a constant current bias condition. On the other hand, the polycrystalline silicon thin film transistor has a high mobility and a satisfactory constant current test condition, but it is difficult to obtain a uniform characteristic, so it is difficult to make a large area and a high temperature process is required.

An oxide semiconductor thin film transistor in which an active layer is formed of an oxide semiconductor is developed. In this case, when an oxide semiconductor is applied to a conventional thin film transistor having a bottom gate structure, the oxide semiconductor is damaged during the etching process of the source / There is a problem of causing degeneration.

2 is a cross-sectional view schematically showing the structure of a general oxide thin film transistor.

The oxide thin film transistor of the bottom gate structure includes a gate electrode 21 and a gate insulating film 15 formed on a substrate 10 and an active layer 24 made of an oxide semiconductor on the gate insulating film 15 .

The source and drain electrodes 22 and 23 are formed on the active layer 24. The source and drain electrodes 22 and 23 are formed on the active layer 24 Part A in particular) may be damaged and become denatured in some cases. This leads to a problem in the reliability of the device.

That is, the metal for the source / drain electrode is limited to the metal of the molybdenum series in consideration of the contact resistance with the oxide semiconductor. When the source / drain electrode is formed by wet etching, the property of the oxide semiconductor, which is vulnerable to etchant The active layer is liable to be lost or damaged owing to the back-sputtering and the oxygen deficiency of the oxide semiconductor even when the source / drain electrode is formed by dry etching. .

An object of the present invention is to provide a method of manufacturing an oxide thin film transistor using an amorphous zinc oxide-based semiconductor as an active layer.

It is another object of the present invention to provide a method of fabricating an oxide thin film transistor in which an active layer is formed on a source / drain electrode to prevent denaturation of the amorphous zinc oxide based semiconductor caused by etching the source / drain electrode.

It is another object of the present invention to provide a method of forming an active layer on a source / drain electrode, which prevents defective open-circuiting of the active layer due to a step of the source / drain electrode and increases the thickness of the source / And to provide a method of manufacturing an oxide thin film transistor capable of designing a resistance.

Other objects and features of the present invention will be described in the following description of the invention and claims.

According to another aspect of the present invention, there is provided a method of fabricating an oxide thin film transistor, the method including forming a second conductive layer and a third conductive layer on a gate insulating layer, Forming a first photoresist pattern having a first thickness, a second photoresist pattern, a third photoresist pattern and a fourth photoresist pattern having a second thickness on the substrate, forming the first photoresist pattern to the fourth photoresist pattern, Forming a first source / drain electrode having a first width, which is formed of the second conductive film on the gate insulating film by selectively etching the second conductive film and the third conductive film by using the second conductive film and the third conductive film as a mask, 3 photoresist pattern and the fourth photoresist pattern are removed and a part of the thickness of the first photoresist pattern and the second photoresist pattern is removed, Forming a fifth photoresist pattern and a sixth photoresist pattern on the first source / drain electrode by selectively etching the third conductive film using the fifth photoresist pattern and the sixth photoresist pattern as a mask, 3 conductive film, and forming a second source / drain electrode having a second width narrower than the first width.
The edge portions of the first and second source / drain electrodes may be formed by etching the side surfaces of the third conductive film by using the fifth photoresist pattern and the sixth photoresist pattern so that the edge portions of the first and second source / It can be formed so as to have a stepped shape only at the edge portion where it is located.

The oxide thin film transistor of the present invention includes a first source / drain electrode having a first width and a second source / drain electrode formed on the gate insulating film, the first source / Drain electrode and a second source / drain electrode having a second width narrower than the first width and a second source / drain electrode between the first and second source electrodes and the first and second drain electrodes, And an active layer formed over the gate insulating film and made of an amorphous zinc oxide-based semiconductor.
At this time, the edge portions of the first and second source / drain electrodes may have a stepped shape only at the edge portion located at the edge of the channel region of the active layer in both edge portions.

As described above, the method for manufacturing an oxide thin film transistor according to the present invention provides an effect of being applicable to a large-area display by using an amorphous zinc oxide-based semiconductor as an active layer.

In addition, in the method of manufacturing an oxide thin film transistor according to the present invention, by forming an active layer on a source / drain electrode, it is possible to prevent the denaturation and the uniformity of the oxide semiconductor occurring during the etching of the source / drain electrode.

In particular, the method for fabricating an oxide thin film transistor according to the present invention includes forming a second source / drain electrode on a first source / drain electrode having a smaller thickness than a width of the first source / drain electrode, The disconnection of the active layer due to the step of the source / drain electrode can be prevented. As a result, the contact failure can be prevented and the device performance can be improved.

In addition, the thickness of the second source / drain electrode can be increased, and a low-resistance wiring design can be performed, thereby providing an effect applicable to a large-area display or a high-resolution display.

Hereinafter, preferred embodiments of a method of manufacturing an oxide thin film transistor according to the present invention will be described in detail with reference to the accompanying drawings.

FIG. 3 is a cross-sectional view schematically showing the structure of an oxide thin film transistor according to a first embodiment of the present invention, and schematically shows the structure of an oxide thin film transistor using an amorphous zinc oxide-based semiconductor as an active layer.

The oxide thin film transistor according to the first embodiment of the present invention includes a gate electrode 121 formed on a substrate 110, a gate insulating film 115 formed on the gate electrode 121, Source and drain electrodes 122 and 123 formed on the insulating film 115 and an active layer 124 formed of an amorphous zinc oxide based semiconductor and electrically connected to the source and drain electrodes 122 and 123.

At this time, since the oxide thin film transistor according to the first embodiment of the present invention forms an active layer 124 by using an amorphous zinc oxide-based semiconductor, high mobility and constant current test conditions are satisfied and uniform characteristics are secured It has the advantages applicable to area display.

The oxide thin film transistor in which an amorphous zinc oxide based semiconductor material is applied to the active layer 124 is used as a material of the liquid crystal display device, And an organic light emitting display.

In recent years, a great deal of attention and activity have been focused on transparent electronic circuits. Since the oxide thin film transistor in which the amorphous zinc oxide based semiconductor material is applied to the active layer 124 has high mobility and can be manufactured at a low temperature, There is an advantage that it can be used in electronic circuits.

Particularly, the oxide thin film transistor according to the first embodiment of the present invention forms an active layer 124 made of a-IGZO semiconductor containing heavy metals such as indium (In) and gallium (Ga) in the ZnO .

The a-IGZO semiconductor is transparent because it can transmit visible light, and the oxide thin film transistor fabricated from the a-IGZO semiconductor has a mobility of 1 to 100 cm ² / Vs, and has a higher mobility characteristic than the amorphous silicon thin film transistor .

In addition, the a-IGZO semiconductor can produce UV light emitting diode (LED), white LED and other components having a wide band gap and high color purity and can be processed at a low temperature, It has the characteristics to produce.

Moreover, since the oxide thin film transistor fabricated from the a-IGZO semiconductor exhibits a uniform characteristic similar to that of an amorphous silicon thin film transistor, the structure of the oxide thin film transistor is as simple as an amorphous silicon thin film transistor and has advantages of being applicable to a large area display.

The oxide thin film transistor according to the first embodiment of the present invention having such characteristics can control the carrier concentration of the active layer 124 by controlling the oxygen concentration in the reactive gas during the sputtering, .

The oxide thin film transistor according to the first embodiment of the present invention is formed by forming source and drain electrodes 122 and 123 and then depositing an a-IGZO oxide semiconductor to form an active layer 124, It is possible to fundamentally solve the problem of denaturation of the oxide semiconductor which occurs during the etching of the oxide semiconductor layers 122 and 123.

That is, as oxide semiconductors are exposed to a process during fabrication of the device, that is, dry etching of the source / drain electrodes, the characteristics of the oxide semiconductor are altered, resulting in deterioration of the device or lowering of uniformity. In order to solve such a problem, the present invention applies a structure in which source / drain electrodes 122 and 123 are formed, and an active layer 124 used as a channel is formed thereon.

However, such a structure has disadvantages in that the active layer is disconnected due to the step difference of the source / drain electrodes, contact is a problem, and the efficiency is low. That is, referring to FIG. 4, when an active layer is formed by depositing an amorphous zinc oxide-based semiconductor layer after forming a source / drain electrode with a thickness of about 500 Å, the active layer is formed by a step of the source / The second source / drain electrode is formed on the first source / drain electrode having a smaller thickness than the first source / drain electrode, so that the second source / It is possible to prevent disconnection of the active layer due to the step of the source / drain electrode by reducing the step height of the region, which will be described in detail through the following second embodiment of the present invention.

5 is a cross-sectional view schematically showing the structure of an oxide thin film transistor according to a second embodiment of the present invention, except that the source / drain electrodes are formed as a double layer and the stepped portion of the channel region is reduced. The oxide thin film transistor according to one embodiment has the same components as those of the oxide thin film transistor according to one embodiment.

The oxide thin film transistor according to the second embodiment of the present invention includes a gate electrode 221 formed on a substrate 210, a gate insulating film 215 formed on the gate electrode 221, Source and drain electrodes 222 and 223 formed on the insulating film 215 and an active layer 224 formed of an amorphous zinc oxide based semiconductor and electrically connected to the source and drain electrodes 222 and 223.

As the oxide thin film transistor according to the second embodiment of the present invention forms an active layer 224 using an amorphous zinc oxide based semiconductor in the same manner as the oxide thin film transistor according to the first embodiment, It has the advantage that it can be applied to a large-area display while satisfying the constant current test condition and ensuring uniform characteristics.

In particular, the oxide thin film transistor according to the second embodiment of the present invention is characterized in that an active layer 224 of a-IGZO semiconductor containing heavy metals such as indium and gallium is formed on the ZnO.

The oxide thin film transistor according to the second embodiment of the present invention can adjust the carrier concentration of the active layer 224 by controlling the oxygen concentration in the reactive gas during the sputtering, thereby controlling the device characteristics of the thin film transistor do.

In addition, the oxide thin film transistor according to the second embodiment of the present invention forms the active layer 224 for channel by depositing the a-IGZO oxide semiconductor after forming the source / drain electrodes 222 and 223, / Drain electrodes 222 and 223 can be fundamentally solved.

The oxide thin film transistor according to the second embodiment of the present invention includes the source and drain electrodes 222 and 223 to improve ohmic contact characteristics between the oxide semiconductor, that is, the active layer 224 and the source / drain electrodes 222 and 223. The source and drain electrodes 222 and 223 include first source and drain electrodes 222a and 223a that are in contact with the gate insulating layer 215 and first and second source and drain electrodes 222a and 222b. And second source / drain electrodes 222b and 223b formed on the active layer 224 and contacting the active layer 224.

The second source / drain electrodes 222b and 223b which are in direct contact with the active layer 224 may be formed of titanium (Ti), titanium alloy (Ti) or a-IGZO oxide semiconductor And indium tin oxide (ITO), molybdenum (Mo), etc., which are excellent in ohmic contact characteristics.

Particularly, the oxide thin film transistor according to the second embodiment of the present invention has the first source / drain electrodes 222a and 223a formed to have a small thickness, and the first source / drain electrodes 222a and 223a, The second source / drain electrodes 222b and 223b are formed to reduce the step of the channel region, thereby preventing disconnection of the active layer 224 due to the step of the source / drain electrodes 222 and 223 , Which will be described in detail through the following method of manufacturing an oxide thin film transistor.

FIGS. 6A to 6C are cross-sectional views sequentially illustrating the manufacturing process of the oxide thin film transistor shown in FIG.

As shown in FIG. 6A, a predetermined gate electrode 221 is formed on a substrate 210 made of a transparent insulating material.

At this time, the amorphous zinc oxide-based compound semiconductor to be applied to the oxide thin film transistor of the present invention can be used for low-temperature deposition such as a plastic substrate and a soda lime glass. In addition, since the amorphous characteristics are exhibited, it is possible to use the substrate 210 for a large area display.

The gate electrode 221 is formed by selectively depositing a first conductive layer on the entire surface of the substrate 210 and then performing a photolithography process (first mask process).

Here, the first conductive layer may be formed of one selected from the group consisting of aluminum (Al), aluminum alloy (Al alloy), tungsten (W), copper (Cu), nickel (Ni), chromium A low resistance opaque conductive material such as molybdenum (Mo), titanium (Ti), platinum (Pt), tantalum (Ta) The first conductive layer may be formed of a transparent conductive material such as indium tin oxide (ITO), indium zinc oxide (IZO), or the like. Layer structure.

Next, as shown in FIG. 6B, a gate insulating layer 215 is formed on the entire surface of the substrate 210 on which the gate electrode 221 is formed.

A second conductive film and a third conductive film are formed on the entire surface of the substrate 210 on which the gate insulating film 215 is formed. Then, the second conductive film and the third conductive film are selectively formed through a photolithography process (second mask process) Layer structure of source / drain electrodes 222 and 223 composed of first source / drain electrodes 222a and 223a and second source / drain electrodes 222b and 223b is formed on the gate insulating layer 215 .

At this time, the first source / drain electrodes 222a and 223a that are in contact with the gate insulating layer 215 are formed to have a reduced thickness, and the first source / drain electrodes 222a and 223a are formed in a shape having a width smaller than that of the first source / By forming the two source / drain electrodes 222b and 223b, the step of the channel region can be reduced.

At this time, the oxide thin film transistor according to the second embodiment of the present invention firstly forms the first source / drain electrodes 222a and 223a having the first width by etching the second conductive film and the third conductive film, The second conductive film is etched again using the patterned photoresist pattern to form the second source / drain electrodes 222b and 223b having a second width narrower than the first width, which will be described in detail with reference to the drawings .

7A to 7E are cross-sectional views illustrating a second mask process according to a second embodiment of the present invention shown in FIG. 6B.

7A, an inorganic insulating film such as a silicon nitride film (SiNx), a silicon oxide film (SiO ₂ ), hafnium (Hf) oxide, aluminum oxide and the like are formed on the entire surface of the substrate 210 on which the gate electrode 221 is formed A gate insulating film 215 made of the same high-permittivity oxide film is formed.

At this time, the gate insulating layer 215 may be formed by chemical vapor deposition (CVD) or plasma enhanced chemical vapor deposition (PECVD).

A predetermined second conductive layer 230 and a third conductive layer 240 are formed on the entire surface of the substrate 210 on which the gate insulating layer 215 is formed.

Here, the second conductive layer 230 may be used for forming the first source / drain electrode on the gate insulating layer 215 regardless of the kind of the metal, and the third conductive layer 240 may have a binding force with oxygen Titanium, titanium alloy, or an indium-tin-oxide or molybdenum metal having excellent ohmic contact characteristics with the a-IGZO oxide semiconductor. Also, the source / drain electrodes may be formed in a multi-layered structure of two or more layers.

Also, the second conductive layer 230 may be formed to have a small thickness in order to prevent defective open-circuit of the active layer due to the step of the source / drain electrode in the channel region.

7B, a photoresist layer made of a photosensitive material such as a photoresist is formed on the entire surface of the substrate 210, and then a photoresist layer is formed on the entire surface of the substrate 210 through a second mask process according to the second embodiment of the present invention. A photoresist pattern 270 is formed.

Next, as shown in FIG. 7C, when the second conductive film and the third conductive film are selectively removed using the first photosensitive film pattern 270 formed as described above as a mask, the gate insulating film The first source / drain electrodes 222a and 223a having a first width are formed on the first source / drain electrodes 215 and 215, respectively.

At this time, the second conductive layer and the third conductive layer may be etched using wet etching, and the third conductive layer may be formed on the first source / drain electrodes 222a and 223a, The third conductive film patterns 222b 'and 223b' patterned in the same manner as the first and second drain electrodes 222a and 223a are formed.

7D, a predetermined second photoresist pattern 270 is formed on the third conductive patterns 222b 'and 223b', and a second photoresist pattern 230 is formed on the third photoresist patterns 222b 'and 223b' (270 ') is formed.

At this time, the second photoresist pattern 270 'remains only in the second source / drain electrode region in a form that has a width smaller than that of the first photoresist pattern as a part of the width and thickness are removed through the ashing process.

7E, a portion of the third conductive film pattern is selectively removed using the remaining second photoresist pattern 270 'as a mask, thereby forming a third conductive film on the substrate 210 The second source / drain electrodes 222b and 223b are formed.

At this time, the second source / drain electrodes 222b and 223b have a second width that is narrower than the first source / drain electrodes 222a and 223a below the second source / drain electrodes 222b and 223b, The edge portions of the first and second electrodes 222 and 223 have a stepped shape, so that the effect of substantially reducing the step difference is obtained.

Next, as shown in FIG. 6C, amorphous zinc oxide based semiconductor is deposited on the entire surface of the substrate 210 on which the source / drain electrodes 222 and 223 of the double layer are formed to form a predetermined amorphous zinc oxide based semiconductor layer And then selectively patterned through a photolithography process (a third mask process) to form an active layer 224 electrically connected to the second source / drain electrodes 222b and 223b.

At this time, the amorphous zinc oxide based composite semiconductor, particularly a-IGZO semiconductor, is formed by a sputtering method using a composite target of gallium oxide (Ga ₂ O ₃ ), indium oxide (In ₂ O ₃ ) and zinc oxide (ZnO) Alternatively, a chemical vapor deposition method such as chemical vapor deposition or atomic layer deposition (ALD) may be used.

The a-IGZO semiconductor may be formed by using a complex oxide target of an atomic ratio of gallium, indium and zinc of 1: 1: 1, 2: 2: 1, 3: 2: 1, 4: An oxide-based semiconductor layer can be formed.

Here, the oxide thin film transistor according to the second embodiment of the present invention can control the carrier concentration of the active layer 224 by controlling the oxygen concentration in the reactive gas during the sputtering for forming the amorphous zinc oxide based semiconductor layer, It is possible to secure device characteristics under the conditions of oxygen concentration of 1 to 10% and thickness of 500 to 1000 Å.

At this time, the active layer 224 according to the second embodiment of the present invention is in contact with the source / drain electrodes 222 and 223 having a stepped step, so that the active layer 224 Can be prevented.

In addition, the second source / drain electrodes 222b and 223b can be thickened by securing the contact region with the lower first source / drain electrodes 222a and 223a, thereby enabling low-resistance wiring design. The result is an effect that can be applied to large area displays or high resolution displays.

On the other hand, the source / drain electrodes of the above-described two-layer structure may be formed using a diffraction mask or a half-tone mask (hereinafter, referred to as a half-tone mask when referring to a diffraction mask) The third embodiment of the present invention will be described in detail.

8 is a cross-sectional view schematically showing the structure of an oxide thin film transistor according to a third embodiment of the present invention.

The oxide thin film transistor according to the third embodiment of the present invention includes a gate electrode 321 formed on a substrate 310, a gate insulating film 315 formed on the gate electrode 321, Source and drain electrodes 322 and 323 formed on the insulating film 315 and an active layer 324 formed of an amorphous zinc oxide based semiconductor and electrically connected to the source and drain electrodes 322 and 323.

At this time, the oxide thin film transistor according to the third embodiment of the present invention forms an active layer 324 using an amorphous zinc oxide-based semiconductor in the same manner as the oxide thin film transistor according to the first and second embodiments , It has the advantages that it can be applied to a large-area display since the uniform mobility can be secured while satisfying high mobility and constant current test conditions.

In particular, the oxide thin film transistor according to the third embodiment of the present invention is characterized in that an active layer 324 of a-IGZO semiconductor containing heavy metals such as indium and gallium is formed on the ZnO.

The oxide thin film transistor according to the third embodiment of the present invention can adjust the carrier concentration of the active layer 324 by controlling the oxygen concentration in the reactive gas during the sputtering, thereby controlling the device characteristics of the thin film transistor do.

In the oxide thin film transistor according to the third embodiment of the present invention, source / drain electrodes 322 and 323 are formed and then an a-IGZO oxide semiconductor is deposited to form an active layer 324 for channel, It is possible to fundamentally solve the problem of denaturation of the oxide semiconductor occurring at the time of etching the source / drain electrodes 322 and 323.

The oxide thin film transistor according to the third embodiment of the present invention includes the source and drain electrodes 322 and 323 in order to improve the ohmic contact characteristics between the oxide semiconductor, that is, the active layer 324 and the source / drain electrodes 322 and 323. The source and drain electrodes 322 and 323 are formed of a first source and drain electrodes 322a and 323a in contact with the gate insulating layer 315 and a second source and drain electrodes 322a and 323b, And second source / drain electrodes 322b and 323b formed on the active layer 323 and in contact with the active layer 324.

At this time, the second source / drain electrodes 322b and 323b directly contacting the active layer 324 may be made of titanium, titanium alloy, or indium-tin oxide having excellent ohmic contact characteristics with the a-IGZO oxide semiconductor, - oxide, molybdenum, and the like.

In particular, the oxide thin film transistor according to the third embodiment of the present invention is formed by forming the first source / drain electrodes 322a and 323a with a thin thickness in the same manner as the oxide thin film transistor according to the second embodiment described above, The second source / drain electrodes 322b and 323b are formed to have a width smaller than that of the source / drain electrodes 322a and 323a so as to reduce a step of the channel region, It is possible to prevent the active layer 324 from being broken.

9A to 9C are cross-sectional views sequentially illustrating the manufacturing process of the oxide thin film transistor shown in FIG.

As shown in FIG. 9A, a predetermined gate electrode 321 is formed on a substrate 310 made of a transparent insulating material.

At this time, the gate electrode 321 is formed by selectively depositing a first conductive film on the entire surface of the substrate 310 and then performing a photolithography process (first mask process).

Next, as shown in FIG. 9B, a gate insulating layer 315 is formed on the entire surface of the substrate 310 on which the gate electrode 321 is formed.

Then, a second conductive film and a third conductive film are formed on the entire surface of the substrate 310 on which the gate insulating film 315 is formed, and then the second conductive film and the third conductive film are selectively formed through a photolithography process (second mask process) Layer source / drain electrodes 322 and 323 made of first source / drain electrodes 322a and 323a and second source / drain electrodes 322b and 323b are formed on the gate insulating layer 315 .

At this time, the first source / drain electrodes 322a and 323a that are in contact with the gate insulating layer 315 are formed to have a reduced thickness, and the first source / drain electrodes 322a and 323a are formed in a shape having a width smaller than that of the first source / By forming the two source / drain electrodes 322b and 323b, the step of the channel region can be reduced.

In the oxide thin film transistor according to the third embodiment of the present invention, the first source / drain electrodes 322a and 323a are formed on the first source / drain electrodes 322a and 323a by applying a diffraction pattern to the edge of the channel region. The second source / drain electrodes 322b and 323b can be formed in a narrower width than the first source / drain electrodes 322b and 323b, which will be described in detail with reference to the drawings.

10A to 10F are cross-sectional views illustrating a second mask process according to the third embodiment of the present invention shown in FIG. 9B.

10A, a gate insulating film 315 made of an inorganic insulating film such as a silicon nitride film, a silicon oxide film, or a high dielectric oxide film such as hafnium oxide or aluminum oxide is formed on the entire surface of the substrate 310 on which the gate electrode 321 is formed, .

A predetermined second conductive layer 330 and a third conductive layer 340 are formed on the entire surface of the substrate 310 on which the gate insulating layer 315 is formed.

In this case, the second conductive layer 330 may be used for forming the first source / drain electrode on the gate insulating layer 315 regardless of the kind of the metal. The third conductive layer 340 may have a binding force with oxygen Titanium, titanium alloy, or an indium-tin-oxide or molybdenum metal having excellent ohmic contact characteristics with the a-IGZO oxide semiconductor. Also, the source / drain electrodes may be formed in a multi-layered structure of two or more layers.

In addition, the second conductive layer 330 may be formed to have a small thickness in order to prevent defective open circuit of the active layer due to the step of the source / drain electrode in the channel region.

10B, a photoresist layer 370 made of a photosensitive material such as a photoresist is formed on the entire surface of the substrate 310, and then a diffraction mask 380 according to the second embodiment of the present invention is formed And selectively irradiates the photoresist layer 370 with light.

At this time, the diffraction mask 380 is provided with a first transmission region I through which all the irradiated light is transmitted and a second transmission region II through which only a part of light is transmitted and partly blocked by applying a diffraction pattern, And only the light transmitted through the diffraction mask 380 is irradiated to the photoresist layer 370.

Then, after the exposed photoresist layer 370 is developed through the diffraction mask 380, light is blocked through the blocking region III and the second transmissive region II as shown in FIG. 10C The first photoresist pattern 370a to the fourth photoresist pattern 370d are left in the partially blocked area and the photoresist layer is completely removed in the first transmissive area I through which all the light is transmitted, The surface of the conductive film 340 is exposed.

The first photoresist pattern 370a and the second photoresist pattern 370b formed in the blocking region III may include a third photoresist pattern 370c and a fourth photoresist pattern 370c formed through the second transmissive area II, . In addition, the photoresist layer is completely removed from the region through which the light is completely transmitted through the first transmissive region I because the positive type photoresist is used. The present invention is not limited to this, May be used.

Next, as shown in FIG. 10D, using the first photoresist pattern 370a to the fourth photoresist pattern 370d formed as described above as a mask, a second conductive film and a third conductive film are selectively formed The first source / drain electrodes 322a and 323a having a first width are formed on the gate insulating layer 315. [

At this time, the second conductive layer and the third conductive layer may be etched using wet etching, and the third conductive layer may be formed on the first source / drain electrodes 322a and 323a, The third conductive film patterns 322b 'and 323b' patterned in the same manner as the source / drain electrodes 322a and 323a are formed.

Then, ashing process for removing a portion of the first photoresist pattern 370a to the fourth photoresist pattern 370d is performed. As shown in FIG. 10E, the third photoresist pattern 370a, The pattern and the fourth photoresist pattern are completely removed.

At this time, the first photoresist pattern and the second photoresist pattern are formed by the fifth photoresist pattern 370a 'and the sixth photoresist pattern 370b', which are removed by the thickness of the third photoresist pattern and the fourth photoresist pattern, Drain region corresponding to the third source / drain region (III).

10F, a portion of the third conductive film pattern is selectively removed by using the remaining fifth photoresist pattern 370a 'and the sixth photoresist pattern 370b' as a mask, The second source / drain electrodes 322b and 323b are formed of the third conductive film.

At this time, the second source / drain electrodes 322b and 323b have a second width that is smaller in width than the first source / drain electrodes 322a and 323a in the channel region, and accordingly, / Drain electrodes 322 and 323 has a stepped shape, so that the effect of substantially reducing the step difference is obtained.

Next, as shown in FIG. 9C, a predetermined amorphous zinc oxide based semiconductor layer is formed by depositing an amorphous zinc oxide based semiconductor on the entire surface of the substrate 310 on which the source / drain electrodes 322 and 323 of the double layer are formed And then selectively patterned through a photolithography process (a third mask process) to form an active layer 324 electrically connected to the second source / drain electrodes 322b and 323b.

At this time, the amorphous zinc oxide based composite semiconductor, particularly a-IGZO semiconductor, may be formed by a sputtering method using a composite target of gallium oxide, indium oxide and zinc oxide, and in addition, It is also possible to use a chemical vapor deposition method.

The a-IGZO semiconductor may be formed by using a complex oxide target of an atomic ratio of gallium, indium and zinc of 1: 1: 1, 2: 2: 1, 3: 2: 1, 4: An oxide-based semiconductor layer can be formed.

Here, the oxide thin film transistor according to the third embodiment of the present invention can control the carrier concentration of the active layer 324 by controlling the oxygen concentration in the reactive gas during the sputtering for forming the amorphous zinc oxide-based semiconductor layer, It is possible to secure device characteristics under the conditions of oxygen concentration of 1 to 10% and thickness of 500 to 1000 Å.

At this time, the active layer 324 according to the third embodiment of the present invention is in contact with the source / drain electrodes 322 and 323 having a stepped step, so that the active layer 324 Can be prevented.

In addition, the second source / drain electrodes 322a and 323a can increase the thickness of the second source / drain electrodes 322a and 323a, thereby enabling a low-resistance wiring design. The result is an effect that can be applied to large area displays or high resolution displays.

As described above, the present invention can be applied not only to liquid crystal display devices but also to other display devices manufactured using thin film transistors, for example, organic electroluminescent display devices in which organic electroluminescent devices are connected to driving transistors.

Further, the present invention has an advantage that it can be used in a transparent electronic circuit or a flexible display by applying an amorphous zinc oxide-based semiconductor material having high mobility and being processable at a low temperature as an active layer.

While a great many are described in the foregoing description, it should be construed as an example of preferred embodiments rather than limiting the scope of the invention. Therefore, the invention should not be construed as limited to the embodiments described, but should be determined by equivalents to the appended claims and the claims.

1 is an exploded perspective view schematically showing a general liquid crystal display device.

2 is a cross-sectional view schematically showing the structure of a general oxide thin film transistor.

3 is a cross-sectional view schematically showing the structure of an oxide thin film transistor according to a first embodiment of the present invention.

FIG. 4 is a SEM photograph showing the disconnection of the active layer due to the step of the source / drain electrode in the oxide thin film transistor shown in FIG. 3; FIG.

5 is a cross-sectional view schematically showing the structure of an oxide thin film transistor according to a second embodiment of the present invention.

6A to 6C are cross-sectional views sequentially showing the manufacturing process of the oxide thin film transistor shown in FIG.

7A to 7E are cross-sectional views illustrating a second mask process according to a second embodiment of the present invention shown in FIG. 6B.

8 is a cross-sectional view schematically showing the structure of an oxide thin film transistor according to a third embodiment of the present invention.

9A to 9C are cross-sectional views sequentially showing the manufacturing process of the oxide thin film transistor shown in FIG.

10A to 10F are cross-sectional views illustrating a second mask process according to a third embodiment of the present invention shown in FIG. 9B.

DESCRIPTION OF REFERENCE NUMERALS

110, 210, 310: substrate 115, 215, 315:

121, 221, 321: gate electrodes 122, 222, 322:

123, 223, 323: drain electrode 124, 224, 324: active layer

222a, 322a: first source electrode 222b, 322b: second source electrode

223a, 323a: first drain electrode 223b, 323b: second drain electrode

Claims (9)

Forming a gate electrode as a first conductive film on a substrate; Forming a gate insulating film on the substrate on which the gate electrode is formed; Forming a second conductive film and a third conductive film on the gate insulating film; A first photoresist pattern having a first thickness and a second photoresist pattern having a first thickness and a third photoresist pattern having a second thickness and a fourth photoresist pattern having a second thickness are formed on the substrate using a diffraction mask having a diffraction pattern applied to an edge portion of a channel region of the active layer, ; Wherein the second conductive film and the third conductive film are selectively patterned using the first photoresist pattern to the fourth photoresist pattern as a mask to form a first conductive film on the gate insulating film, Forming a source / drain electrode; Removing the third photoresist pattern and the fourth photoresist pattern and removing a portion of the thickness of the first photoresist pattern and the second photoresist pattern to form a fifth photoresist pattern and a sixth photoresist pattern having a third thickness; Wherein the third conductive film is formed on the substrate by selectively removing the side surface of the third conductive film by using the fifth photoresist pattern and the sixth photoresist pattern as masks to form a third conductive film having a second width narrower than the first width, Forming two source / drain electrodes; And And forming an active layer made of an amorphous zinc oxide-based semiconductor on the second source / drain electrode, Wherein edge portions of the first and second source / drain electrodes are formed by etching the side surfaces of the third conductive film by using the fifth photoresist pattern and the sixth photoresist pattern to form edges at edge portions of the channel regions, Wherein the step of forming the oxide thin film transistor has a stepped shape only. delete delete The method of claim 1, wherein the second source / drain electrode is formed of titanium, a titanium alloy, or molybdenum. delete delete delete delete delete

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