KR101635695B1 - 아날로그 메모리 셀들을 위한 적응적 프로그래밍 및 소거 기법들 - Google Patents

아날로그 메모리 셀들을 위한 적응적 프로그래밍 및 소거 기법들 Download PDF

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KR101635695B1
KR101635695B1 KR1020147023284A KR20147023284A KR101635695B1 KR 101635695 B1 KR101635695 B1 KR 101635695B1 KR 1020147023284 A KR1020147023284 A KR 1020147023284A KR 20147023284 A KR20147023284 A KR 20147023284A KR 101635695 B1 KR101635695 B1 KR 101635695B1
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KR
South Korea
Prior art keywords
memory cells
group
memory
programming
duration
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KR1020147023284A
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English (en)
Korean (ko)
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KR20140117583A (ko
Inventor
이얄 구르기
요아브 카소라
오피르 샬비
Original Assignee
애플 인크.
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Priority claimed from US13/356,694 external-priority patent/US9009547B2/en
Priority claimed from US13/471,484 external-priority patent/US9293194B2/en
Application filed by 애플 인크. filed Critical 애플 인크.
Publication of KR20140117583A publication Critical patent/KR20140117583A/ko
Application granted granted Critical
Publication of KR101635695B1 publication Critical patent/KR101635695B1/ko

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/021—Detection or location of defective auxiliary circuits, e.g. defective refresh counters in voltage or current generators
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G11C11/5635—Erasing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/344—Arrangements for verifying correct erasure or for detecting overerased cells
    • G11C16/3445—Circuits or methods to verify correct erasure of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G11C16/3459—Circuits or methods to verify correct programming of nonvolatile memory cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/02—Detection or location of defective auxiliary circuits, e.g. defective refresh counters
    • G11C29/028—Detection or location of defective auxiliary circuits, e.g. defective refresh counters with adaption or trimming of parameters
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C2029/0409—Online test

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
KR1020147023284A 2012-01-24 2013-01-16 아날로그 메모리 셀들을 위한 적응적 프로그래밍 및 소거 기법들 KR101635695B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US13/356,694 US9009547B2 (en) 2011-01-27 2012-01-24 Advanced programming verification schemes for analog memory cells
US13/356,694 2012-01-24
US13/471,484 2012-05-15
US13/471,484 US9293194B2 (en) 2011-01-27 2012-05-15 Programming and erasure schemes for analog memory cells
PCT/US2013/021756 WO2013112336A2 (en) 2012-01-24 2013-01-16 Programming and erasure schemes for analog memory cells

Publications (2)

Publication Number Publication Date
KR20140117583A KR20140117583A (ko) 2014-10-07
KR101635695B1 true KR101635695B1 (ko) 2016-07-01

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Family Applications (1)

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KR1020147023284A KR101635695B1 (ko) 2012-01-24 2013-01-16 아날로그 메모리 셀들을 위한 적응적 프로그래밍 및 소거 기법들

Country Status (6)

Country Link
EP (1) EP2807650A2 (ja)
JP (1) JP6001093B2 (ja)
KR (1) KR101635695B1 (ja)
CN (1) CN104067348B (ja)
TW (1) TWI523011B (ja)
WO (1) WO2013112336A2 (ja)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9135975B2 (en) * 2013-10-28 2015-09-15 Qualcomm Incorporated Write pulse width scheme in a resistive memory
IT201600121618A1 (it) * 2016-11-30 2018-05-30 St Microelectronics Srl Metodo di riduzione della durata di un'operazione di memoria in un dispositivo di memoria non volatile e relativo dispositivo di memoria non volatile
KR102533072B1 (ko) * 2018-08-13 2023-05-17 에스케이하이닉스 주식회사 블록의 상태에 따라 사용 여부를 결정하는 메모리 시스템 및 메모리 시스템의 동작 방법

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001093287A (ja) 1999-09-24 2001-04-06 Sony Corp 不揮発性半導体記憶装置
US20060158940A1 (en) * 2005-01-19 2006-07-20 Saifun Semiconductors, Ltd. Partial erase verify
JP2011008913A (ja) 2007-02-20 2011-01-13 Sandisk Corp 不揮発性記憶装置のための可変書き込み

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH10199263A (ja) * 1996-12-30 1998-07-31 Sony Corp 不揮発性半導体記憶装置
US20050128807A1 (en) * 2003-12-05 2005-06-16 En-Hsing Chen Nand memory array incorporating multiple series selection devices and method for operation of same
KR100719368B1 (ko) * 2005-06-27 2007-05-17 삼성전자주식회사 플래시 메모리 장치의 적응적 프로그램 방법 및 장치
US7656710B1 (en) * 2005-07-14 2010-02-02 Sau Ching Wong Adaptive operations for nonvolatile memories
KR100843037B1 (ko) * 2007-03-27 2008-07-01 주식회사 하이닉스반도체 플래시 메모리 장치 및 이의 소거 방법
US8085586B2 (en) * 2007-12-27 2011-12-27 Anobit Technologies Ltd. Wear level estimation in analog memory cells
JP2010027165A (ja) * 2008-07-22 2010-02-04 Toshiba Corp 不揮発性半導体記憶装置およびそのデータ書込み方法
JP2010123210A (ja) * 2008-11-20 2010-06-03 Toshiba Corp 半導体記憶装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001093287A (ja) 1999-09-24 2001-04-06 Sony Corp 不揮発性半導体記憶装置
US20060158940A1 (en) * 2005-01-19 2006-07-20 Saifun Semiconductors, Ltd. Partial erase verify
JP2011008913A (ja) 2007-02-20 2011-01-13 Sandisk Corp 不揮発性記憶装置のための可変書き込み

Also Published As

Publication number Publication date
CN104067348B (zh) 2017-04-05
WO2013112336A3 (en) 2013-09-26
JP6001093B2 (ja) 2016-10-05
EP2807650A2 (en) 2014-12-03
WO2013112336A2 (en) 2013-08-01
TWI523011B (zh) 2016-02-21
CN104067348A (zh) 2014-09-24
TW201346909A (zh) 2013-11-16
KR20140117583A (ko) 2014-10-07
JP2015510653A (ja) 2015-04-09

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