KR101557812B1 - N-웰 스위칭 회로 - Google Patents

N-웰 스위칭 회로 Download PDF

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Publication number
KR101557812B1
KR101557812B1 KR1020157021577A KR20157021577A KR101557812B1 KR 101557812 B1 KR101557812 B1 KR 101557812B1 KR 1020157021577 A KR1020157021577 A KR 1020157021577A KR 20157021577 A KR20157021577 A KR 20157021577A KR 101557812 B1 KR101557812 B1 KR 101557812B1
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KR
South Korea
Prior art keywords
pmos transistor
well
voltage
gate
mode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020157021577A
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English (en)
Korean (ko)
Other versions
KR20150097815A (ko
Inventor
에신 테르지오글루
그레고리 아메리아다 유비에그하라
세승 윤
바라찬더 가네산
아닐 쵸우다리 코타
Original Assignee
퀄컴 인코포레이티드
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Application filed by 퀄컴 인코포레이티드 filed Critical 퀄컴 인코포레이티드
Publication of KR20150097815A publication Critical patent/KR20150097815A/ko
Application granted granted Critical
Publication of KR101557812B1 publication Critical patent/KR101557812B1/ko
Expired - Fee Related legal-status Critical Current
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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/22—Modifications for ensuring a predetermined initial state when the supply voltage has been applied
    • H03K17/223—Modifications for ensuring a predetermined initial state when the supply voltage has been applied in field-effect transistor switches
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/18—Auxiliary circuits, e.g. for writing into memory
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/12—Bit line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, equalising circuits, for bit lines
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/08—Word line control circuits, e.g. drivers, boosters, pull-up circuits, pull-down circuits, precharging circuits, for word lines
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08—Modifications for protecting switching circuit against overcurrent or overvoltage
    • H03K17/081—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit
    • H03K17/08104—Modifications for protecting switching circuit against overcurrent or overvoltage without feedback from the output circuit to the control circuit in field-effect transistor switches
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors
    • H03K17/6871—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor
    • H03K17/6872—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors the output circuit comprising more than one controlled field-effect transistor using complementary field-effect transistors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/00315—Modifications for increasing the reliability for protection in field-effect transistor circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C13/00—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00
    • G11C13/0002—Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00, or G11C25/00 using resistive RAM [RRAM] elements
    • G11C13/0021—Auxiliary circuits
    • G11C13/0069—Writing or programming circuits or methods
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0018—Special modifications or use of the back gate voltage of a FET
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0063—High side switches, i.e. the higher potential [DC] or life wire [AC] being directly connected to the switch and not via the load
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K2217/00—Indexing scheme related to electronic switching or gating, i.e. not by contact-making or -breaking covered by H03K17/00
    • H03K2217/0072—Low side switches, i.e. the lower potential [DC] or neutral wire [AC] being directly connected to the switch and not via the load

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
KR1020157021577A 2013-01-16 2014-01-10 N-웰 스위칭 회로 Expired - Fee Related KR101557812B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/742,964 2013-01-16
US13/742,964 US8787096B1 (en) 2013-01-16 2013-01-16 N-well switching circuit
PCT/US2014/011138 WO2014113295A1 (en) 2013-01-16 2014-01-10 N-well switching circuit

Publications (2)

Publication Number Publication Date
KR20150097815A KR20150097815A (ko) 2015-08-26
KR101557812B1 true KR101557812B1 (ko) 2015-10-06

Family

ID=50031588

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020157021577A Expired - Fee Related KR101557812B1 (ko) 2013-01-16 2014-01-10 N-웰 스위칭 회로

Country Status (6)

Country Link
US (2) US8787096B1 (https=)
EP (1) EP2946474B1 (https=)
JP (1) JP6092427B2 (https=)
KR (1) KR101557812B1 (https=)
CN (1) CN104937848B (https=)
WO (1) WO2014113295A1 (https=)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8787096B1 (en) 2013-01-16 2014-07-22 Qualcomm Incorporated N-well switching circuit
US9082498B2 (en) * 2013-08-08 2015-07-14 Qualcomm Incorporated N-well switching circuit
US10131884B2 (en) 2015-02-23 2018-11-20 Lanzatech New Zealand Limited Recombinant acetogenic bacterium for the conversion of methane to products
CN105049029B (zh) * 2015-07-06 2018-05-04 上海巨微集成电路有限公司 一种pmos管衬底切换电路
MX391661B (es) 2015-10-13 2025-03-21 Lanzatech Nz Inc Bacteria diseñada por ingeniería genética que comprende una trayectoria de fermentación que genera energía
CA3010412C (en) 2015-12-03 2020-04-14 Lanzatech New Zealand Limited Arginine supplementation to improve efficiency in gas fermenting acetogens
ES2955708T3 (es) 2016-02-01 2023-12-05 Lanzatech Nz Inc Proceso integrado de fermentación y electrólisis
CA3015665C (en) 2016-02-26 2020-09-22 Lanzatech New Zealand Limited Crispr/cas systems for c1-fixing bacteria
US9570192B1 (en) 2016-03-04 2017-02-14 Qualcomm Incorporated System and method for reducing programming voltage stress on memory cell devices
CN111683731B (zh) 2018-02-12 2022-09-02 朗泽科技有限公司 用于提高碳转化效率的工艺
EP3781668B1 (en) 2018-04-20 2023-10-04 Lanzatech, Inc. Fermentation process for producing ethanol
CN113225056A (zh) * 2021-05-21 2021-08-06 上海韦尔半导体股份有限公司 一种控制电路、电路控制方法及电子产品
US12212315B1 (en) * 2023-01-04 2025-01-28 Cadence Design Systems, Inc. Interface device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20050068069A1 (en) 2003-09-30 2005-03-31 Sheng-Hua Chen Input/output buffer
US20050128670A1 (en) 2003-12-12 2005-06-16 Sheng-Hua Chen Input/output buffer protection circuit
US20090261865A1 (en) 2008-04-17 2009-10-22 Ronald Pasqualini High voltage CMOS output buffer constructed from low voltage CMOS transistors

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US4670668A (en) 1985-05-09 1987-06-02 Advanced Micro Devices, Inc. Substrate bias generator with power supply control means to sequence application of bias and power to prevent CMOS SCR latch-up
KR0169157B1 (ko) * 1993-11-29 1999-02-01 기다오까 다까시 반도체 회로 및 mos-dram
JP3264622B2 (ja) 1996-07-16 2002-03-11 株式会社東芝 半導体装置
US5844425A (en) 1996-07-19 1998-12-01 Quality Semiconductor, Inc. CMOS tristate output buffer with having overvoltage protection and increased stability against bus voltage variations
JP4105833B2 (ja) * 1998-09-09 2008-06-25 株式会社ルネサステクノロジ 半導体集積回路装置
TW453032B (en) * 1998-09-09 2001-09-01 Hitachi Ltd Semiconductor integrated circuit apparatus
US6452858B1 (en) * 1999-11-05 2002-09-17 Hitachi, Ltd. Semiconductor device
US6377112B1 (en) 2000-12-05 2002-04-23 Semiconductor Components Industries Llc Circuit and method for PMOS device N-well bias control
US6573134B2 (en) * 2001-03-27 2003-06-03 Sharp Laboratories Of America, Inc. Dual metal gate CMOS devices and method for making the same
US7218151B1 (en) * 2002-06-28 2007-05-15 University Of Rochester Domino logic with variable threshold voltage keeper
US7038274B2 (en) * 2003-11-13 2006-05-02 Volterra Semiconductor Corporation Switching regulator with high-side p-type device
KR100728950B1 (ko) * 2004-03-11 2007-06-15 주식회사 하이닉스반도체 내부전압 발생장치
FR2894373B1 (fr) * 2005-12-07 2008-01-04 Atmel Corp Cellule anti-fusible autonome
US7330049B2 (en) * 2006-03-06 2008-02-12 Altera Corporation Adjustable transistor body bias generation circuitry with latch-up prevention
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TWI451697B (zh) * 2006-05-03 2014-09-01 Synopsys Inc 極低功率類比補償電路
US7800179B2 (en) * 2009-02-04 2010-09-21 Fairchild Semiconductor Corporation High speed, low power consumption, isolated analog CMOS unit
CN101997305B (zh) 2009-08-26 2013-04-10 安凯(广州)微电子技术有限公司 一种反向电压保护电路及功率管装置
US8787096B1 (en) 2013-01-16 2014-07-22 Qualcomm Incorporated N-well switching circuit

Patent Citations (3)

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Publication number Priority date Publication date Assignee Title
US20050068069A1 (en) 2003-09-30 2005-03-31 Sheng-Hua Chen Input/output buffer
US20050128670A1 (en) 2003-12-12 2005-06-16 Sheng-Hua Chen Input/output buffer protection circuit
US20090261865A1 (en) 2008-04-17 2009-10-22 Ronald Pasqualini High voltage CMOS output buffer constructed from low voltage CMOS transistors

Also Published As

Publication number Publication date
JP2016511933A (ja) 2016-04-21
CN104937848A (zh) 2015-09-23
CN104937848B (zh) 2017-12-05
US9252765B2 (en) 2016-02-02
KR20150097815A (ko) 2015-08-26
WO2014113295A1 (en) 2014-07-24
EP2946474B1 (en) 2016-07-27
US8787096B1 (en) 2014-07-22
US20140198588A1 (en) 2014-07-17
JP6092427B2 (ja) 2017-03-08
EP2946474A1 (en) 2015-11-25
US20140369152A1 (en) 2014-12-18

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