KR101483534B1 - 구성가능한 포트형 ＰＣＩｅ/ＳＡＴＡ 호스트 제어기 아키텍처를 용이하게 하기 위한 매커니즘 - Google Patents

구성가능한 포트형 ＰＣＩｅ/ＳＡＴＡ 호스트 제어기 아키텍처를 용이하게 하기 위한 매커니즘 Download PDF

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KR101483534B1
KR101483534B1 KR1020137019869A KR20137019869A KR101483534B1 KR 101483534 B1 KR101483534 B1 KR 101483534B1 KR 1020137019869 A KR1020137019869 A KR 1020137019869A KR 20137019869 A KR20137019869 A KR 20137019869A KR 101483534 B1 KR101483534 B1 KR 101483534B1
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sata
pcie
ports
phys
port
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KR20140025333A (ko
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규택 오
콘래드 에이 맥스웰
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실리콘 이미지, 인크.
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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • G06F13/36—Handling requests for interconnection or transfer for access to common bus or bus system
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/38—Information transfer, e.g. on bus
    • G06F13/382—Information transfer, e.g. on bus using universal interface adapter
    • G06F13/385—Information transfer, e.g. on bus using universal interface adapter for adaptation of a particular data processing system to different peripheral devices
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14—Handling requests for interconnection or transfer
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
    • Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Information Transfer Systems (AREA)
  • Bus Control (AREA)
  • Programmable Controllers (AREA)
KR1020137019869A 2010-12-28 2011-12-02 구성가능한 포트형 ＰＣＩｅ/ＳＡＴＡ 호스트 제어기 아키텍처를 용이하게 하기 위한 매커니즘 Expired - Fee Related KR101483534B1 (ko)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/979,995 2010-12-28
US12/979,995 US8874820B2 (en) 2010-12-28 2010-12-28 Mechanism for facilitating a configurable port-type peripheral component interconnect express/serial advanced technology attachment host controller architecture
PCT/US2011/063105 WO2012091852A2 (en) 2010-12-28 2011-12-02 Mechanism for facilitating a configurable port-type peripheral component interconnect express/serial advanced technology attachment host controller architecture

Publications (2)

Publication Number Publication Date
KR20140025333A KR20140025333A (ko) 2014-03-04
KR101483534B1 true KR101483534B1 (ko) 2015-01-16

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KR1020137019869A Expired - Fee Related KR101483534B1 (ko) 2010-12-28 2011-12-02 구성가능한 포트형 ＰＣＩｅ/ＳＡＴＡ 호스트 제어기 아키텍처를 용이하게 하기 위한 매커니즘

Country Status (7)

Country Link
US (1) US8874820B2 (enExample)
EP (1) EP2659380A4 (enExample)
JP (1) JP2014506362A (enExample)
KR (1) KR101483534B1 (enExample)
CN (1) CN103502963A (enExample)
TW (1) TWI507878B (enExample)
WO (1) WO2012091852A2 (enExample)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8601198B2 (en) * 2011-06-30 2013-12-03 Intel Corporation Controllable transaction synchronization for merging peripheral devices
CN202564744U (zh) * 2011-12-28 2012-11-28 钰创科技股份有限公司 高速外设组件互连接口与usb3.0装置之间的桥接器
US10140231B2 (en) * 2012-01-31 2018-11-27 Hewlett-Packard Development Company, L.P. Flexible port configuration based on interface coupling
US8745296B2 (en) * 2012-10-02 2014-06-03 Intel Corporation Serial storage protocol compatible frame conversion, at least in part being compatible with SATA and one packet being compatible with PCIe protocol
US9229836B2 (en) * 2012-11-30 2016-01-05 Intel Corporation Coexisting standard and proprietary connection usage
US9244872B2 (en) * 2012-12-21 2016-01-26 Ati Technologies Ulc Configurable communications controller
US9424224B2 (en) 2013-06-18 2016-08-23 Avago Technologies General Ip (Singapore) Pte. Ltd. PCIe tunneling through SAS
US8943234B1 (en) 2013-08-05 2015-01-27 Lsi Corporation Multi-protocol storage controller
RU2645288C2 (ru) 2013-12-26 2018-02-19 Интел Корпорейшн Усовершенствование интерфейса pci express
US9804989B2 (en) 2014-07-25 2017-10-31 Micron Technology, Inc. Systems, devices, and methods for selective communication through an electrical connector
CN105630124A (zh) * 2014-12-01 2016-06-01 鸿富锦精密工业(武汉)有限公司 电子设备接口切换装置
KR102371557B1 (ko) 2015-03-20 2022-03-07 삼성전자주식회사 호스트 장치, 그것과 복수의 장치들을 갖는 호스트 시스템 및 그것의 인터페이스 링크 레이어 구성 방법
US10642771B2 (en) 2015-05-22 2020-05-05 Hewlett-Packard Development Company, L.P. Data channel allocation
CN106775663B (zh) * 2016-11-30 2020-07-21 中国兵器装备集团自动化研究所 一种sys/bios系统下基于sil3132控制器的sata硬盘驱动方法
US11150842B1 (en) 2020-04-20 2021-10-19 Western Digital Technologies, Inc. Dynamic memory controller and method for use therewith
US11281399B2 (en) 2020-06-24 2022-03-22 Western Digital Technologies, Inc. Dual-interface storage system and method for use therewith
WO2022051607A1 (en) * 2020-09-04 2022-03-10 Nemedio Inc. Systems and methods for dynamic configuration of external devices
US11442665B2 (en) 2020-12-04 2022-09-13 Western Digital Technologies, Inc. Storage system and method for dynamic selection of a host interface

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070226385A1 (en) 2006-03-22 2007-09-27 Chuan Liu Substitute SATA host for communicating with a SATA device

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0756847A (ja) * 1993-08-18 1995-03-03 Toshiba Corp ポータブルコンピュータ
JP3266098B2 (ja) * 1998-04-08 2002-03-18 日本電気株式会社 拡張スロット接続回路
US7664909B2 (en) 2003-04-18 2010-02-16 Nextio, Inc. Method and apparatus for a shared I/O serial ATA controller
US7815469B1 (en) 2004-02-12 2010-10-19 Super Talent Electronics, Inc. Dual-personality extended USB plugs and receptacles using with PCBA and cable assembly
JP2005346123A (ja) * 2004-05-31 2005-12-15 Toshiba Corp パラレルインタフェースコネクタを備えたストレージ装置及び同装置に適用される変換コネクタ
CA2620311A1 (en) 2004-08-27 2006-03-09 Ivan Cardenas Dynamic physical interface between computer module and computer accessory and methods
US7606947B2 (en) 2004-09-07 2009-10-20 Industrial Technology Research Institute Removable electronic device and method thereof
US7174411B1 (en) * 2004-12-02 2007-02-06 Pericom Semiconductor Corp. Dynamic allocation of PCI express lanes using a differential mux to an additional lane to a host
KR20060080632A (ko) 2005-01-05 2006-07-10 엘지전자 주식회사 노트북 컴퓨터의 피씨아이 익스프레스 카드 인터페이스를이용한 세컨드 시리얼 하드디스크 드라이브 구현장치 및방법
US7725627B2 (en) * 2005-12-21 2010-05-25 National Instruments Corporation Serial port that supports multiple protocols
US7496742B2 (en) 2006-02-07 2009-02-24 Dell Products L.P. Method and system of supporting multi-plugging in X8 and X16 PCI express slots
US7788428B2 (en) * 2008-03-27 2010-08-31 Sony Ericsson Mobile Communications Ab Multiplex mobile high-definition link (MHL) and USB 3.0
US8225019B2 (en) * 2008-09-22 2012-07-17 Micron Technology, Inc. SATA mass storage device emulation on a PCIe interface
TW201015286A (en) * 2008-10-02 2010-04-16 Alcor Micro Corp Bridging device with power-saving function
US8095719B2 (en) * 2009-05-07 2012-01-10 Ours Technology Inc. Data communication systems and bridges
TWI408557B (zh) 2010-03-18 2013-09-11 Faraday Tech Corp 高速輸入輸出系統及其節能控制方法

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070226385A1 (en) 2006-03-22 2007-09-27 Chuan Liu Substitute SATA host for communicating with a SATA device

Also Published As

Publication number Publication date
US8874820B2 (en) 2014-10-28
TW201227321A (en) 2012-07-01
TWI507878B (zh) 2015-11-11
EP2659380A4 (en) 2014-05-21
EP2659380A2 (en) 2013-11-06
WO2012091852A3 (en) 2013-01-17
JP2014506362A (ja) 2014-03-13
WO2012091852A2 (en) 2012-07-05
KR20140025333A (ko) 2014-03-04
US20120166701A1 (en) 2012-06-28
CN103502963A (zh) 2014-01-08

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