KR101463078B1 - Schottky barrier diode and fabricating method thereof - Google Patents

Schottky barrier diode and fabricating method thereof Download PDF

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KR101463078B1
KR101463078B1 KR20130135768A KR20130135768A KR101463078B1 KR 101463078 B1 KR101463078 B1 KR 101463078B1 KR 20130135768 A KR20130135768 A KR 20130135768A KR 20130135768 A KR20130135768 A KR 20130135768A KR 101463078 B1 KR101463078 B1 KR 101463078B1
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epitaxial layer
layer
concentration
semiconductor substrate
forming
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KR20130135768A
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Korean (ko)
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오동환
김무열
신상훈
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주식회사 케이이씨
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/32055—Deposition of semiconductive layers, e.g. poly - or amorphous silicon layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66083—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by variation of the electric current supplied or the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. two-terminal devices
    • H01L29/6609—Diodes
    • H01L29/66143—Schottky diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/872—Schottky diodes

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

The present invention relates to a Schottky barrier diode capable of having a low bias voltage characteristic and a high breakdown voltage characteristic by giving a concentration gradient to an epitaxial layer, and a method of manufacturing the Schottky barrier diode.
For example, an N + type semiconductor substrate; An N-type epitaxial layer formed on the semiconductor substrate; A plurality of trenches formed through the epitaxial layer and having a first oxide film formed on a surface thereof; A polysilicon layer formed to fill the interior of the trench; And a Schottky metal layer formed on top of the epitaxial layer, wherein the epitaxial layer has a concentration gradient such that the concentration decreases toward the top.

Description

[0001] The present invention relates to a Schottky barrier diode and a fabricating method thereof,

The present invention relates to a Schottky barrier diode and a method of manufacturing the same.

Schottky barrier diodes are multi-carrier devices using Schottky junctions between silicon and metal, unlike conventional PN diodes, which do not use silicon's PN junctions. These Schottky barrier diodes exhibit fast switching characteristics and have lower turn-on voltage characteristics than PN diodes due to their low energy barrier. Therefore, Schottky barrier diodes are used in many fields such as communication and portable devices, which are advantageous in terms of power loss, and as a result, requiring low power loss. Accordingly, studies have been made to lower the forward voltage in order to reduce the power loss of the Schottky barrier diode according to this trend.

However, the Schottky barrier diode has a trade-off relationship between the forward voltage and the reverse current due to its structural characteristics. Therefore, when the forward voltage is to be reduced, there is a problem that the leakage current due to the reverse current increases. In addition, the Schottky barrier diode has a disadvantage that the reverse voltage is relatively low.

Korean Unexamined Patent Publication No. 2002-0037093 (May 18, 2002)

The present invention provides a Schottky barrier diode capable of having a low forward voltage characteristic and a high breakdown voltage characteristic by giving a concentration gradient to the epitaxial layer and a method of manufacturing the Schottky barrier diode.

A Schottky barrier diode according to the present invention includes: an N + type semiconductor substrate; An N-type epitaxial layer formed on the semiconductor substrate; A plurality of trenches formed through the epitaxial layer and having a first oxide film formed on a surface thereof; A polysilicon layer formed to fill the interior of the trench; And a Schottky metal layer formed on an upper portion of the epitaxial layer, wherein the epitaxial layer has a concentration gradient such that the concentration becomes lower toward the upper portion.

Also, the epitaxial layer is formed on the semiconductor substrate and has a first epitaxial layer having a first concentration; A second epitaxial layer formed on top of the first epitaxial layer, the second epitaxial layer having a second concentration lower than the first concentration; And a third epitaxial layer formed on top of the second epitaxial layer, the third epitaxial layer having a third concentration lower than the second concentration.

In addition, the trench may be formed to penetrate the third epitaxial layer, the second epitaxial layer, and the first epitaxial layer.

A first electrode may be formed on the Schottky metal layer, and a second electrode may be formed on the lower surface of the semiconductor substrate.

In addition, the first oxide layer may be formed to extend to the upper portion of the epitaxial layer, and a second oxide layer may be formed on the first oxide layer, the second oxide layer being thicker than the first oxide layer.

In addition, an electric field can be formed around the trench at a constant size.

In addition, a method of manufacturing a Schottky barrier diode according to the present invention includes: a semiconductor substrate preparation step of preparing an N + type semiconductor substrate; An epitaxial layer forming step of forming an N type epitaxial layer on the semiconductor substrate; A trench forming step of forming a plurality of trenches through the epitaxial layer and forming a first oxide film on a surface of the trench; Forming a polysilicon layer in the trench; And forming a Schottky metal layer on the epitaxial layer, wherein the step of forming the epitaxial layer includes forming an epitaxial layer having a basketball gradient such that the concentration is decreased toward the upper part .

In the epitaxial layer formation step, a first epitaxial layer formed on the semiconductor substrate and having a first concentration; A second epitaxial layer formed on top of the first epitaxial layer, the second epitaxial layer having a second concentration lower than the first concentration; And a third epitaxial layer formed on the second epitaxial layer, the third epitaxial layer having a third concentration lower than the second concentration.

Further, in the trench formation step, the trench may be formed to penetrate the third epitaxial layer, the second epitaxial layer, and the first epitaxial layer.

The method may further include an electrode forming step of forming a first electrode on the Schottky metal layer and forming a second electrode on the lower surface of the semiconductor substrate after the forming of the Schottky metal layer.

The Schottky barrier diode according to an embodiment of the present invention can stably form an electric field around the trench by providing a concentration gradient to the epitaxial layer, thereby suppressing breakage of the corner portion of the trench. Accordingly, the present invention can have low forward voltage characteristics and high breakdown voltage characteristics.

1 is a cross-sectional view illustrating a Schottky barrier diode according to an embodiment of the present invention.
FIGS. 2A and 2B are characteristic graphs for comparing a Schottky barrier diode having a concentration gradient in an epitaxial layer and a Schottky barrier diode having a constant concentration of an epitaxial layer according to the present invention. FIG.
3 is a flowchart illustrating a method of manufacturing a Schottky barrier diode according to an embodiment of the present invention.
4A to 4J are cross-sectional views illustrating a method of manufacturing a Schottky barrier diode according to an embodiment of the present invention.

DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings, so that those skilled in the art can easily carry out the present invention.

1 is a cross-sectional view illustrating a Schottky barrier diode according to an embodiment of the present invention.

1, a Schottky barrier diode 100 according to an embodiment of the present invention includes a semiconductor substrate 110, an epitaxial layer 120, a first oxide layer 130, a polysilicon layer 140, A Schottky metal layer 160, a first electrode 170, and a second electrode 180. The first electrode 170 and the second electrode 180 are formed on the first electrode 170 and the second electrode 180, respectively.

The semiconductor substrate 110 may be a silicon single crystal having an impurity of the first conductivity type as a typical semiconductor wafer. For example, the semiconductor substrate 110 may be a silicon single crystal containing N + type impurities.

The epitaxial layer 120 is formed on the semiconductor substrate 110 to a predetermined thickness and may include an impurity of the first conductivity type. For example, the epitaxial layer 120 may be an epitaxial layer 120 containing an N-type impurity. The epitaxial layer 120 is grown by injecting N-type impurity gas and silicon gas onto the semiconductor substrate 110 at a high temperature. The epitaxial layer 120 includes a first epitaxial layer 121, a second epitaxial layer 122 and a third epitaxial layer 123 formed sequentially from the semiconductor substrate 110. In the drawing, the epitaxial layer 120 is shown to be composed of three epitaxial layers, but more or less than three epitaxial layers can be formed. The first, second and third epitaxial layers 121, 122 and 123 have different concentrations and the concentration decreases from the first epitaxial layer 121 to the third epitaxial layer 123. That is, a first epitaxial layer 121 having a first concentration is formed on the semiconductor substrate 110, and a second epitaxial layer 121 having a second concentration lower than the first concentration is formed on the first epitaxial layer 121, A third epitaxial layer 123 having a third concentration lower than the second concentration is formed on the second epitaxial layer 122. [ Accordingly, the concentration of the epitaxial layer 120 decreases as the distance from the semiconductor substrate 110 increases.

In addition, a plurality of trenches T are formed in the epitaxial layer 120. Specifically, the trench T is formed through the third epitaxial layer 123 to the second epitaxial layer 122 and the first epitaxial layer 121. The trenches T may be spaced apart at regular intervals. In addition, a very thin first oxide film 130 is formed on the surface of the trench T for insulation. Also, the first oxide layer 130 may be formed on the third epitaxial layer 123.

The polysilicon layer 140 is formed to fill the plurality of trenches T formed in the epitaxial layer 120. Thus, the polysilicon layer 140 is formed in a plurality of layers. The polysilicon layer 140 is insulated from the epitaxial layer 120 by the first oxide layer 130. The polysilicon layer 140 reduces the electric field at the Schottky interface at which the Schottky metal layer 160 and the epitaxial layer 120 meet as described below and forms a region between the trench T and the trench T Mesa region) to have a low IR characteristic.

A second oxide layer 150, which is thicker than the first oxide layer 130, is formed on the epitaxial layer 120. Specifically, the second oxide layer 150 is formed on the third epitaxial layer 123. The second oxide layer 150 may be formed only on a part of the third epitaxial layer 123 to expose a part of the polysilicon layer 140 to the outside.

The Schottky metal layer 160 is formed on the polysilicon layer 140 and the third epitaxial layer 123 exposed to the outside by the second oxide film 150. The Schottky metal layer 160 is formed to extend over the third epitaxial layer 123 to connect the plurality of polysilicon layers 140. That is, since the Schottky metal layer 160 is in contact with the N-type epitaxial layer 120, the Schottky barrier diode 100 according to the present invention is formed. The schottky metal layer 160 may be Mo, Ti, Pt, W or Ni, but the present invention is not limited thereto.

The first electrode 170 is formed on the epitaxial layer 120. Specifically, the first electrode 170 is formed on the Schottky metal layer 160 formed on the epitaxial layer 120. Here, the first electrode 170 may be formed of aluminum, but the present invention is not limited thereto. The first electrode 170 serves as an anode of the Schottky barrier diode 100.

The second electrode 180 is formed on the lower surface of the semiconductor substrate 110. The second electrode 180 may be Ti, Ba, Ni, Au, or Ag. However, the present invention is not limited thereto. This second electrode 180 serves as a cathode for the Schottky barrier diode 100.

FIGS. 2A and 2B are characteristic graphs for comparing a Schottky barrier diode having a concentration gradient in an epitaxial layer and a Schottky barrier diode having a constant concentration of an epitaxial layer according to the present invention. FIG.

Referring to FIG. 2A, in the conventional Schottky barrier diode in which the epitaxial layer has no concentration gradient, that is, the concentration of the epitaxial layer is constant, the peak of the electric field is concentrated at the corner of the trench, There is a difficulty in forming a diode. The Schottky barrier diode 100 according to an exemplary embodiment of the present invention may have a gradient of concentration in the epitaxial layer 120 so that an electric field is formed around the trench T, . That is, even if the depth of the trench T is deepened, the size of the electric field is constant, so that breakage of the corner portion of the trench T due to the electric field concentration is suppressed. Accordingly, the Schottky barrier diode 100 according to an embodiment of the present invention has a low forward voltage characteristic. In addition, as shown in FIG. 2B, the Schottky barrier diode 100 according to the present invention can have a high breakdown voltage characteristic so as to withstand a breakdown voltage of 150 to 200V.

Hereinafter, a method of manufacturing a Schottky barrier diode according to an embodiment of the present invention will be described.

3 is a flowchart illustrating a method of manufacturing a Schottky barrier diode according to an embodiment of the present invention. 4A to 4J are cross-sectional views illustrating a method of manufacturing a Schottky barrier diode according to an embodiment of the present invention.

Referring to FIG. 3, a method of manufacturing a Schottky barrier diode according to an exemplary embodiment of the present invention includes a semiconductor substrate preparation step S1, an epitaxial layer formation step S2, a trench formation step S3, (S4), an oxide film formation step (S5), a Schottky metal layer formation step (S6), and an electrode formation step (S7).

The semiconductor substrate preparation step S1 is a step of preparing the semiconductor substrate 110 as a basis of the present invention. Referring to FIG. 4A, in the semiconductor substrate preparation step S1, a silicon single crystal semiconductor substrate 110 containing N + type impurities is prepared.

The epitaxial layer forming step S2 is a step of forming an epitaxial layer 120 on the semiconductor substrate 110. [ In the epitaxial layer forming step S2, a plurality of epitaxial layers 121, 122 and 123 having different concentrations can be formed. The epitaxial layer 120 may be formed by implanting an N-type impurity gas and a silicon gas onto the semiconductor substrate 110 at a high temperature.

First, as shown in FIG. 4B, a first epitaxial layer 121 having a first concentration is formed on the semiconductor substrate 110 in the epitaxial layer forming step S2. Next, a second epitaxial layer 122 having a second concentration lower than the first concentration is formed on the first epitaxial layer 121, as shown in FIG. 4C. Finally, a third epitaxial layer 123 having a third concentration lower than the second concentration is formed on the second epitaxial layer 122, as shown in FIG. 4D. As described above, in the epitaxial layer forming step S2, a plurality of epitaxial layers 121, 122 and 123 are formed on the semiconductor substrate 110 so as to have a lower concentration.

The trench forming step S3 is a step of forming a plurality of trenches T in the epitaxial layer 120. [ The trench T is formed in the third epitaxial layer 123 to penetrate the second epitaxial layer 122 and the first epitaxial layer 121 in the trench forming step S3, . A plurality of the trenches T may be formed, and the trenches T may be spaced apart at regular intervals. After forming the trench T, a very thin first oxide film 130 is formed on the surface of the trench T as shown in FIG. 4F. The first oxide layer 130 is also formed on the third epitaxial layer 123.

The polysilicon layer forming step S4 is a step of forming the polysilicon layer 140 to fill the inside of the trench T. As shown in FIG. 4G, the polysilicon layer 140 is formed in the polysilicon layer formation step S4 to fill the trench T formed in the epitaxial layer 120. The polysilicon layer 140 is insulated from the epitaxial layer 120 by the first insulating layer 130.

The oxide layer forming step S5 is a step of forming a second oxide layer 150 on the epitaxial layer 120. 4H, a second oxide layer 150 is formed on the third epitaxial layer 123 in the oxide layer forming step S5, and the second oxide layer 150 is formed on the polysilicon layer 150. [ The first epitaxial layer 140 and the third epitaxial layer 130 are exposed to the outside.

The Schottky metal layer forming step S6 is a step of forming the Schottky metal layer 160 on the third epitaxial layer 123 exposed to the outside by the second oxide film 150. [ 4I, the Schottky metal layer forming step S6 removes the first oxide layer 130 formed on the third epitaxial layer 123, and then the third epitaxial layer 123 The Schottky metal layer 160 is formed. Accordingly, the Schottky barrier layer 160 is Schottky contact with the third epitaxial layer 123, so that the Schottky barrier diode 100 according to an embodiment of the present invention is formed.

The electrode forming step S7 is a step of forming the first electrode 170 and the second electrode 180 on the upper and lower sides of the semiconductor substrate 110, respectively. The first electrode 170 is formed on the Schottky metal layer 160 formed on the semiconductor substrate 110 in the electrode forming step S7, The second electrode 180 is formed on the lower portion of the first electrode 110. Here, the first electrode 170 may be formed of aluminum and serve as an anode of the Schottky barrier diode 100. The second electrode 180 may be Ti, Ba, Ni, Au, or Ag, and may serve as a cathode of the Schottky barrier diode 110.

It is to be understood that the present invention is not limited to the above-described embodiment, and various modifications may be made without departing from the spirit and scope of the present invention. For example, It will be understood by those of ordinary skill in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention.

100: Schottky barrier diode 110: Semiconductor substrate
120: epitaxial layer 121: first epitaxial layer
122: second epitaxial layer 123: third epitaxial layer
130: first oxide film 140: polysilicon layer
150: second oxide layer 160: Schottky metal layer
170: first electrode 180: second electrode

Claims (10)

An N + type semiconductor substrate;
An N-type epitaxial layer formed on the semiconductor substrate;
A plurality of trenches formed through the epitaxial layer and having a first oxide film formed on a surface thereof;
A polysilicon layer formed to fill the interior of the trench; And
And a Schottky metal layer formed on the epitaxial layer,
Wherein the epitaxial layer has a concentration gradient such that the concentration decreases toward the top. The method according to claim 1,
The epitaxial layer
A first epitaxial layer formed on the semiconductor substrate and having a first concentration;
A second epitaxial layer formed on top of the first epitaxial layer, the second epitaxial layer having a second concentration lower than the first concentration; And
And a third epitaxial layer formed on top of the second epitaxial layer and having a third concentration lower than the second concentration. 3. The method of claim 2,
Wherein the trench is formed to pass through the third epitaxial layer, the second epitaxial layer, and the first epitaxial layer. The method according to claim 1,
A first electrode is formed on the Schottky metal layer,
And a second electrode is further formed under the semiconductor substrate. The method according to claim 1,
Wherein the first oxide layer is formed to extend to an upper portion of the epitaxial layer,
And a second oxide layer is formed on the first oxide layer, the second oxide layer being thicker than the first oxide layer. The method according to claim 1,
Wherein an electric field is formed around the trench at a constant size. A semiconductor substrate preparation step of preparing an N + type semiconductor substrate;
An epitaxial layer forming step of forming an N type epitaxial layer on the semiconductor substrate;
A trench forming step of forming a plurality of trenches through the epitaxial layer and forming a first oxide film on a surface of the trench;
Forming a polysilicon layer in the trench; And
Forming a Schottky metal layer on the epitaxial layer; and forming a Schottky metal layer on the epitaxial layer,
Wherein an epitaxial layer having a basketball gradient is formed such that the concentration is lowered toward the upper part in the epitaxial layer forming step. 8. The method of claim 7,
In the epitaxial layer forming step
A first epitaxial layer formed on the semiconductor substrate and having a first concentration;
A second epitaxial layer formed on top of the first epitaxial layer, the second epitaxial layer having a second concentration lower than the first concentration; And
Wherein a third epitaxial layer is formed on the second epitaxial layer and has a third concentration lower than the second concentration. ≪ RTI ID = 0.0 > 11. < / RTI > 9. The method of claim 8,
Wherein the trench is formed to penetrate the third epitaxial layer, the second epitaxial layer, and the first epitaxial layer in the trench formation step. 8. The method of claim 7,
Forming a first electrode on the Schottky metal layer and forming a second electrode on a lower portion of the semiconductor substrate after the forming of the Schottky metal layer, A method of manufacturing a diode.
KR20130135768A 2013-11-08 2013-11-08 Schottky barrier diode and fabricating method thereof KR101463078B1 (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018194336A1 (en) * 2017-04-17 2018-10-25 한국전기연구원 Silicon-carbide trench schottky barrier diode using polysilicon and method for manufacturing same
CN109713046A (en) * 2018-12-21 2019-05-03 福建安特微电子有限公司 A kind of trench schottky diode and its manufacturing method

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06177365A (en) * 1992-12-01 1994-06-24 Shindengen Electric Mfg Co Ltd Schottky barrier diode
KR100884078B1 (en) * 2001-05-22 2009-02-19 제네럴 세미컨덕터, 인코포레이티드 Schottky rectifier and method of forming the same
JP2012204579A (en) * 2011-03-25 2012-10-22 Toshiba Corp Semiconductor device

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06177365A (en) * 1992-12-01 1994-06-24 Shindengen Electric Mfg Co Ltd Schottky barrier diode
KR100884078B1 (en) * 2001-05-22 2009-02-19 제네럴 세미컨덕터, 인코포레이티드 Schottky rectifier and method of forming the same
JP2012204579A (en) * 2011-03-25 2012-10-22 Toshiba Corp Semiconductor device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018194336A1 (en) * 2017-04-17 2018-10-25 한국전기연구원 Silicon-carbide trench schottky barrier diode using polysilicon and method for manufacturing same
CN109713046A (en) * 2018-12-21 2019-05-03 福建安特微电子有限公司 A kind of trench schottky diode and its manufacturing method

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