KR101414645B1 - Nitride semiconductor light emitting device having vertical topology and method for making the same - Google Patents

Abstract

The present invention relates to a light emitting device, and more particularly, to a vertical nitride semiconductor light emitting device and a method of manufacturing the same. The present invention provides a semiconductor device comprising: a conductive substrate; A first electrode disposed on the conductive substrate; A semiconductor structure disposed on the first electrode, the semiconductor structure including a nitride-based semiconductor, the semiconductor structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer; A non-doped semiconductor layer located on the semiconductor structure; An opening penetrating the undoped semiconductor layer to reach the second conductive semiconductor layer; A second electrode located at the opening and including an insertion portion inserted into and contacting the second conductive semiconductor layer and an extension extending from the peripheral portion side of the insertion portion to an upper side of the undoped semiconductor layer; And a light extracting structure formed on the undoped semiconductor layer.

Description

[0001] The present invention relates to a vertical nitride semiconductor light emitting device and a method of manufacturing the same,

The present invention relates to a light emitting device, and more particularly, to a vertical nitride semiconductor light emitting device and a method of manufacturing the same.

When a voltage is applied, nitride-based light emitting diodes (LEDs), which is one of the semiconductor light emitting devices, emit light of various colors by recombination of electrons and holes in a junction region of p- Which is a semiconductor device.

Such LEDs have a number of advantages such as long lifetime, low power supply, excellent initial driving characteristics, and high vibration resistance as compared with filament-based light emitting devices. Therefore, the demand for LEDs is continuously increasing. Recently, GaN , A blue-based short-wavelength LED has attracted much attention as a white light source.
These gallium nitride LEDs use mostly sapphire or silicon carbide substrates as the starting material during wafer growth. However, large diameter sapphire and silicon carbide substrates are expensive, difficult to work with, and limited in scope.
For this reason, increased production costs and product prices are hampering the expansion of LED lighting in residential and commercial buildings. However, by using the technology to grow gallium nitride on an inexpensive large-scale silicon wafer, it can be applied to the latest semiconductor manufacturing as well as it can be improved by 75% in terms of cost compared with the current method. Therefore, It is getting attention.
However, since the difference in lattice constant and thermal expansion coefficient between silicon and gallium nitride is large, growth quality may be lower than that of conventional sapphire and silicon carbide substrates, and this phenomenon can be maximized as the growth thickness is thicker.
Therefore, there is a need to overcome the constraint on such a growth thickness or effectively cope with the problems such as a decrease in the electrical and optical characteristics that can be caused by such a thin thickness.

SUMMARY OF THE INVENTION It is an object of the present invention to provide a vertical nitride-based semiconductor light-emitting device and a method of manufacturing the same, which can improve uniform light distribution and output through current diffusion induction and easy surface shape control.

According to a first aspect of the present invention, there is provided a semiconductor device comprising: a conductive substrate; A first electrode disposed on the conductive substrate; A semiconductor structure disposed on the first electrode, the semiconductor structure including a nitride-based semiconductor, the semiconductor structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer; A non-doped semiconductor layer located on the semiconductor structure; An opening penetrating the undoped semiconductor layer to reach the second conductive semiconductor layer; A second electrode located at the opening and including an insertion portion inserted into and contacting the second conductive semiconductor layer and an extension extending from the peripheral portion side of the insertion portion to an upper side of the undoped semiconductor layer; And a light extracting structure formed on the undoped semiconductor layer.

According to a second aspect of the present invention, there is provided a method of manufacturing a semiconductor device, comprising: growing a non-doped semiconductor layer on a growth substrate including a silicon semiconductor; Growing a semiconductor structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer on the undoped semiconductor layer using a nitride-based semiconductor; Forming a first electrode on the semiconductor structure; Attaching a conductive substrate on the first electrode; Removing the growth substrate; Forming an insertion hole in a portion of the undoped semiconductor layer; Forming a second electrode on the insertion hole, the second electrode including an insertion portion contacting the semiconductor structure and an extension extending from the peripheral portion side of the insertion portion to an upper side of the undoped semiconductor layer; And forming a light extracting structure by etching the undoped semiconductor layer.

The present invention has the following effects.

First, a vertical type semiconductor light emitting device having a high efficiency and a high yield can be realized in a gallium nitride semiconductor thin film structure on a silicon substrate which has a relatively thin semiconductor layer.

Further, by controlling the shape of the electrode structure, more efficient current injection, current diffusion, and light emission surface shape control can be induced, thereby realizing a light emitting device having a low operating voltage and high light emission performance.

1 is a cross-sectional view showing an example of a vertical light emitting device.
FIGS. 2 to 6 are cross-sectional views showing steps of manufacturing a vertical type light emitting device.
7 is a cross-sectional view showing a state in which the vertical light emitting device is wire-bonded.
8 is a cross-sectional view showing another example of the vertical light emitting device.
9 is a photograph of a part of the vertical light emitting device of FIG.
10 is a cross-sectional view showing still another example of the vertical light emitting device.

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

While the invention is susceptible to various modifications and alternative forms, specific embodiments thereof are shown by way of example in the drawings and will herein be described in detail. Rather, the intention is not to limit the invention to the particular forms disclosed, but rather, the invention includes all modifications, equivalents and substitutions that are consistent with the spirit of the invention as defined by the claims.

It will be appreciated that when an element such as a layer, region or substrate is referred to as being present on another element "on," it may be directly on the other element or there may be an intermediate element in between .

Although the terms first, second, etc. may be used to describe various elements, components, regions, layers and / or regions, such elements, components, regions, layers and / And should not be limited by these terms.

1, a vertical light emitting device according to the present invention includes a first electrode 20 on a conductive substrate 10, a gallium nitride (GaN) semiconductor structure 20 on the first electrode 20, (30).

Doped semiconductor layer 60 is intentionally undoped on the semiconductor structure 30. A second electrode 40 is formed in the opening reaching the semiconductor structure 30 through the undoped semiconductor layer 60, . Also, a light extracting structure 50 formed using the undoped semiconductor layer 60 is provided.

The conductive substrate 10 may be a semiconductor or a metal, and the first electrode 20 may be a p-type electrode and may include a contact electrode and a reflective electrode that contact the semiconductor structure 30. Hereinafter, the first electrode 20 will be described as a p-type electrode and the second electrode 40 will be described as an n-type electrode. Of course, the opposite is possible.

The semiconductor structure 30 includes a p-type semiconductor layer 31 located on the p-type electrode 30, an active layer 32 located on the p-type semiconductor layer 31, And an n < - > -type semiconductor layer 33 located on the n-type semiconductor layer.

At this time, the thickness of the n-type semiconductor layer 33 may be much thicker than that of the p-type semiconductor layer 31.

The undoped semiconductor layer 60 located on the semiconductor structure 30 may be a buffer layer that allows the semiconductor structure 30 to have a high quality and in this undoped semiconductor layer 60 a light extraction structure 50 .

The light extracting structure 50 may be formed by etching the undoped semiconductor layer 60, for example, a wet etching method or a light electrolytic etching method. In the case of using the photoelectrolytic etching method, an etch stop layer (not shown) having a larger energy band gap than the undoped semiconductor layer 60 is disposed between the undoped semiconductor layer 60 and the n- type semiconductor layer 33 You may.

The light extracting structure 50 may include a plurality of unit structures 51. The unit structures 51 may have a hexagonal or quadrangular pyramid shape. At least some of the unit structures 51 may be formed to have different sizes.

The undoped semiconductor layer 60 and the light extracting structure 50 are provided with openings 61 penetrating the undoped semiconductor layer 60 and the light extracting structure 50 to reach the n- type semiconductor layer 33 of the semiconductor structure 30, -Type electrode 40 is positioned.

That is, the n-type electrode 40 has a structure inserted on the undoped semiconductor layer 60 and includes an inserting portion 41 contacting the n-type semiconductor layer 33, Doped semiconductor layer 60. The extension part 42 extends to the upper side of the undoped semiconductor layer 60 at the periphery of the undoped semiconductor layer 41. [

The inserting portion 41 may have a planar shape having a predetermined area so as to be in surface contact with the n-type semiconductor layer 33.

The extended portion 42 may further include a bent portion 43 bent in a direction parallel to the inserting portion 41 from above the undoped semiconductor layer. The bent portion 43 may be bent toward the outside of the light emitting device, and the bent portion 43 contacts the undoped semiconductor layer 60.

This bending portion 43 may allow the n-type electrode 40 to be firmly fixed to the undoped semiconductor layer 60 and may be formed more easily when forming the pad 70 Can be done.

The extending portion 42 may extend upward from the peripheral portion side of the insertion portion 41 and thus the receiving portion 44 may be formed on the insertion portion 41 as shown in FIG. This accommodating portion 44 can provide a space for facilitating the formation of the pad 70 and the bonding of the wire 80.

Hereinafter, a manufacturing process of the vertical light emitting device of the present invention will be described with reference to FIGS. 2 to 6. FIG.

First, as shown in FIG. 2, a non-doped semiconductor layer 60 is formed on a growth substrate 90. At this time, the growth substrate 90 may be a silicon semiconductor substrate.

The undoped semiconductor layer 60 may include a buffer layer that forms growth nuclei on the growth substrate 90.

On this undoped semiconductor layer 60 is grown a semiconductor structure 30 which in turn comprises an n-type semiconductor layer 33, an active layer 32 and a p-type semiconductor layer 31, ) May be grown by a method such as metal organic chemical vapor deposition (MOCVD).

The active layer 32 may have single or multiple quantum wells (MQWs).

On the semiconductor structure 30, a p-type electrode 20 is formed. The p-type electrode 20 may include a contact electrode and a reflective electrode which contact the p-type semiconductor layer 31.

Thereafter, the conductive substrate 10 is attached on the p-type electrode 20 or formed by a method such as plating. The conductive substrate 10 may be a metal or a semiconductor wafer.

Next, the growth substrate 90 is separated using the conductive substrate 10 as a support layer, and the structure is as shown in Fig. 3 when the growth substrate 90 is reversed.

For the separation of the growth substrate 90, a method such as laser lift-off or chemical lift-off may be used.

The total thickness of the remaining semiconductor structure 30 after the growth substrate 90 is separated from the bottom includes the p-type semiconductor layer 31, the active layer 32, and the n-type semiconductor layer 33 from the bottom Doped semiconductor layer 60 so as to have a total thickness of 4 to 10 mu m.

In addition, the undoped semiconductor layer 60 including the buffer layer may be front-etched by plasma dry etching or the like to leave a non-doped semiconductor layer 60 having an appropriate thickness.

Next, as shown in FIG. 4, a portion of the undoped semiconductor layer 60 is exposed to form the n-type electrode 40, and the opening 61 is exposed to expose the n- type semiconductor layer 33 .

The opening 61 may be formed by patterning a region where the opening 61 is to be formed by using a photolithography process or the like and etching it to a certain depth using a dry etching method or a wet etching method to form the n- And an opening 61 is formed to penetrate to a certain depth of the recess 33. The mask material for the etching may be a metal or a photoresist.

At this time, the etching depth for inserting the n-type electrode 40 may be in the range of 100 nm to several 占 퐉, which is a range in which sufficient surface shape control is possible in the surface shaping process for forming the light extracting structure 50 Doped semiconductor layer 60 and a portion of the n-type semiconductor layer 33. The thickness of the n-

Next, as shown in Fig. 5, an n-type electrode 40 is formed on the opening 61 to be in contact with the n-type semiconductor layer 33. Next, as shown in Fig.

The n-type electrode 40 has a structure to be inserted into the opening 61. The n-type electrode 40 has an insertion portion 41 in contact with the n-type semiconductor layer 33, And an extension portion 42 extending to the upper side of the doped semiconductor layer 60.

Therefore, the cross-sectional shape of the n-type electrode 40 may have a "C" shape (or a rectangular shape) or a cup shape.

The formation of the n-type electrode 40 is performed by forming a metal material constituting the n-type electrode 40 in the opening 61 by a method such as E-beam evaporation or sputtering Followed by vapor deposition.

Subsequently, as shown in FIG. 6, a surface shape (light extracting structure) 50 for light emission is formed by etching the undoped semiconductor layer 60 using a wet etching process using a solution of KOH, H ₃ PO _4, or the like do.

If the thickness of the n-type semiconductor layer 33 is not sufficiently thick when the light extracting structure is formed by etching the n-type semiconductor layer 33 without using the undoped semiconductor layer 60, The thickness of the remaining n-type semiconductor layer 33 after the wet etching process for forming the structure must be very thin, which may be disadvantageous in terms of current diffusion, surface shape control, and process yield.

Therefore, the formation of the light extracting structure 50 using the undoped semiconductor layer 60 has a great effect in terms of current diffusion, surface shape control, and process yield. Furthermore, when the silicon semiconductor is used as the growth substrate 90, the thickness of the n-type semiconductor layer 33 is limited, and therefore, it may be more effective.

In order to prevent the n-type electrode 40 from being oxidized or etched during the process of forming the light extracting structure 50, the n-type electrode 40 may be formed of Cr, Pt, Au, Ni, Mo, W, Pd, Ta, Pb, or it is advantageously made of a metal which does not react in the etching solution materials, such as KOH, H ₃ PO _4, such as Cd.

Alternatively, the protective layer for protecting the n-type electrode 40 may be formed in the process of forming the light extracting structure 50, and then the etching process for forming the light extracting structure 50 may be performed.

The gallium nitride based light emitting device (LED, LD) can use a sapphire or silicon carbide substrate as a starting material. However, large diameter sapphire and silicon carbide substrates are expensive, difficult to work with, and limited in scope.

For this reason, increased production costs and product prices are hampering the expansion of LED lighting in residential and commercial buildings. However, using technology to grow gallium nitride on cheap large-size silicon wafers, it is possible to apply manufacturing technology related to silicon semiconductors as well as improve the cost by 75%.

However, since the difference in lattice constant and thermal expansion coefficient between silicon and gallium nitride is large, quality may be lowered compared to gallium nitride grown on sapphire and silicon carbide substrates, and this phenomenon may become larger as the growth thickness increases.

Therefore, the thickness of the gallium nitride semiconductor grown on the silicon semiconductor may be limited. The thin thickness of the gallium nitride semiconductor layer may cause a limited current diffusion and may be a limitation on the surface shape control for improving the light extraction efficiency.

However, as described above, in forming the upper n-type electrode 40, the n-type semiconductor layer 33 is not exposed on the surface but only a part of the region is deeply etched to insert the n- -Type semiconductor layer 33 can be processed by using the undoped semiconductor layer remaining in the region other than the n-type semiconductor layer 33, Diffusion can be achieved.

Accordingly, it is possible not only to realize a light emitting device having a low driving voltage and a high light emission characteristic, but also to improve the reproducibility of the thickness and surface shape control of the n-type semiconductor layer 33 according to the shape- The reliability of the device performance and the process yield can be increased.

That is, the vertical type semiconductor light emitting device composed of the inserted n-type electrode 40 according to the above-described manufacturing method has a high efficiency and high efficiency in a gallium nitride semiconductor thin film structure on a silicon substrate which has a relatively thin semiconductor layer. It is possible to induce more effective current injection, current diffusion, and light emission surface shape control by controlling the shape of the electrode structure to be inserted, as well as realizing a vertical type semiconductor light emitting device having a low operating voltage And is suitable for realizing a light emitting device having high light emitting performance.

7, a pad 70 is located in a housing portion 44 formed by the extended portion 42 of the n-type electrode 40, and a wire 80 is attached to the pad 70 And can be electrically connected by bonding.

8 shows an embodiment in which the extending portion 45 constituting the n-type electrode 40 forms an angle (?) That is not perpendicular to the inserting portion 41.

At this time, it can be seen that the inserting portion 41 is inserted into the depth (d) of the n-type semiconductor layer 33. Considering the electrical characteristics of the light emitting device and the light extracting area, It is advantageous that the ratio of the insertion depth d into which the insulator 41 is inserted and the contact area w where the insulator 41 contacts the n-type semiconductor layer 33 is 1: 1 to 1: 5. It is needless to say that the same applies to the example described in FIG.

In addition, it is advantageous that the angle of the inclined extension 45 forms an angle of 20 DEG to 70 DEG with respect to the contact plane in which the inserting portion 41 is in contact with the n < - >

9 shows a photograph in which the n-type electrode 40 having the structure as shown in Fig. 8 is actually fabricated. 10 shows an example in which the insertion portion and the extension portion 46 form a continuous curved surface. That is, the inserting portion and the extending portion 46 have a continuous curved surface, and the cross-sectional shape may be an elliptical shape.

As described above, the cross-sectional shape of the n-type electrode 40 can be a rectangular shape as shown in FIG. 1, an inverted trapezoid as shown in FIG. 8, and an elliptical structure as shown in FIG. 10 through the shape control of the inserting portion. The current injection and current diffusion efficiency are maximized by controlling the surface area of the n-type electrode 40 and the n-type semiconductor layer 33 in accordance with the cross-sectional shape of the n-type electrode 40 and the etching depth d Thereby improving the operating voltage and the light emission characteristic.

The examples set forth in the foregoing description and drawings are merely illustrative of specific examples for purposes of understanding and are not intended to limit the scope of the invention. It will be apparent to those skilled in the art that other modifications based on the technical idea of the present invention are possible in addition to the examples disclosed herein.

10: conductive substrate 20: p-type electrode
30: semiconductor structure 31: p-type semiconductor layer
32: active layer 33: n- type semiconductor layer
40: n-type electrode 50: light extracting structure
60: undoped semiconductor layer 70: pad
80: wire

Claims (13)

A conductive substrate;
A first electrode disposed on the conductive substrate;
A semiconductor structure disposed on the first electrode, the semiconductor structure including a nitride-based semiconductor, the semiconductor structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer;
A non-doped semiconductor layer located on the semiconductor structure;
An opening penetrating the undoped semiconductor layer to reach the second conductive semiconductor layer;
A semiconductor layer formed on the first conductive semiconductor layer; a second conductive semiconductor layer formed on the first conductive semiconductor layer; a second conductive semiconductor layer formed on the first conductive semiconductor layer; A ratio of a depth of the inserting portion inserted into the second conductive semiconductor layer to a contact area of the second conductive semiconductor layer is 1: 1 to 1: 5;
A pad for wire bonding located in the receiving portion; And
And a light extracting structure formed on the undoped semiconductor layer,
Wherein the second electrode comprises a metal material that does not react with the etching solution for forming the light extracting structure. The vertical nitride based semiconductor light emitting device according to claim 1, wherein the second electrode further comprises a bent portion bent toward an upper surface side of the undoped semiconductor layer at an end of the extended portion. The vertical nitride based semiconductor light emitting device according to claim 1, wherein the extension portion is inclined with respect to the insertion portion. The vertical nitride-based semiconductor light-emitting device according to claim 3, wherein the angle of the inclined extension portion is 20 ° to 70 ° with respect to a contact plane with the second conductive semiconductor layer. The vertical nitride based semiconductor light emitting device according to claim 1, wherein the insertion portion and the extending portion form a continuous curved surface. delete The vertical nitride semiconductor device according to claim 1, wherein the second electrode comprises Cr, Pt, Au, Ni, Mo, W, Pd, Ta, Pb, Cu, Te, Rh, Light emitting element. Growing a non-doped semiconductor layer on a growth substrate comprising a silicon semiconductor;
Growing a semiconductor structure including a first conductive semiconductor layer, an active layer, and a second conductive semiconductor layer on the undoped semiconductor layer using a nitride-based semiconductor;
Forming a first electrode on the semiconductor structure;
Attaching a conductive substrate on the first electrode;
Removing the growth substrate;
Forming an insertion hole in a portion of the undoped semiconductor layer;
And an extension portion extending from the peripheral portion side of the insertion portion to the upper side of the undoped semiconductor layer, wherein the depth of insertion of the insertion portion into the second conductive semiconductor layer, Forming a second electrode such that a ratio of a contact area with a second conductive semiconductor layer is 1: 1 to 1: 5; And
Forming a light extracting structure by etching the undoped semiconductor layer, wherein the second electrode comprises a metal material that is not reactive with the etching solution for forming the light extracting structure. Type nitride semiconductor light emitting device. 9. The method of claim 8, wherein the second electrode further comprises a bent portion bent toward an upper surface of the undoped semiconductor layer at an end of the extended portion. 9. The nitride semiconductor device according to claim 8, wherein the second electrode comprises at least one of Cr, Pt, Au, Ni, Mo, W, Pd, Ta, Pb, Cu, Te, Rh, A method of manufacturing a light emitting device. delete 9. The method of claim 8, wherein a total thickness of the undoped semiconductor layer and the semiconductor structure is 4 to 10 占 퐉. 9. The method of claim 8, wherein the inserting portion and the extending portion form a continuous curved surface.

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