TWI395349B - Light emitting diode chip and fabricating method thereof - Google Patents
Light emitting diode chip and fabricating method thereof Download PDFInfo
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本發明是有關於一種發光二極體晶片及其製造方法,且特別是有關於一種保留一部分成長基板的發光二極體晶片及其製造方法。The present invention relates to a light-emitting diode wafer and a method of fabricating the same, and more particularly to a light-emitting diode wafer that retains a portion of a grown substrate and a method of fabricating the same.
由於發光二極體具有壽命長、體積小、高耐震性、發熱度小以及耗電量低等優點,發光二極體已被廣泛地應用於家電產品以及各式儀器之指示燈或光源。近年來,由於發光二極體朝向多色彩以及高亮度化發展,發光二極體的應用範圍已拓展至大型戶外顯示看板及交通號誌燈等,未來甚至可以取代鎢絲燈和水銀燈以成為兼具省電和環保功能的照明燈源。Because the light-emitting diode has the advantages of long life, small volume, high shock resistance, low heat generation and low power consumption, the light-emitting diode has been widely used in home appliances and indicators or light sources of various instruments. In recent years, due to the development of multi-color and high-brightness of light-emitting diodes, the application range of light-emitting diodes has been extended to large-scale outdoor display billboards and traffic lights, etc. In the future, tungsten filament lamps and mercury lamps can be replaced to become A lighting source with power saving and environmental protection functions.
在習知技術中,可在藍寶石基板(Sapphire Substrate)上形成氮化鎵(GaN)磊晶層以製作發光二極體,此方式可利用半導體製程技術在藍寶石基板上製作出大量的氮化鎵發光二極體。然而,由於此方式所製作的氮化鎵發光二極體是位於藍寶石基板上,因此氮化鎵發光二極體的絕緣與散熱效果仍有改進的空間。針對此問題,一種解決方法是利用雷射剝離(Laser lift-off)製程及晶圓接合(Wafer bonding)製程,使氮化鎵磊晶層與藍寶石基板分離且將氮化鎵磊晶層轉移到一永久基板(Permanent substrate),其詳細過程如下文所述。In the prior art, a gallium nitride (GaN) epitaxial layer can be formed on a sapphire substrate to form a light emitting diode, which can produce a large amount of gallium nitride on a sapphire substrate by using a semiconductor process technology. Light-emitting diode. However, since the gallium nitride light-emitting diode fabricated in this manner is located on the sapphire substrate, there is still room for improvement in the insulation and heat dissipation effect of the gallium nitride light-emitting diode. To solve this problem, a solution is to separate the gallium nitride epitaxial layer from the sapphire substrate and transfer the gallium nitride epitaxial layer to the laser lift-off process and the wafer bonding process. A permanent substrate, the detailed process of which is as follows.
圖1A至圖1D為習知一種發光二極體晶片的製造方法。請參照圖1A,成長基板110上已依序形成有第一型摻雜半導體層112、發光層114以及第二型摻雜半導體層116,將轉移基板120接合至第二型摻雜半導體層116。其中,成長基板110例如是藍寶石基板,第一型摻雜半導體層112、發光層114以及第二型摻雜半導體層116例如是氮化鎵磊晶層。請參照圖1B,然後,藉由雷射剝離製程使第一型摻雜半導體層112與成長基板110分離。請參照圖1C,接著,將永久基板130接合至第一型摻雜半導體層112並移除轉移基板120。請參照圖1D,而後,分別於第一型摻雜半導體層112與第二型摻雜半導體層116上形成第一電極140與第二電極150,以完成發光二極體晶片100的製作。在上述方法中,導電性及導熱性良好的永久基板130成功地替代導電性及導熱性不良的成長基板110(諸如藍寶石基板),因而大幅提升發光二極體晶片100的導電性與散熱性。1A to 1D are a conventional method of fabricating a light emitting diode wafer. Referring to FIG. 1A, a first type doped semiconductor layer 112, a light emitting layer 114, and a second type doped semiconductor layer 116 are sequentially formed on the growth substrate 110, and the transfer substrate 120 is bonded to the second type doped semiconductor layer 116. . The growth substrate 110 is, for example, a sapphire substrate, and the first type doped semiconductor layer 112, the light emitting layer 114, and the second type doped semiconductor layer 116 are, for example, a gallium nitride epitaxial layer. Referring to FIG. 1B, the first type doped semiconductor layer 112 is separated from the growth substrate 110 by a laser lift-off process. Referring to FIG. 1C, next, the permanent substrate 130 is bonded to the first type doped semiconductor layer 112 and the transfer substrate 120 is removed. Referring to FIG. 1D, the first electrode 140 and the second electrode 150 are formed on the first type doped semiconductor layer 112 and the second type doped semiconductor layer 116, respectively, to complete the fabrication of the LED array 100. In the above method, the permanent substrate 130 having good conductivity and thermal conductivity successfully replaces the growth substrate 110 (such as a sapphire substrate) having poor conductivity and thermal conductivity, thereby greatly improving the conductivity and heat dissipation of the LED wafer 100.
然而,由於氮化鎵磊晶層與藍寶石基板之間的晶格常數差異極大,因此當氮化鎵系列材料成長在藍寶石基板上時,會有極大的應力累積在所生成的氮化鎵磊晶層中。如此一來,當氮化鎵磊晶層與藍寶石基板分離時,氮化鎵磊晶層會失去藍寶石基板的支撐,使氮化鎵磊晶層遭受巨大的應力改變,前述的應力改變會造成氮化鎵磊晶層在與基板分離時發生晶格斷裂或差排(dislocation)等晶格缺陷,而導致發光二極體晶片具有較差的良率、抗靜電能力、可靠度。However, since the lattice constant between the gallium nitride epitaxial layer and the sapphire substrate is extremely different, when the gallium nitride series material is grown on the sapphire substrate, there is a great stress accumulation in the generated gallium nitride epitaxial crystal. In the layer. As a result, when the gallium nitride epitaxial layer is separated from the sapphire substrate, the gallium nitride epitaxial layer loses the support of the sapphire substrate, causing a large stress change of the gallium nitride epitaxial layer, and the aforementioned stress change causes nitrogen. The gallium nitride epitaxial layer undergoes lattice defects such as lattice rupture or dislocation when it is separated from the substrate, resulting in poor yield, antistatic capability, and reliability of the luminescent diode chip.
本發明提供一種發光二極體晶片的製造方法,其所製造出的發光二極體晶片具有較佳的良率、抗靜電能力、可靠度、元件特性以及較低的製造成本。The present invention provides a method of fabricating a light-emitting diode wafer, which produces a light-emitting diode wafer having better yield, antistatic capability, reliability, component characteristics, and lower manufacturing cost.
本發明另提供一種發光二極體晶片,其具有較佳的良率、抗靜電能力、可靠度、元件特性以及較低的製造成本。The present invention further provides a light emitting diode wafer having better yield, antistatic capability, reliability, component characteristics, and lower manufacturing cost.
本發明提出一種發光二極體晶片的製造方法。首先,於成長基板上依序形成第一型摻雜半導體層、發光層以及第二型摻雜半導體層。接著,令第二型摻雜半導體層與轉移基板接合,其中成長基板與轉移基板分別位於第二型摻雜半導體層兩側。然後,薄化並圖案化成長基板,以於第一型摻雜半導體層上形成多個突起結構。之後,於第一型摻雜半導體層上形成導電層,以覆蓋突起結構與第一型摻雜半導體層。而後,使轉移基板與第二型摻雜半導體層分離。然後,分別於第一型摻雜半導體層與第二型摻雜半導體層上形成第一電極與第二電極,其中第一電極電性連接第一型摻雜半導體層以及第二電極電性連接第二型摻雜半導體層。The present invention provides a method of fabricating a light emitting diode wafer. First, a first type doped semiconductor layer, a light emitting layer, and a second type doped semiconductor layer are sequentially formed on a growth substrate. Next, the second type doped semiconductor layer is bonded to the transfer substrate, wherein the growth substrate and the transfer substrate are respectively located on both sides of the second type doped semiconductor layer. Then, the growth substrate is thinned and patterned to form a plurality of protrusion structures on the first type doped semiconductor layer. Thereafter, a conductive layer is formed on the first type doped semiconductor layer to cover the protrusion structure and the first type doped semiconductor layer. Then, the transfer substrate is separated from the second type doped semiconductor layer. And forming a first electrode and a second electrode on the first type doped semiconductor layer and the second type doped semiconductor layer, wherein the first electrode is electrically connected to the first type doped semiconductor layer and the second electrode is electrically connected The second type is doped with a semiconductor layer.
在本發明之一實施例中,上述之薄化成長基板的步驟是在接合第二型摻雜半導體層與轉移基板之後進行,且在薄化成長基板後圖案化成長基板。In one embodiment of the present invention, the step of thinning the substrate is performed after bonding the second type doped semiconductor layer and the transfer substrate, and patterning the growth substrate after thinning the substrate.
在本發明之一實施例中,上述之圖案化成長基板的步驟是在接合第二型摻雜半導體層與轉移基板之後進行,且在圖案化成長基板後薄化成長基板。In one embodiment of the present invention, the step of patterning the growth substrate is performed after bonding the second type doped semiconductor layer and the transfer substrate, and thinning the substrate after patterning the growth substrate.
在本發明之一實施例中,上述之圖案化成長基板的步驟是在形成第一型摻雜半導體層之前進行,且薄化成長基板的步驟是在接合第二型摻雜半導體層與轉移基板之後進行。In an embodiment of the invention, the step of patterning the growth substrate is performed before forming the first type doped semiconductor layer, and the step of thinning the growth substrate is to bond the second type doped semiconductor layer and the transfer substrate. After that.
在本發明之一實施例中,上述之轉移基板藉由第一接合層與第二型摻雜半導體層接合。In an embodiment of the invention, the transfer substrate is bonded to the second type doped semiconductor layer by the first bonding layer.
在本發明之一實施例中,藉由移除第一接合層使轉移基板與第二型摻雜半導體層分離。In one embodiment of the invention, the transfer substrate is separated from the second type doped semiconductor layer by removing the first bonding layer.
在本發明之一實施例中,上述之第一電極配置於導電層上以及第二電極配置於第二型摻雜半導體層上。In an embodiment of the invention, the first electrode is disposed on the conductive layer and the second electrode is disposed on the second type doped semiconductor layer.
在本發明之一實施例中,更包括將永久基板接合至導電層,其中永久基板與突起結構分別位於導電層兩側。In an embodiment of the invention, the method further includes bonding the permanent substrate to the conductive layer, wherein the permanent substrate and the protruding structure are respectively located on opposite sides of the conductive layer.
在本發明之一實施例中,上述之永久基板藉由第二接合層與導電層接合。In an embodiment of the invention, the permanent substrate is bonded to the conductive layer by the second bonding layer.
在本發明之一實施例中,上述之第一電極配置於永久基板上以及第二電極配置於第二型摻雜半導體層上。In an embodiment of the invention, the first electrode is disposed on the permanent substrate and the second electrode is disposed on the second type doped semiconductor layer.
在本發明之一實施例中,上述之形成第一電極與第二電極的步驟包括:移除第二型摻雜半導體層與發光層的一部分,以暴露出第一型摻雜半導體層;以及於所暴露的第一型摻雜半導體層上形成第一電極以及於第二型摻雜半導體層上形成第二電極。In an embodiment of the invention, the step of forming the first electrode and the second electrode includes: removing the second type doped semiconductor layer and a portion of the light emitting layer to expose the first type doped semiconductor layer; Forming a first electrode on the exposed first type doped semiconductor layer and forming a second electrode on the second type doped semiconductor layer.
在本發明之一實施例中,上述之形成第一電極與第二電極的步驟在使轉移基板與第二型摻雜半導體層分離之後進行。In an embodiment of the invention, the step of forming the first electrode and the second electrode is performed after separating the transfer substrate from the second type doped semiconductor layer.
在本發明之一實施例中,上述之形成第一電極與第二電極的步驟在接合第二型摻雜半導體層與轉移基板之前進行。In an embodiment of the invention, the step of forming the first electrode and the second electrode is performed before bonding the second type doped semiconductor layer and the transfer substrate.
在本發明之一實施例中,上述之轉移基板藉由第一接合層與第二型摻雜半導體層接合,且第一接合層覆蓋所暴露的第一型摻雜半導體層、發光層、第二型摻雜半導體層、第一電極以及第二電極。In an embodiment of the invention, the transfer substrate is bonded to the second type doped semiconductor layer by the first bonding layer, and the first bonding layer covers the exposed first type doped semiconductor layer, the luminescent layer, and the The doped semiconductor layer, the first electrode, and the second electrode.
在本發明之一實施例中,藉由移除第一接合層使轉移基板與第二型摻雜半導體層分離。In one embodiment of the invention, the transfer substrate is separated from the second type doped semiconductor layer by removing the first bonding layer.
在本發明之一實施例中,上述之第一型摻雜半導體層內配置有絕緣層。In an embodiment of the invention, the first type of doped semiconductor layer is provided with an insulating layer.
在本發明之一實施例中,上述之第一型摻雜半導體層的表面具有多個凹陷,突起結構位於凹陷之間的表面上,以及導電層延伸至凹陷中。In an embodiment of the invention, the surface of the first type doped semiconductor layer has a plurality of recesses, the protrusion structure is located on a surface between the recesses, and the conductive layer extends into the recess.
在本發明之一實施例中,上述之第一型摻雜半導體層的表面具有多個凹陷,突起結構位於凹陷中。In an embodiment of the invention, the surface of the first type doped semiconductor layer has a plurality of recesses, and the protrusion structure is located in the recess.
本發明另提出一種發光二極體晶片,其包括第一型摻雜半導體層、第二型摻雜半導體層、發光層、多個突起結構、導電層、第一電極以及第二電極。發光層位於第一型摻雜半導體層與第二型摻雜半導體層之間。突起結構配置於第一型摻雜半導體層上,其中突起結構的高度介於1μm至100μm之間,且突起結構與發光層位於第一型摻雜半導體層兩側。導電層配置於第一型摻雜半導體層上且覆蓋突起結構。第一電極配置於第一型摻雜半導體層上且與第一型摻雜半導體層電性連接,第二電極配置於第二型摻雜半導體層上且與第二型摻雜半導體層電性連接。The present invention further provides a light emitting diode chip including a first type doped semiconductor layer, a second type doped semiconductor layer, a light emitting layer, a plurality of protruding structures, a conductive layer, a first electrode, and a second electrode. The light emitting layer is between the first type doped semiconductor layer and the second type doped semiconductor layer. The protrusion structure is disposed on the first type doped semiconductor layer, wherein the height of the protrusion structure is between 1 μm and 100 μm, and the protrusion structure and the light emitting layer are located on both sides of the first type doped semiconductor layer. The conductive layer is disposed on the first type doped semiconductor layer and covers the protrusion structure. The first electrode is disposed on the first type doped semiconductor layer and electrically connected to the first type doped semiconductor layer, and the second electrode is disposed on the second type doped semiconductor layer and electrically connected to the second type doped semiconductor layer connection.
在本發明之一實施例中,上述之突起結構的高度小於5μm。In an embodiment of the invention, the height of the protruding structure is less than 5 μm.
在本發明之一實施例中,上述之導電層的厚度大於或等於50μm。In an embodiment of the invention, the conductive layer has a thickness greater than or equal to 50 μm.
在本發明之一實施例中,上述之第一電極配置於導電層上以及第二電極配置於第二型摻雜半導體層上。In an embodiment of the invention, the first electrode is disposed on the conductive layer and the second electrode is disposed on the second type doped semiconductor layer.
在本發明之一實施例中,更包括配置於導電層上的永久基板,其中永久基板與突起結構分別位於導電層兩側。In an embodiment of the invention, the method further includes a permanent substrate disposed on the conductive layer, wherein the permanent substrate and the protruding structure are respectively located on opposite sides of the conductive layer.
在本發明之一實施例中,上述之導電層的厚度小於或等於50μm。In an embodiment of the invention, the conductive layer has a thickness of less than or equal to 50 μm.
在本發明之一實施例中,上述之永久基板與導電層之間更配置有接合層。In an embodiment of the invention, a bonding layer is further disposed between the permanent substrate and the conductive layer.
在本發明之一實施例中,上述之第一電極配置於永久基板上以及第二電極配置於第二型摻雜半導體層上。In an embodiment of the invention, the first electrode is disposed on the permanent substrate and the second electrode is disposed on the second type doped semiconductor layer.
在本發明之一實施例中,上述之一部分的第一型摻雜半導體層暴露於外,且第一電極配置於所暴露的第一型摻雜半導體層上。In an embodiment of the invention, one of the first portions of the doped semiconductor layer is exposed to the outside, and the first electrode is disposed on the exposed first type doped semiconductor layer.
在本發明之一實施例中,更包括絕緣層,絕緣層配置於第一型摻雜半導體層內。In an embodiment of the invention, an insulating layer is further disposed, and the insulating layer is disposed in the first type doped semiconductor layer.
在本發明之一實施例中,上述之第一型摻雜半導體層的表面具有多個凹陷,突起結構位於凹陷之間的表面上,以及導電層延伸至凹陷中。In an embodiment of the invention, the surface of the first type doped semiconductor layer has a plurality of recesses, the protrusion structure is located on a surface between the recesses, and the conductive layer extends into the recess.
在本發明之一實施例中,上述之第一型摻雜半導體層的表面具有多個凹陷,突起結構位於凹陷中。In an embodiment of the invention, the surface of the first type doped semiconductor layer has a plurality of recesses, and the protrusion structure is located in the recess.
基於上述,在本發明之發光二極體晶片的製造方法中,利用對成長基板進行薄化與圖案化來形成突起結構。因此,在發光二極體晶片的製程中無需使用昂貴的雷射剝離機台,且能避免第一型摻雜半導體層因與成長基板分離而發生晶格缺陷等問題。故,以本發明之發光二極體晶片的製造方法所形成的發光二極體晶片具有較佳的良率、抗靜電能力、可靠度、元件特性以及較低的製造成本。Based on the above, in the method of manufacturing a light-emitting diode wafer of the present invention, the protrusion structure is formed by thinning and patterning the grown substrate. Therefore, it is not necessary to use an expensive laser stripping machine in the process of the light emitting diode wafer, and problems such as lattice defects due to separation of the first type doped semiconductor layer from the growth substrate can be avoided. Therefore, the light-emitting diode wafer formed by the method for manufacturing a light-emitting diode wafer of the present invention has better yield, antistatic property, reliability, component characteristics, and lower manufacturing cost.
為讓本發明之上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。The above described features and advantages of the present invention will be more apparent from the following description.
圖2A至圖2H為本發明之第一實施例的一種發光二極體晶片的製造方法的流程剖面圖。2A to 2H are cross-sectional views showing the flow of a method of manufacturing a light-emitting diode wafer according to a first embodiment of the present invention.
請參照圖2A,首先,於成長基板210上依序形成第一型摻雜半導體層212、發光層214以及第二型摻雜半導體層216。在本實施例中,成長基板210例如是藍寶石基板,其厚度例如是大於或等於450μm。發光層214為多重量子井發光層,第一型摻雜半導體層212例如是N型半導體層、第二型摻雜半導體層216例如是P型半導體層,其材料例如是氮化鎵(GaN)。當然,在另一實施例中,第一型摻雜半導體層212也可以是P型半導體層,而第二型摻雜半導體層216為N型半導體層。第一型摻雜半導體層212、發光層214以及第二型摻雜半導體層216的形成方法例如是金屬有機化學氣相沉積(metal organic chemical vapor deposition,MOCVD)法、分子束磊晶(molecular beam epitaxial,MBE)法或是其他適當的磊晶成長法。Referring to FIG. 2A , first, a first type doped semiconductor layer 212 , a light emitting layer 214 , and a second type doped semiconductor layer 216 are sequentially formed on the growth substrate 210 . In the present embodiment, the growth substrate 210 is, for example, a sapphire substrate, and has a thickness of, for example, 450 μm or more. The light-emitting layer 214 is a multiple quantum well light-emitting layer, and the first-type doped semiconductor layer 212 is, for example, an N-type semiconductor layer, and the second-type doped semiconductor layer 216 is, for example, a P-type semiconductor layer, and the material thereof is, for example, gallium nitride (GaN). . Of course, in another embodiment, the first type doped semiconductor layer 212 may also be a P type semiconductor layer, and the second type doped semiconductor layer 216 is an N type semiconductor layer. The forming method of the first type doped semiconductor layer 212, the light emitting layer 214, and the second type doped semiconductor layer 216 is, for example, a metal organic chemical vapor deposition (MOCVD) method or a molecular beam epitaxy (molecular beam). Epitaxial, MBE) or other suitable epitaxial growth method.
請參照圖2B,接著,令第二型摻雜半導體層216與轉移基板220接合,其中成長基板210與轉移基板220分別位於第二型摻雜半導體層216兩側。在本實施例中,轉移基板220例如是藉由第一接合層218與第二型摻雜半導體層216接合。其中,轉移基板220例如是藍寶石基板、碳化矽基板、矽基板、砷化鎵基板、氧化鎵基板、氮化鎵基板、鋁酸鋰基板、鎵酸鋰基板或氮化鋁基板。第一接合層218的材料例如是臘、低熔點金屬或黏著膠。因此,例如是先在第二型摻雜半導體層216上形成第一接合層218,然後再藉由加熱及加壓等方式使轉移基板220與第一接合層218接合。Referring to FIG. 2B , the second type doped semiconductor layer 216 is bonded to the transfer substrate 220 , wherein the growth substrate 210 and the transfer substrate 220 are respectively located on opposite sides of the second type doped semiconductor layer 216 . In the present embodiment, the transfer substrate 220 is bonded to the second type doped semiconductor layer 216 by, for example, the first bonding layer 218. The transfer substrate 220 is, for example, a sapphire substrate, a tantalum carbide substrate, a tantalum substrate, a gallium arsenide substrate, a gallium oxide substrate, a gallium nitride substrate, a lithium aluminate substrate, a lithium gallate substrate, or an aluminum nitride substrate. The material of the first bonding layer 218 is, for example, wax, a low melting point metal or an adhesive. Therefore, for example, the first bonding layer 218 is formed on the second type doped semiconductor layer 216, and then the transfer substrate 220 is bonded to the first bonding layer 218 by heating or pressing.
請參照圖2C,然後,薄化成長基板210,使成長基板210a具有較小的厚度。在本實施例中,在接合第二型摻雜半導體層216與轉移基板220之後,對成長基板210進行薄化,使成長基板210a的厚度小於或等於100μm,且較佳為使成長基板210a的厚度小於或等於5μm。其中,薄化成長基板210的方法例如是研磨製程或蝕刻製程。Referring to FIG. 2C, the substrate 210 is then thinned to have a thickness of the growth substrate 210a. In the present embodiment, after bonding the second-type doped semiconductor layer 216 and the transfer substrate 220, the growth substrate 210 is thinned so that the thickness of the growth substrate 210a is less than or equal to 100 μm, and preferably the growth substrate 210a is grown. The thickness is less than or equal to 5 μm. The method of thinning the growth substrate 210 is, for example, a polishing process or an etching process.
請同時參照圖2D與圖2E,接著,在成長基板210a上形成圖案化的罩幕層222,並以圖案化的罩幕層222為罩幕對成長基板210a進行圖案化,以於第一型摻雜半導體層212上形成多個突起結構224。而後,移除圖案化的罩幕層222。在本實施例中,多個突起結構224例如是以陣列方式排列,且突起結構224例如是柱狀突起結構。圖案化的罩幕層222例如是硬罩幕層,而圖案化成長基板210a的方法包括乾式蝕刻製程或濕式蝕刻製程,其中乾式蝕刻製程可以是感應耦合式電漿(ICP)製程或反應性離子蝕刻(RIE)製程。特別注意的是,在本實施例中,對成長基板210a進行圖案化可能會同時移除一部分的第一型摻雜半導體層212,使第一型摻雜半導體層212的表面具有多個凹陷226,而突起結構224位於凹陷226之間的表面上。當然,在其他實施例中,第一型摻雜半導體層212也有可能具有平坦表面,如圖2E中的虛線所示。Referring to FIG. 2D and FIG. 2E simultaneously, a patterned mask layer 222 is formed on the growth substrate 210a, and the growth substrate 210a is patterned by using the patterned mask layer 222 as a mask to the first type. A plurality of protrusion structures 224 are formed on the doped semiconductor layer 212. The patterned mask layer 222 is then removed. In the present embodiment, the plurality of protrusion structures 224 are, for example, arranged in an array, and the protrusion structure 224 is, for example, a columnar protrusion structure. The patterned mask layer 222 is, for example, a hard mask layer, and the method of patterning the substrate 210a includes a dry etching process or a wet etching process, wherein the dry etching process may be an inductively coupled plasma (ICP) process or a reactive process. Ion etching (RIE) process. It is noted that, in this embodiment, patterning the growth substrate 210a may simultaneously remove a portion of the first type doped semiconductor layer 212 such that the surface of the first type doped semiconductor layer 212 has a plurality of recesses 226. And the protrusion structure 224 is located on the surface between the recesses 226. Of course, in other embodiments, it is also possible for the first type doped semiconductor layer 212 to have a flat surface, as shown by the dashed line in FIG. 2E.
請參照圖2F,之後,於第一型摻雜半導體層212上形成導電層228,以覆蓋突起結構224與第一型摻雜半導體層212。在本實施例中,導電層228的厚度例如是大於或等於50μm,且導電層228延伸至第一型摻雜半導體層212的凹陷226中。導電層的材料例如是金屬、導電氧化物或由上述兩者所結合的多層複合材料,其中金屬可以是鎳、銅、錫、金、鎢、鋁或鉻等材料,導電氧化物可以是氧化銦錫、氧化鋅鋁、氧化鋅鎵、氧化鋅銦等兼具透明與導電特性的金屬氧化物等材料。_其中,金屬的形成方法例如是電鍍法、濺鍍法或蒸鍍法,導電氧化物的形成方法例如是蒸鍍法、濺鍍法、化學沉積法、溶膠凝膠法或塗佈法。Referring to FIG. 2F, a conductive layer 228 is formed on the first type doped semiconductor layer 212 to cover the protrusion structure 224 and the first type doped semiconductor layer 212. In the present embodiment, the thickness of the conductive layer 228 is, for example, greater than or equal to 50 μm, and the conductive layer 228 extends into the recess 226 of the first type doped semiconductor layer 212. The material of the conductive layer is, for example, a metal, a conductive oxide or a multilayer composite composed of the above two, wherein the metal may be a material such as nickel, copper, tin, gold, tungsten, aluminum or chromium, and the conductive oxide may be indium oxide. Materials such as tin, zinc aluminum oxide, zinc gallium oxide, zinc indium oxide, etc., which have both transparent and conductive properties. The method for forming the metal is, for example, a plating method, a sputtering method, or a vapor deposition method, and a method of forming the conductive oxide is, for example, a vapor deposition method, a sputtering method, a chemical deposition method, a sol-gel method, or a coating method.
請同時參照圖2F與圖2G,而後,使轉移基板220與第二型摻雜半導體層216分離。在本實施例中,可以根據第一接合層218的材料特性,藉由加熱或其他方式使第一接合層218與第二型摻雜半導體層216分離,因而使轉移基板220與第二型摻雜半導體層216分離。Referring to FIG. 2F and FIG. 2G simultaneously, the transfer substrate 220 is separated from the second type doped semiconductor layer 216. In this embodiment, the first bonding layer 218 and the second doping semiconductor layer 216 may be separated by heating or other means according to the material properties of the first bonding layer 218, thereby causing the transfer substrate 220 and the second type to be doped. The hetero semiconductor layer 216 is separated.
請參照圖2H,然後,分別於導電層228與第二型摻雜半導體層216上形成第一電極240與第二電極250,以形成發光二極體晶片200。其中,第一電極240電性連接第一型摻雜半導體層212以及第二電極250電性連接第二型摻雜半導體層216。在本實施例中,第一電極240配置於導電層228上以及第二電極250配置於第二型摻雜半導體層216上。再者,在另一實施例中(未繪示),也可以於第二型摻雜半導體層216上先形成透明導電層,再於透明導電層上形成電極250。Referring to FIG. 2H, a first electrode 240 and a second electrode 250 are formed on the conductive layer 228 and the second type doped semiconductor layer 216, respectively, to form a light emitting diode wafer 200. The first electrode 240 is electrically connected to the first type doped semiconductor layer 212 and the second electrode 250 is electrically connected to the second type doped semiconductor layer 216. In this embodiment, the first electrode 240 is disposed on the conductive layer 228 and the second electrode 250 is disposed on the second type doped semiconductor layer 216. Furthermore, in another embodiment (not shown), a transparent conductive layer may be formed on the second type doped semiconductor layer 216, and an electrode 250 may be formed on the transparent conductive layer.
在本實施例之發光二極體晶片200的製造方法中,保留一部分的成長基板210來形成突起結構224,因此不需要對成長基板210進行全面移除。如此一來,在發光二極體晶片200的製程中無需使用昂貴的雷射剝離機台,且能避免第一型摻雜半導體層212因與成長基板210分離而發生晶格缺陷等問題。此外,突起結構224可以降低發光層214所發出的光線在發光二極體晶片200中產生全反射的機會,使發光二極體晶片200的光取出效率(light extraction efficiency)大幅增加。因此,所形成的發光二極體晶片200具有較佳的良率、抗靜電能力、可靠度以及元件特性以及較低的製造成本。In the method of manufacturing the light-emitting diode wafer 200 of the present embodiment, a part of the growth substrate 210 is left to form the protrusion structure 224, so that it is not necessary to completely remove the growth substrate 210. In this way, it is not necessary to use an expensive laser stripping machine in the process of the light-emitting diode wafer 200, and problems such as lattice defects of the first-type doped semiconductor layer 212 due to separation from the growth substrate 210 can be avoided. In addition, the protrusion structure 224 can reduce the chance of total reflection of the light emitted by the light-emitting layer 214 in the light-emitting diode wafer 200, and the light extraction efficiency of the light-emitting diode wafer 200 is greatly increased. Therefore, the formed light-emitting diode wafer 200 has better yield, antistatic ability, reliability, and component characteristics as well as lower manufacturing cost.
圖3A至圖3C為本發明之第二實施例的一種發光二極體晶片的製造方法的部分流程剖面圖。在本實施例中,發光二極體晶片的製造流程與第一實施例中所述的製造流程大致相同,其主要不同處在於本實施例是先對成長基板進行薄化,再對薄化後的成長基板進行圖案化,以下僅針對其差異處進行說明。3A to 3C are partial cross-sectional views showing a method of manufacturing a light-emitting diode wafer according to a second embodiment of the present invention. In this embodiment, the manufacturing process of the LED wafer is substantially the same as the manufacturing process described in the first embodiment, and the main difference is that in this embodiment, the growth substrate is thinned first, and then thinned. The growth substrate is patterned, and only the differences will be described below.
請同時參照圖2B與圖3A,在接合第二型摻雜半導體層216與轉移基板220之後,在成長基板210上形成圖案化的罩幕層222。圖案化的罩幕層222例如是硬罩幕層。Referring to FIG. 2B and FIG. 3A simultaneously, after bonding the second type doped semiconductor layer 216 and the transfer substrate 220, a patterned mask layer 222 is formed on the growth substrate 210. The patterned mask layer 222 is, for example, a hard mask layer.
請參照圖3B,接著,以圖案化的罩幕層222為罩幕對成長基板210進行圖案化,以於第一型摻雜半導體層212上形成多個初始突起結構224’。而後,移除圖案化的罩幕層222。圖案化成長基板210的方法包括乾式蝕刻製程或濕式蝕刻製程,其中乾式蝕刻製程可以是感應耦合式電漿(ICP)製程或反應性離子蝕刻(RIE)製程。Referring to FIG. 3B, the growth substrate 210 is patterned by using the patterned mask layer 222 as a mask to form a plurality of initial protrusion structures 224' on the first type doped semiconductor layer 212. The patterned mask layer 222 is then removed. The method of patterning the growth substrate 210 includes a dry etching process or a wet etching process, wherein the dry etching process may be an inductively coupled plasma (ICP) process or a reactive ion etching (RIE) process.
請同時參照圖3B與圖3C,接著,移除初始突起結構224’的一部分,以形成具有較小高度的突起結構224。在本實施例中,移除部分初始突起結構224’的方法的方法例如是研磨或蝕刻製程,使突起結構224的高度例如是小於或等於100μm,且突起結構224的高度較佳為小於或等於5μm。Referring to Figures 3B and 3C simultaneously, a portion of the initial raised structure 224' is then removed to form a raised structure 224 having a smaller height. In the present embodiment, the method of removing a portion of the initial protrusion structure 224' is, for example, a grinding or etching process such that the height of the protrusion structure 224 is, for example, less than or equal to 100 μm, and the height of the protrusion structure 224 is preferably less than or equal to 5 μm.
接下來的步驟,則如圖2F至圖2H所示,請直接參考第一實施例之圖2F至圖2H的說明,在此不再贅述。換言之,經由上述圖3A至圖3C的步驟,亦可製得發光二極體晶片200。The following steps are shown in FIG. 2F to FIG. 2H. Please refer to the description of FIG. 2F to FIG. 2H of the first embodiment, and details are not described herein again. In other words, the light-emitting diode wafer 200 can also be produced through the steps of FIGS. 3A to 3C described above.
圖4A至圖4D為本發明之第三實施例的一種發光二極體晶片的製造方法的部分流程剖面圖。在本實施例中,發光二極體晶片的製造流程與第一實施例中所述的製造流程大致相同,其主要不同處在於將永久基板接合至導電層,以下進行詳細說明。4A to 4D are partial cross-sectional views showing a method of manufacturing a light-emitting diode wafer according to a third embodiment of the present invention. In the present embodiment, the manufacturing flow of the light-emitting diode wafer is substantially the same as that of the first embodiment, and the main difference is that the permanent substrate is bonded to the conductive layer, which will be described in detail below.
請同時參照圖2E與圖4A,於第一型摻雜半導體層212上形成多個突起結構224後,於第一型摻雜半導體層212上形成導電層228,以覆蓋突起結構224與第一型摻雜半導體層212。在本實施例中,導電層228的厚度例如是介於1μm至50μm之間。也就是說,相較於第一實施例的導電層228具有較大的厚度,本實施例中的導電層228的厚度較小。導電層228的形成方法與材料可以參照第一實施例中所述,於此不贅述。Referring to FIG. 2E and FIG. 4A, after forming a plurality of protrusion structures 224 on the first type doped semiconductor layer 212, a conductive layer 228 is formed on the first type doped semiconductor layer 212 to cover the protrusion structure 224 and the first The doped semiconductor layer 212 is doped. In the present embodiment, the thickness of the conductive layer 228 is, for example, between 1 μm and 50 μm. That is, the conductive layer 228 in the present embodiment has a smaller thickness than the conductive layer 228 of the first embodiment having a larger thickness. For the method and material for forming the conductive layer 228, reference may be made to the first embodiment, and details are not described herein.
請參照圖4B,將永久基板232接合至導電層228,其中永久基板232與突起結構224分別位於導電層228兩側。在本實施例中,永久基板232例如是藉由第二接合層230與導電層228接合。其中,永久基板232例如是碳化矽基板、矽基板、砷化鎵基板、氧化鎵基板、氮化鎵基板、鋁酸鋰基板、鎵酸鋰基板、氮化鋁基板或金屬基板。第二接合層230的材料例如是共金金屬(eutectic metal)、低熔點金屬或導電黏著膠。因此,例如是先在導電層228上形成第二接合層230,然後再藉由加熱等方式使永久基板232與第二接合層230接合。Referring to FIG. 4B, the permanent substrate 232 is bonded to the conductive layer 228, wherein the permanent substrate 232 and the protruding structure 224 are respectively located on both sides of the conductive layer 228. In the present embodiment, the permanent substrate 232 is bonded to the conductive layer 228 by, for example, the second bonding layer 230. The permanent substrate 232 is, for example, a tantalum carbide substrate, a tantalum substrate, a gallium arsenide substrate, a gallium oxide substrate, a gallium nitride substrate, a lithium aluminate substrate, a lithium gallate substrate, an aluminum nitride substrate, or a metal substrate. The material of the second bonding layer 230 is, for example, a eutectic metal, a low melting point metal or a conductive adhesive. Therefore, for example, the second bonding layer 230 is formed on the conductive layer 228, and then the permanent substrate 232 is bonded to the second bonding layer 230 by heating or the like.
請參照圖4C,而後,使轉移基板220與第二型摻雜半導體層216分離。在本實施例中,可以根據第一接合層218的材料特性,藉由加熱或其他方式使第一接合層218與第二型摻雜半導體層216分離,因而使轉移基板220與第二型摻雜半導體層216分離。Referring to FIG. 4C, the transfer substrate 220 is separated from the second type doped semiconductor layer 216. In this embodiment, the first bonding layer 218 and the second doping semiconductor layer 216 may be separated by heating or other means according to the material properties of the first bonding layer 218, thereby causing the transfer substrate 220 and the second type to be doped. The hetero semiconductor layer 216 is separated.
請參照圖4D,然後,分別於永久基板232上以及第二電極250配置於第二型摻雜半導體層216上形成第一電極240與第二電極250,以形成發光二極體晶片200a。其中,第一電極240電性連接第一型摻雜半導體層212以及第二電極250電性連接第二型摻雜半導體層216。Referring to FIG. 4D, the first electrode 240 and the second electrode 250 are formed on the permanent substrate 232 and the second electrode 250 respectively disposed on the second type doped semiconductor layer 216 to form the LED array 200a. The first electrode 240 is electrically connected to the first type doped semiconductor layer 212 and the second electrode 250 is electrically connected to the second type doped semiconductor layer 216.
相較於第一實施例中的發光二極體晶片200,本實施例之發光二極體晶片200a具有厚度較小的導電層228以及與導電層228接合的永久基板232。換言之,根據製程條件與所需產品的不同,可以對發光二極體晶片的結構進行調整,而同樣製作出具有較佳的良率、抗靜電能力、可靠度以及元件特性以及較低的製造成本的發光二極體晶片。The light-emitting diode wafer 200a of the present embodiment has a conductive layer 228 having a smaller thickness and a permanent substrate 232 bonded to the conductive layer 228 than the light-emitting diode wafer 200 in the first embodiment. In other words, depending on the process conditions and the desired product, the structure of the LED wafer can be adjusted, and the same yield, antistatic capability, reliability and component characteristics as well as lower manufacturing cost can be produced. Light-emitting diode chip.
在上述的實施例中,都是以製作垂直式的發光二極體晶片為例,接下來將在第四實施例與第五實施例中介紹製作平面式的發光二極體晶片的製造流程。In the above embodiments, the vertical type of light-emitting diode wafers are exemplified. Next, the manufacturing process of the planar light-emitting diode wafers will be described in the fourth embodiment and the fifth embodiment.
圖5A至圖5C為本發明之第四實施例的一種發光二極體晶片的製造方法的部分流程剖面圖。在本實施例中,發光二極體晶片的前段製程與第一實施例中所述的圖2A至圖2G的製造流程大致相同,其主要不同處在於第一型摻雜半導體層內形成有絕緣層以及將第一電極與第二電極配置在發光二極體晶片的同一側,以下將針對差異處進行詳細說明。5A to 5C are partial cross-sectional views showing a method of manufacturing a light-emitting diode wafer according to a fourth embodiment of the present invention. In the present embodiment, the front-end process of the light-emitting diode wafer is substantially the same as the manufacturing process of FIGS. 2A to 2G described in the first embodiment, and the main difference is that the first-type doped semiconductor layer is formed with insulation. The layer and the first electrode and the second electrode are disposed on the same side of the light-emitting diode wafer, and the differences will be described in detail below.
請參照圖5A,在本實施例中,導電層228上配置有多個突起結構224、第一型摻雜半導體層212、發光層214以及第二型摻雜半導體層216,其中第一型摻雜半導體層212內配置有絕緣層260。絕緣層260的材料例如是氮化鋁、低溫成長之氮化鎵或氮化鋁鎵(AlX Ga1-X N(0.001≦X≦0.999))或摻雜碳、鎂之氮化鎵或氮化鋁鎵(AlX Ga1-X N(0.001≦X≦0.999))。Referring to FIG. 5A, in the embodiment, the conductive layer 228 is disposed with a plurality of protrusion structures 224, a first type doped semiconductor layer 212, a light emitting layer 214, and a second type doped semiconductor layer 216, wherein the first type is doped An insulating layer 260 is disposed in the hetero semiconductor layer 212. The material of the insulating layer 260 is, for example, aluminum nitride, low-growth gallium nitride or aluminum gallium nitride (Al X Ga 1-X N (0.001≦X≦0.999)) or doped carbon or magnesium gallium nitride or nitrogen. Aluminum gallium (Al X Ga 1-X N (0.001≦X≦0.999)).
請參照圖5B,接著,移除第二型摻雜半導體層216、發光層214以及第一型摻雜半導體層212的一部分,以暴露出第一型摻雜半導體層212。移除第二型摻雜半導體層216、發光層214以及第一型摻雜半導體層212的方法例如是乾式蝕刻製程或濕式蝕刻製程。Referring to FIG. 5B, next, the second type doped semiconductor layer 216, the light emitting layer 214, and a portion of the first type doped semiconductor layer 212 are removed to expose the first type doped semiconductor layer 212. The method of removing the second type doped semiconductor layer 216, the light emitting layer 214, and the first type doped semiconductor layer 212 is, for example, a dry etching process or a wet etching process.
請參照圖5C,然後,於所暴露的第一型摻雜半導體層212上形成第一電極240以及於第二型摻雜半導體層216上形成第二電極250,以形成水平式的發光二極體晶片200b。其中,第一電極240電性連接第一型摻雜半導體層212以及第二電極250電性連接第二型摻雜半導體層216。Referring to FIG. 5C, a first electrode 240 is formed on the exposed first type doped semiconductor layer 212 and a second electrode 250 is formed on the second type doped semiconductor layer 216 to form a horizontal light emitting diode. Body wafer 200b. The first electrode 240 is electrically connected to the first type doped semiconductor layer 212 and the second electrode 250 is electrically connected to the second type doped semiconductor layer 216.
由本實施例可知,本發明之發光二極體晶片的製造方法亦適用於水平式的發光二極體晶片,此外,由於在第一型摻雜半導體層212內配置絕緣層260,因此發光二極體晶片200b具有熱電分離的特性,使發光二極體晶片200b具有較佳的散熱能力。換言之,本實施例之發光二極體晶片的製造方法能夠製造出具有較佳的良率、抗靜電能力、可靠度以及元件特性以及較低的製造成本的發光二極體晶片。It can be seen from the present embodiment that the method for manufacturing the light-emitting diode wafer of the present invention is also applicable to a horizontal light-emitting diode wafer, and further, since the insulating layer 260 is disposed in the first-type doped semiconductor layer 212, the light-emitting diode is The bulk wafer 200b has thermoelectric separation characteristics, so that the light-emitting diode wafer 200b has better heat dissipation capability. In other words, the method of manufacturing the light-emitting diode wafer of the present embodiment can produce a light-emitting diode wafer having better yield, antistatic ability, reliability, and element characteristics as well as lower manufacturing cost.
在本實施例中,形成第一電極240與第二電極250的步驟是在使轉移基板220與第二型摻雜半導體層216分離之後進行。換言之,在使轉移基板220與第二型摻雜半導體層216分離之後,才暴露出第一型摻雜半導體層212。然而,形成第一電極240與第二電極250的步驟也可以在接合第二型摻雜半導體層216與轉移基板220之前進行,請參照第五實施例。In the present embodiment, the step of forming the first electrode 240 and the second electrode 250 is performed after separating the transfer substrate 220 from the second type doped semiconductor layer 216. In other words, the first type doped semiconductor layer 212 is exposed after the transfer substrate 220 is separated from the second type doped semiconductor layer 216. However, the step of forming the first electrode 240 and the second electrode 250 may also be performed before bonding the second type doped semiconductor layer 216 and the transfer substrate 220, please refer to the fifth embodiment.
圖6A至圖6E為本發明之第五實施例的一種發光二極體晶片的製造方法的流程剖面圖。6A to 6E are cross-sectional views showing the flow of a method of manufacturing a light-emitting diode wafer according to a fifth embodiment of the present invention.
請參照圖6A,首先,於成長基板210上依序形成第一型摻雜半導體層212、發光層214以及第二型摻雜半導體層216,其中第一型摻雜半導體層212內配置有絕緣層260。第一型摻雜半導體層212、發光層214以及第二型摻雜半導體層216以及絕緣層260的材料可以參照前文所述,於此不贅述。Referring to FIG. 6A, first, a first type doped semiconductor layer 212, a light emitting layer 214, and a second type doped semiconductor layer 216 are sequentially formed on the growth substrate 210, wherein the first type doped semiconductor layer 212 is provided with insulation. Layer 260. The materials of the first type doped semiconductor layer 212, the light emitting layer 214, the second type doped semiconductor layer 216, and the insulating layer 260 can be referred to the foregoing, and will not be described herein.
請參照圖6B,接著,移除第二型摻雜半導體層216、發光層214以及第一型摻雜半導體層212的一部分,以暴露出第一型摻雜半導體層212。移除第二型摻雜半導體層216、發光層214以及第一型摻雜半導體層212的方法例如是乾式蝕刻製程或濕式蝕刻製程。Referring to FIG. 6B, next, the second type doped semiconductor layer 216, the light emitting layer 214, and a portion of the first type doped semiconductor layer 212 are removed to expose the first type doped semiconductor layer 212. The method of removing the second type doped semiconductor layer 216, the light emitting layer 214, and the first type doped semiconductor layer 212 is, for example, a dry etching process or a wet etching process.
然後,於所暴露的第一型摻雜半導體層上形成電流分散層270與第一電極240以及於第二型摻雜半導體層上形成第二電極250。電流分散層270的材料例如是銦錫氧化物、銦鋅氧化物、銦錫鋅氧化物、氧化鉿、氧化鋅、氧化鋁、鋁錫氧化物、鋁鋅氧化物、鎘錫氧化物、鎘鋅氧化物、或其它適當之材料。Then, a current dispersion layer 270 is formed on the exposed first type doped semiconductor layer and the first electrode 240 is formed on the first type doped semiconductor layer, and a second electrode 250 is formed on the second type doped semiconductor layer. The material of the current dispersion layer 270 is, for example, indium tin oxide, indium zinc oxide, indium tin zinc oxide, antimony oxide, zinc oxide, aluminum oxide, aluminum tin oxide, aluminum zinc oxide, cadmium tin oxide, cadmium zinc. Oxide, or other suitable material.
請參照圖6C,而後,於成長基板210上形成第一接合層218,以覆蓋所暴露的第一型摻雜半導體層212、發光層214、第二型摻雜半導體層216、第一電極240以及第二電極250。接著,令轉移基板220藉由第一接合層218與第二型摻雜半導體層216接合。第一接合層218與轉移基板220的材料可以參照第一實施例中所述,於此不贅述。Referring to FIG. 6C , a first bonding layer 218 is formed on the growth substrate 210 to cover the exposed first-type doped semiconductor layer 212 , the light-emitting layer 214 , the second-type doped semiconductor layer 216 , and the first electrode 240 . And a second electrode 250. Next, the transfer substrate 220 is bonded to the second type doped semiconductor layer 216 by the first bonding layer 218. The material of the first bonding layer 218 and the transfer substrate 220 can be referred to in the first embodiment, and details are not described herein.
請參照圖6D,繼之,薄化並圖案化成長基板210,以於第一型摻雜半導體層212上形成多個突起結構224。薄化與圖案化成長基板210的方法可以參照第一實施例中所述,於此不贅述。Referring to FIG. 6D, the growth substrate 210 is thinned and patterned to form a plurality of protrusion structures 224 on the first type doped semiconductor layer 212. The method of thinning and patterning the growth substrate 210 can be referred to the description in the first embodiment, and details are not described herein.
之後,於第一型摻雜半導體層212上形成導電層228,以覆蓋突起結構224與第一型摻雜半導體層212。其中,導電層228的厚度例如是大於或等於50μm。Thereafter, a conductive layer 228 is formed on the first type doped semiconductor layer 212 to cover the protrusion structure 224 and the first type doped semiconductor layer 212. The thickness of the conductive layer 228 is, for example, greater than or equal to 50 μm.
請參照圖6E,而後,移除第一接合層218,使轉移基板220與第二型摻雜半導體層216分離,以形成發光二極體晶片200c。移除第一接合層218的方法可以參照第一實施例中所述,於此不贅述。Referring to FIG. 6E, the first bonding layer 218 is removed to separate the transfer substrate 220 from the second type doped semiconductor layer 216 to form the LED array 200c. The method of removing the first bonding layer 218 can be referred to the description in the first embodiment, and details are not described herein.
特別一提的是,如圖7所示,在另一實施例中,當導電層228的厚度較小(例如介於5μm至50μm之間)時,可以藉由第二接合層230將永久基板232接合至導電層228,以形成發光二極體晶片200d。其中,藉由第二接合層230接合永久基板232與導電層228的方法可以參照第三實施例中所述,於此不贅述。In particular, as shown in FIG. 7, in another embodiment, when the thickness of the conductive layer 228 is small (for example, between 5 μm and 50 μm), the permanent substrate can be used by the second bonding layer 230. 232 is bonded to the conductive layer 228 to form the light emitting diode wafer 200d. The method of bonding the permanent substrate 232 and the conductive layer 228 by the second bonding layer 230 can be referred to in the third embodiment, and details are not described herein.
在發光二極體晶片200c、200d中,由成長基板210所形成的突起結構224能夠提升發光二極體晶片200的光取出效率,而絕緣層260使發光二極體晶片200具有熱電分離特性。因此,由上述方法所形成的發光二極體晶片具有較佳的良率、抗靜電能力、可靠度以及元件特性以及較低的製造成本。In the light-emitting diode wafers 200c and 200d, the protrusion structure 224 formed by the growth substrate 210 can improve the light extraction efficiency of the light-emitting diode wafer 200, and the insulating layer 260 has the light-emitting diode structure 200 having thermoelectric separation characteristics. Therefore, the light-emitting diode wafer formed by the above method has better yield, antistatic ability, reliability, and element characteristics as well as lower manufacturing cost.
在上述的實施例中,都是以在接合第二型摻雜半導體層與轉移基板之後,對成長基板進行薄化與圖案化為例,但在本實施例中,將介紹在形成第一型摻雜半導體層之前就對成長基板進行圖案化的製程。In the above embodiments, the thinning and patterning of the grown substrate after bonding the second type doped semiconductor layer and the transfer substrate are exemplified, but in the present embodiment, the first type will be described. A process of patterning a grown substrate before doping the semiconductor layer.
圖8A至圖8F為本發明之第六實施例的一種發光二極體晶片的製造方法的流程剖面圖。8A to 8F are cross-sectional views showing the flow of a method of manufacturing a light-emitting diode wafer according to a sixth embodiment of the present invention.
請參照圖8A,首先,對成長基板210進行圖案化,以於成長基板210的表面形成多個凹陷211。其中,凹陷211的深度例如是小於或等於5μm。圖案化成長基板210的方法包括乾式蝕刻製程或濕式蝕刻製程,其中乾式蝕刻製程可以是感應耦合式電漿(ICP)製程或反應性離子蝕刻(RIE)製程。Referring to FIG. 8A , first, the growth substrate 210 is patterned to form a plurality of recesses 211 on the surface of the growth substrate 210 . The depth of the recess 211 is, for example, less than or equal to 5 μm. The method of patterning the growth substrate 210 includes a dry etching process or a wet etching process, wherein the dry etching process may be an inductively coupled plasma (ICP) process or a reactive ion etching (RIE) process.
請參照圖8B,接著,於成長基板210上依序形成第一型摻雜半導體層212、發光層214以及第二型摻雜半導體層216。在本實施例中,第一型摻雜半導體層212例如是未填滿成長基板210的表面凹陷211,因此存在有多個孔洞282。特別一提的是,在本實施例中,以均勻點表示第一型摻雜半導體層212僅是為了使讀者能清楚地區分第一型摻雜半導體層212與其他材料層,而並非用以限定第一型摻雜半導體層212的材料,也就是說此處的第一型摻雜半導體層212與前文所述的第一型摻雜半導體層212在材料上與形成方法上並無顯著差異。Referring to FIG. 8B , a first type doped semiconductor layer 212 , a light emitting layer 214 , and a second type doped semiconductor layer 216 are sequentially formed on the growth substrate 210 . In the present embodiment, the first type doped semiconductor layer 212 is, for example, a surface recess 211 that is not filled with the growth substrate 210, and thus a plurality of holes 282 are present. In particular, in the present embodiment, the first type doped semiconductor layer 212 is represented by a uniform point only for the reader to clearly distinguish the first type doped semiconductor layer 212 from other material layers, and is not used. The material defining the first type doped semiconductor layer 212, that is, the first type doped semiconductor layer 212 herein is not significantly different in material and formation method from the first type doped semiconductor layer 212 described above. .
請參照圖8C,然後,例如是藉由第一接合層218使第二型摻雜半導體層216與轉移基板220接合,使成長基板210與轉移基板220分別位於第二型摻雜半導體層216兩側。Referring to FIG. 8C, the second type doped semiconductor layer 216 is bonded to the transfer substrate 220 by the first bonding layer 218, for example, the growth substrate 210 and the transfer substrate 220 are respectively located on the second type doped semiconductor layer 216. side.
請參照圖8D,而後,薄化成長基板210,以於第一型摻雜半導體層212上形成多個突起結構224。在本實施例中,例如是以研磨製程來薄化成長基板210,且以暴露出孔洞282為研磨終點來進行薄化製程,因此在第一型摻雜半導體層212的表面上形成多個凹陷226。換言之,以結構來看,第一型摻雜半導體層212的表面具有多個凹陷226,而突起結構224位於凹陷226之間的表面上。其中,突起結構224的高度例如是小於或等於5μm。Referring to FIG. 8D, the substrate 210 is thinned to form a plurality of protrusion structures 224 on the first type doped semiconductor layer 212. In the present embodiment, for example, the growth substrate 210 is thinned by a polishing process, and the thinning process is performed by exposing the holes 282 as a polishing end point, thereby forming a plurality of depressions on the surface of the first type doped semiconductor layer 212. 226. In other words, in terms of structure, the surface of the first type doped semiconductor layer 212 has a plurality of recesses 226, and the protrusion structures 224 are located on the surface between the recesses 226. The height of the protrusion structure 224 is, for example, less than or equal to 5 μm.
請參照圖8E,之後,於第一型摻雜半導體層212上形成導電層228,以覆蓋突起結構224與第一型摻雜半導體層212。其中,導電層228延伸至凹陷226中。Referring to FIG. 8E, a conductive layer 228 is formed on the first type doped semiconductor layer 212 to cover the protrusion structure 224 and the first type doped semiconductor layer 212. Wherein, the conductive layer 228 extends into the recess 226.
請參照圖8F,而後,例如是藉由移除第一接合層218使轉移基板220與第二型摻雜半導體層216分離。Referring to FIG. 8F, the transfer substrate 220 is separated from the second type doped semiconductor layer 216 by, for example, removing the first bonding layer 218.
然後,分別於第一型摻雜半導體層212與第二型摻雜半導體層216上形成第一電極240與第二電極250,以形成發光二極體晶片200e。特別一提的是,如圖9所示,在另一實施例中,當導電層228的厚度較小(例如介於1μm至50μm之間)時,可以藉由第二接合層230使永久基板232與導電層228接合,而後分別在永久基板232以及第二型摻雜半導體層216上形成第一電極240與第二電極250,以形成發光二極體晶片200f。其中,藉由第二接合層230接合永久基板232與導電層228的方法可以參照第三實施例中所述,於此不贅述。Then, the first electrode 240 and the second electrode 250 are formed on the first type doped semiconductor layer 212 and the second type doped semiconductor layer 216, respectively, to form the light emitting diode wafer 200e. In particular, as shown in FIG. 9, in another embodiment, when the thickness of the conductive layer 228 is small (for example, between 1 μm and 50 μm), the permanent substrate can be made by the second bonding layer 230. 232 is bonded to the conductive layer 228, and then the first electrode 240 and the second electrode 250 are formed on the permanent substrate 232 and the second type doped semiconductor layer 216, respectively, to form the light emitting diode wafer 200f. The method of bonding the permanent substrate 232 and the conductive layer 228 by the second bonding layer 230 can be referred to in the third embodiment, and details are not described herein.
在上述的實施例中,先對成長基板210進行圖案化,而後藉由薄化成長基板210的步驟同時形成突起結構224並去除形成第一型摻雜半導體層212時所造成的孔洞282。如此一來,不但可以提升發光二極體晶片的發光效率,且能避免孔洞282影響發光二極體晶片200e、200f的可靠度,因此發光二極體晶片200d、200e具有較佳的良率、抗靜電能力、可靠度以及元件特性。In the above embodiment, the growth substrate 210 is first patterned, and then the protrusion structure 224 is simultaneously formed by thinning the substrate 210 and the holes 282 formed when the first type doped semiconductor layer 212 is formed are removed. In this way, not only the luminous efficiency of the LED wafer can be improved, but also the reliability of the LED 252 is affected by the hole 282, so that the LED chips 200d and 200e have better yield. Antistatic ability, reliability and component characteristics.
圖10A至圖10E為本發明之第七實施例的一種發光二極體晶片的製造方法的流程剖面圖。本實施例之發光二極體晶片的製造方法與第六實施例中所述的製程的主要差異在於形成於成長基板210上的第一型摻雜半導體層212填滿成長基板210的表面凹陷211,以下將針對此狀況進行說明。10A to 10E are cross-sectional views showing the flow of a method of manufacturing a light-emitting diode wafer according to a seventh embodiment of the present invention. The main difference between the manufacturing method of the light-emitting diode wafer of the present embodiment and the process described in the sixth embodiment is that the first type doped semiconductor layer 212 formed on the growth substrate 210 fills the surface recess 211 of the growth substrate 210. The following will explain this situation.
請參照圖10A,首先,於圖案化的成長基板210上依序形成第一型摻雜半導體層212、發光層214以及第二型摻雜半導體層216,且第一型摻雜半導體層212填滿成長基板210的表面凹陷211。在本實施例中,凹陷211的深度例如是小於或等於5μm。特別一提的是,在本實施例中,以斜線表示第一型摻雜半導體層212僅是為了使讀者能清楚地區分第一型摻雜半導體層212與其他材料層,而並非用以限定第一型摻雜半導體層212的材料,也就是說此處的第一型摻雜半導體層212與前文所述的第一型摻雜半導體層212在材料上與形成方法上並無顯著差異。Referring to FIG. 10A, first, a first type doped semiconductor layer 212, a light emitting layer 214, and a second type doped semiconductor layer 216 are sequentially formed on the patterned growth substrate 210, and the first type doped semiconductor layer 212 is filled. The surface of the substrate 210 is fully recessed 211. In the present embodiment, the depth of the recess 211 is, for example, less than or equal to 5 μm. In particular, in the present embodiment, the first type doped semiconductor layer 212 is indicated by oblique lines only for the reader to clearly distinguish the first type doped semiconductor layer 212 from other material layers, and is not intended to be limited. The material of the first type doped semiconductor layer 212, that is, the first type doped semiconductor layer 212 herein is not significantly different in material and formation method from the first type doped semiconductor layer 212 described above.
請參照圖10B,然後,例如是藉由第一接合層218使第二型摻雜半導體層216與轉移基板220接合,其中成長基板210與轉移基板220分別位於第二型摻雜半導體層216兩側。Referring to FIG. 10B, the second type doped semiconductor layer 216 is bonded to the transfer substrate 220, for example, by the first bonding layer 218, wherein the growth substrate 210 and the transfer substrate 220 are respectively located in the second type doped semiconductor layer 216. side.
請參照圖10C,接著,薄化成長基板210,以於第一型摻雜半導體層212上形成多個突起結構224。在本實施例中,例如是以研磨製程來薄化成長基板210,且以暴露出填滿凹陷211的第一型摻雜半導體層212為研磨終點。以結構來看,在本實施例中,第一型摻雜半導體層212的表面具有多個凹陷227,突起結構224位於凹陷227中且填滿凹陷227。Referring to FIG. 10C, the substrate 210 is thinned to form a plurality of protrusion structures 224 on the first type doped semiconductor layer 212. In the present embodiment, for example, the growth substrate 210 is thinned by a polishing process, and the first type doped semiconductor layer 212 that fills the recess 211 is exposed as a polishing end point. In terms of structure, in the present embodiment, the surface of the first type doped semiconductor layer 212 has a plurality of recesses 227, and the protrusion structures 224 are located in the recesses 227 and fill the recesses 227.
請參照圖10D,然後,於第一型摻雜半導體層212上形成導電層228,以覆蓋突起結構224與第一型摻雜半導體層212。Referring to FIG. 10D, a conductive layer 228 is then formed on the first type doped semiconductor layer 212 to cover the protrusion structure 224 and the first type doped semiconductor layer 212.
請參照圖10E,而後,使轉移基板220與第二型摻雜半導體層216分離。Referring to FIG. 10E, the transfer substrate 220 is separated from the second type doped semiconductor layer 216.
然後,分別於第一型摻雜半導體層212與第二型摻雜半導體層216上形成第一電極240與第二電極250,以形成發光二極體晶片200g。特別一提的是,如圖11所示,在另一實施例中,當導電層228的厚度較小(例如介於1μm至50μm之間)時,可以藉由第二接合層230將永久基板232接合至導電層228,而後分別在永久基板232以及第二型摻雜半導體層216上形成第一電極240與第二電極250,以形成發光二極體晶片200h。其中,藉由第二接合層230接合永久基板232與導電層228的方法可以參照第三實施例中所述,於此不贅述。Then, the first electrode 240 and the second electrode 250 are formed on the first type doped semiconductor layer 212 and the second type doped semiconductor layer 216, respectively, to form the light emitting diode wafer 200g. In particular, as shown in FIG. 11, in another embodiment, when the thickness of the conductive layer 228 is small (for example, between 1 μm and 50 μm), the permanent substrate can be used by the second bonding layer 230. 232 is bonded to the conductive layer 228, and then the first electrode 240 and the second electrode 250 are formed on the permanent substrate 232 and the second type doped semiconductor layer 216, respectively, to form the light emitting diode wafer 200h. The method of bonding the permanent substrate 232 and the conductive layer 228 by the second bonding layer 230 can be referred to in the third embodiment, and details are not described herein.
在本實施例中,在形成第一型摻雜半導體層212之前對成長基板210進行圖案化,且在第一型摻雜半導體層212填滿成長基板210的表面凹陷211之後再對成長基板210進行薄化,以形成位於第一型摻雜半導體層212的表面凹陷227中且填滿凹陷227的突起結構224。換句話說,根據製程條件與所需產品的不同,可以選擇成長基板進行薄化與圖案化步驟的時機,而調整發光二極體晶片的結構,以製作出具有較佳的良率、抗靜電能力、可靠度以及元件特性以及較低的製造成本的發光二極體晶片。In the present embodiment, the growth substrate 210 is patterned before the first type doped semiconductor layer 212 is formed, and the growth substrate 210 is grown after the first type doped semiconductor layer 212 fills the surface recess 211 of the growth substrate 210. Thinning is performed to form a protrusion structure 224 that is located in the surface recess 227 of the first type doped semiconductor layer 212 and fills the recess 227. In other words, depending on the process conditions and the desired product, the timing of thinning and patterning the substrate can be selected, and the structure of the LED wafer can be adjusted to produce a better yield and antistatic. Light-emitting diode wafers with capability, reliability, and component characteristics, as well as lower manufacturing costs.
再者,在第六實施例與第七實施例中都是以製作垂直式的發光二極體晶片為例,但所屬技術領域中具有通常知識者應了解第六實施例與第七實施例所述的流程也可以應用於製作水平式的發光二極體晶片。Furthermore, in the sixth embodiment and the seventh embodiment, a vertical light-emitting diode chip is taken as an example, but those skilled in the art should understand the sixth embodiment and the seventh embodiment. The described process can also be applied to the fabrication of horizontal light-emitting diode wafers.
綜上所述,在本發明之發光二極體晶片的製造方法中,利用對成長基板進行薄化與圖案化來形成突起結構,因而不需要對成長基板進行全面移除。如此一來,無需使用昂貴的雷射剝離機台來剝離成長基板,且能避免第一型摻雜半導體層因與成長基板分離而發生晶格缺陷等問題。此外,位於第一型摻雜半導體層與導電層之間的突起結構可以降低發光層所發出的光線在發光二極體晶片中產生全反射的機會,使得發光二極體晶片的光取出效率大幅增加。因此,以本發明之發光二極體晶片的製造方法所形成的發光二極體晶片具有較佳的良率、抗靜電能力、可靠度、元件特性以及較低的製造成本。As described above, in the method of manufacturing a light-emitting diode wafer of the present invention, the growth structure is thinned and patterned to form a protrusion structure, so that it is not necessary to completely remove the growth substrate. In this way, it is not necessary to use an expensive laser stripping machine to peel off the grown substrate, and problems such as lattice defects occurring in the first type doped semiconductor layer due to separation from the grown substrate can be avoided. In addition, the protruding structure between the first type doped semiconductor layer and the conductive layer can reduce the chance of the light emitted by the light emitting layer generating total reflection in the light emitting diode wafer, so that the light extraction efficiency of the light emitting diode chip is greatly improved. increase. Therefore, the light-emitting diode wafer formed by the method for fabricating the light-emitting diode wafer of the present invention has better yield, antistatic property, reliability, component characteristics, and lower manufacturing cost.
雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,故本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.
100、200、200a、200b、200c、200d、200e、200f、200g、200h...發光二極體晶片100, 200, 200a, 200b, 200c, 200d, 200e, 200f, 200g, 200h. . . Light-emitting diode chip
110、210、210a...成長基板110, 210, 210a. . . Growth substrate
112、212...第一型摻雜半導體層112, 212. . . First type doped semiconductor layer
114、214...發光層114,214. . . Luminous layer
116、216...第二型摻雜半導體層116,216. . . Second type doped semiconductor layer
120、220...轉移基板120, 220. . . Transfer substrate
130、232...永久基板130, 232. . . Permanent substrate
140、240...第一電極140, 240. . . First electrode
150、250...第二電極150, 250. . . Second electrode
218、230...接合層218, 230. . . Bonding layer
222...圖案化的罩幕層222. . . Patterned mask layer
224...突起結構224. . . Protrusion structure
224’...初始突起結構224’. . . Initial protrusion structure
211、226、227...凹陷211, 226, 227. . . Depression
228...導電層228. . . Conductive layer
260...絕緣層260. . . Insulation
270...電流分散層270. . . Current dispersion layer
282...孔洞282. . . Hole
圖1A至圖1D為習知一種發光二極體晶片的製造方法。1A to 1D are a conventional method of fabricating a light emitting diode wafer.
圖2A至圖2H為本發明之第一實施例的一種發光二極體晶片的製造方法的流程剖面圖。2A to 2H are cross-sectional views showing the flow of a method of manufacturing a light-emitting diode wafer according to a first embodiment of the present invention.
圖3A至圖3C為本發明之第二實施例的一種發光二極體晶片的製造方法的部分流程剖面圖。3A to 3C are partial cross-sectional views showing a method of manufacturing a light-emitting diode wafer according to a second embodiment of the present invention.
圖4A至圖4D為本發明之第三實施例的一種發光二極體晶片的製造方法的部分流程剖面圖。4A to 4D are partial cross-sectional views showing a method of manufacturing a light-emitting diode wafer according to a third embodiment of the present invention.
圖5A至圖5C為本發明之第四實施例的一種發光二極體晶片的製造方法的部分流程剖面圖。5A to 5C are partial cross-sectional views showing a method of manufacturing a light-emitting diode wafer according to a fourth embodiment of the present invention.
圖6A至圖6E為本發明之第五實施例的一種發光二極體晶片的製造方法的流程剖面圖。6A to 6E are cross-sectional views showing the flow of a method of manufacturing a light-emitting diode wafer according to a fifth embodiment of the present invention.
圖7為本發明之第五實施例的另一種發光二極體晶片的剖面圖。Figure 7 is a cross-sectional view showing another light emitting diode wafer of a fifth embodiment of the present invention.
圖8A至圖8F為本發明之第六實施例的一種發光二極體晶片的製造方法的流程剖面圖。8A to 8F are cross-sectional views showing the flow of a method of manufacturing a light-emitting diode wafer according to a sixth embodiment of the present invention.
圖9為本發明之第六實施例的另一種發光二極體晶片的剖面圖。Figure 9 is a cross-sectional view showing another light emitting diode wafer of a sixth embodiment of the present invention.
圖10A至圖10E為本發明之第七實施例的一種發光二極體晶片的製造方法的流程剖面圖。10A to 10E are cross-sectional views showing the flow of a method of manufacturing a light-emitting diode wafer according to a seventh embodiment of the present invention.
圖11為本發明之第七實施例的另一種發光二極體晶片的剖面圖。Figure 11 is a cross-sectional view showing another light emitting diode wafer of a seventh embodiment of the present invention.
200...發光二極體晶片200. . . Light-emitting diode chip
212...第一型摻雜半導體層212. . . First type doped semiconductor layer
214...發光層214. . . Luminous layer
216...第二型摻雜半導體層216. . . Second type doped semiconductor layer
224...突起結構224. . . Protrusion structure
226...凹陷226. . . Depression
228...導電層228. . . Conductive layer
240...第一電極240. . . First electrode
250...第二電極250. . . Second electrode
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