KR20080017237A - Vertically structured gan type semiconductor light emitting device and method of manufacturing the same - Google Patents

Abstract

A vertically structured GaN type semiconductor light emitting device and a method for manufacturing the same are provided to adjust easily an etching depth for forming a concavo-convex part by planarizing a surface of an n-type nitride semiconductor layer in contact with an n-type electrode. A p-type electrode(150) is formed on a structural supporting layer(200). A p-type nitride semiconductor layer(140) is formed on the p-type electrode. An active layer(130) is formed on the p-type nitride semiconductor layer. An n-type nitride semiconductor layer(120) is formed on the active layer. An n-type electrode(160) is formed on a part of the p-type nitride semiconductor layer. A buffer layer(110) is formed on the n-type nitride semiconductor layer on which the n-type electrode is not formed. A concavo-convex part is formed on a surface of the buffer layer. A surface of the n-type nitride semiconductor layer connected to the n-type electrode is formed with a flat structure.

Description

Vertically structured nitride-based semiconductor light emitting device and a method of manufacturing the same {Vertically structured GaN type semiconductor light emitting device and method of manufacturing the same}

1 is a cross-sectional view showing the structure of a vertical structure nitride-based semiconductor light emitting device according to the prior art.

2 is a cross-sectional view showing the structure of a vertical nitride semiconductor light emitting device according to an embodiment of the present invention.

3A through 3E are cross-sectional views sequentially illustrating a method of manufacturing a vertical nitride semiconductor light emitting device according to an exemplary embodiment of the present invention.

4A to 4E are cross-sectional views sequentially illustrating a method of manufacturing a vertical nitride semiconductor light emitting device according to a modification of the present invention.

<Description of Symbols for Main Parts of Drawings>

100: sapphire substrate 110: buffer layer

120: n-type nitride semiconductor layer 130: active layer

140: p-type nitride semiconductor layer 150: p-type electrode

160: n-type electrode 200: structure support layer

The present invention relates to a vertical nitride semiconductor light emitting device and a manufacturing method thereof, and more particularly, to a vertical nitride semiconductor light emitting device and a method of manufacturing the same that can improve the electrical characteristics and optical properties.

In general, nitride-based semiconductor light emitting devices are grown on a sapphire substrate, but these sapphire substrates are hard, electrically nonconductive, and have poor thermal conductivity, thereby reducing the size of the nitride-based semiconductor light emitting devices, thereby reducing manufacturing costs, or reducing light output and chip characteristics. There is a limit to improving this. In particular, it is important to solve the heat dissipation problem of the light emitting device because a large current is required for high output of the light emitting device.

As a means to solve this problem, a vertical nitride semiconductor light emitting device having a sapphire substrate removed using a laser lift-off (hereinafter referred to as LLO) has been conventionally proposed.

Hereinafter, a vertical nitride semiconductor light emitting device according to the related art will be described in detail with reference to FIG. 1.

1 is a cross-sectional view showing the structure of a vertical nitride semiconductor light emitting device according to the prior art.

As shown in FIG. 1, a structure supporting layer 200 is formed at the bottom of a vertical nitride semiconductor light emitting device according to the prior art.

The p-type electrode 150 is formed on the structure support layer 200. The p-type electrode 150 is preferably made of a metal having a high reflectance so as to simultaneously serve as an electrode and a reflection role.

The p-type nitride semiconductor layer 140, the active layer 130, and the n-type nitride semiconductor layer 120 are sequentially formed on the p-type electrode 150.

Unevenness is formed on the surface of the n-type nitride semiconductor layer 120 to improve light extraction efficiency, and an n-type electrode 160 is formed on the n-type nitride semiconductor layer 120 having the unevenness.

In the conventional method of manufacturing a vertical nitride semiconductor light emitting device, a buffer layer (not shown), an n-type nitride semiconductor layer 120, an active layer 130, and a p-type nitride semiconductor layer are first formed on a sapphire substrate (not shown). 140 are formed in sequence.

In general, the buffer layer may not be doped with impurities, may be lightly doped, or the buffer layer may have a stacked structure of a layer that is not doped with impurities and a lightly doped layer. In addition, impurities are heavily doped in the n-type nitride semiconductor layer 120.

Then, the p-type electrode 150 and the structure support layer 200 are sequentially formed on the p-type nitride semiconductor layer 140, and then the sapphire substrate is removed by an LLO process to expose the buffer layer.

Next, the buffer layer and the n-type nitride semiconductor layer 120 are etched so that irregularities are formed on the surface of the n-type nitride semiconductor layer 120. In this case, in order to make the highly doped n-type nitride semiconductor layer 120 make contact with the subsequent n-type electrode 160, to reduce the contact resistance of the n-type electrode 160 and reduce the operating voltage. The buffer layer must be etched so as not to remain on the n-type nitride semiconductor layer 120.

However, in the process of etching such that the unevenness is formed on the surface of the n-type nitride semiconductor layer 120, if the etching depth is not properly controlled, for example, if the etching proceeds even a little to the active layer 130, a shortness defect occurs As a result, there is a problem that the electrical characteristics of the device is reduced.

In order to solve this problem, a high concentration of n-type nitride semiconductor layer 120 may be formed to secure an etching process margin, but this may cause deterioration of characteristics of the LED active layer 130. In addition, even if the etching is performed without the short-circuit defect, it is difficult to form the n-type electrode 160 on the surface where the unevenness is formed, and the current concentrates on the sharp uneven structure under the n-type electrode 160 in terms of long-term reliability. Thus, the life of the LED is shortened.

In addition, as described above, the sapphire substrate is removed by an LLO process to expose the buffer layer, and then irregularities are formed on the surface of the buffer layer through a wet etching process, and the n-type electrode is etched by etching the buffer layer in the region where the n-type electrode will be formed. After exposing the nitride semiconductor layer, there is also a method of forming an n-type electrode on the exposed n-type nitride semiconductor layer. In this case, since the unevenness forming step is performed before the n-type electrode forming step, damage to the n-type electrode due to the unevenness forming step can be prevented, but the uneven profile on the surface of the buffer layer is almost the same as the n-type nitride semiconductor. It may appear on the layer surface, making it difficult to form the n-type electrode on the flat surface, and controlling the etching depth is also not easy.

Accordingly, the present invention has been made to solve the above problems, and an object of the present invention is to make the surface of the n-type nitride semiconductor layer in contact with the n-type electrode flat, and to easily adjust the etching depth for forming the unevenness. Another aspect of the present invention is to provide a vertical nitride semiconductor light emitting device and a method of manufacturing the same, which can simultaneously improve electrical and optical characteristics of the light emitting device.

Vertical structure nitride-based semiconductor light emitting device according to the present invention for achieving the above object, the structure support layer; A p-type electrode formed on the structure support layer; A p-type nitride semiconductor layer formed on the p-type electrode; An active layer formed on the p-type nitride semiconductor layer; An n-type nitride semiconductor layer formed on the active layer; An n-type electrode formed on a portion of the n-type nitride semiconductor layer; And a buffer layer formed on the n-type nitride semiconductor layer on which the n-type electrode is not formed and having irregularities on a surface thereof. The surface of the n-type nitride semiconductor layer in contact with the n-type electrode is flat. do.

In addition, a method of manufacturing a vertical nitride semiconductor light emitting device according to the present invention for achieving the above object comprises the steps of sequentially forming a buffer layer, an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer on a substrate; Forming a p-type electrode on the p-type nitride semiconductor layer; Forming a structure support layer on the p-type electrode; Removing the substrate by an LLO process; Selectively etching a portion of the buffer layer from which the substrate is removed to expose a portion of the n-type nitride semiconductor layer to be flat; Forming an n-type electrode on the flattened n-type nitride semiconductor layer; And forming irregularities on the surface of the unetched buffer layer.

Further, in the step of selectively etching a portion of the buffer layer to expose a portion of the n-type nitride semiconductor layer, it is characterized in that a dry etching method is used.

In addition, another method of manufacturing a vertical nitride semiconductor light emitting device according to the present invention for achieving the above object comprises the steps of sequentially forming a buffer layer, an n-type nitride semiconductor layer, an active layer and a p-type nitride semiconductor layer on the substrate; Forming a p-type electrode on the p-type nitride semiconductor layer; Forming a structure support layer on the p-type electrode; Removing the substrate by an LLO process; Selectively etching a portion of the buffer layer from which the substrate is removed to expose a portion of the n-type nitride semiconductor layer to be flat; Forming irregularities on the surface of the unetched buffer layer; And forming an n-type electrode on the flattened n-type nitride semiconductor layer.

Further, in the step of selectively etching a portion of the buffer layer to expose a portion of the n-type nitride semiconductor layer, it is characterized in that a dry etching method is used.

Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like reference numerals designate like parts throughout the specification.

Now, a vertical nitride semiconductor light emitting device and a method of manufacturing the same according to an embodiment of the present invention will be described in detail with reference to the accompanying drawings.

Embodiment of the structure of a vertical nitride nitride semiconductor light emitting device

First, a vertical nitride semiconductor light emitting device according to an exemplary embodiment of the present invention will be described in detail with reference to FIG. 2.

2 is a cross-sectional view showing the structure of a vertical nitride semiconductor light emitting device according to an embodiment of the present invention.

As shown in FIG. 2, a structure support layer 200 which functions as a support layer and an electrode of the LED device is formed at the bottom of the vertical nitride semiconductor light emitting device according to the embodiment of the present invention.

The p-type electrode 150 is formed on the structure support layer 200. The p-type electrode 150 is preferably made of a metal having a high reflectance so as to simultaneously serve as an electrode and a reflective role.

The p-type nitride semiconductor layer 140, the active layer 130, and the n-type nitride semiconductor layer 120 are sequentially formed on the p-type electrode 150.

The n-type and p-type nitride semiconductor layers 120 and 140 and the active layer 130 have Al _x In _y Ga _(1-x- y) N composition formulas, where 0 ≦ x ≦ 1, 0 ≦ y ≦ 1, and 0 ≦ x. + y ≦ 1), and may be formed through known nitride deposition processes such as MOCVD and MBE processes. More specifically, the n-type nitride semiconductor layer 120 may be formed of a GaN layer or a GaN / AlGaN layer doped with n-type impurities, for example, Si, Ge, Sn, etc. are used as the n-type impurities The p-type nitride semiconductor layer 140 may be formed of a GaN layer or a GaN / AlGaN layer doped with p-type impurities. For example, Mg, Zn, or Be may be used as the p-type impurity. .

An n-type electrode 160 is formed on a portion of the n-type nitride semiconductor layer 120, and a buffer layer 110 is formed on the n-type nitride semiconductor layer 120 on which the n-type electrode 160 is not formed. It is.

In general, the buffer layer 110 may not be doped with impurities, may be lightly doped, or the buffer layer 110 may be formed of a stacked structure of a layer that is not doped with impurities and a lightly doped layer. In addition, impurities are heavily doped in the n-type nitride semiconductor layer 120.

In particular, in the vertical nitride semiconductor light emitting device according to the present embodiment, irregularities are formed on the surface of the buffer layer 110 to improve the light extraction efficiency of the device, and the contact with the n-type electrode 160 is performed. The surface of the n-type nitride semiconductor layer 120 is formed flat.

As described above, since the n-type electrode 160 is stably formed on the flat n-type nitride semiconductor layer 120, the light emitting device according to the present invention has surface irregularities for improving light extraction efficiency of the vertical structure light emitting device. In addition, there is an effect that can improve the electrical and optical properties of the device at the same time.

Embodiment of a manufacturing method of a vertical nitride semiconductor light emitting device

Hereinafter, a method of manufacturing a vertical nitride semiconductor light emitting device according to an embodiment of the present invention will be described in detail with reference to FIGS. 3A to 3E.

3A through 3E are cross-sectional views sequentially illustrating a method of manufacturing a vertical nitride semiconductor light emitting device according to an exemplary embodiment of the present invention.

First, as shown in FIG. 3A, a buffer layer 110, an n-type nitride semiconductor layer 120, an active layer 130, and a p-type nitride semiconductor layer 140 are sequentially formed on the substrate 100.

The substrate 100 is preferably formed using a transparent material including sapphire, and in addition to sapphire, the substrate 100 may be formed of zinc oxide (ZnO), gallium nitride (GaN), silicon carbide. (silicon carbide, SiC) and aluminum nitride (AlN).

As described above, the n-type and p-type nitride semiconductor layers 120 and 140 and the active layer 130 have an Al _x In _y Ga _(1-x- y) N composition formula (where 0 ≦ x ≦ 1 and 0 ≦ y ≦). 1, 0 ≦ x + y ≦ 1), and may be formed through known nitride deposition processes such as MOCVD and MBE processes. More specifically, the n-type nitride semiconductor layer 120 may be formed of a GaN layer or a GaN / AlGaN layer doped with n-type impurities, for example, Si, Ge, Sn, etc. are used as the n-type impurities The p-type nitride semiconductor layer 140 may be formed of a GaN layer or a GaN / AlGaN layer doped with p-type impurities. For example, Mg, Zn, or Be may be used as the p-type impurity. .

The buffer layer 110 is grown to improve lattice matching between the substrate 100 and the n-type nitride semiconductor layer 120. In general, the buffer layer 110 is not doped with impurities or has a low concentration. The doped or buffer layer 110 may be formed of a stacked structure of a layer not doped with impurities and a lightly doped layer. In addition, impurities are heavily doped in the n-type nitride semiconductor layer 120.

Then, the p-type electrode 150 is formed on the p-type nitride semiconductor layer 140. The p-type electrode 150 is preferably formed of a metal having high reflectance so as to simultaneously serve as an electrode and a reflective role.

Next, as shown in FIG. 3B, the structural support layer 200 is formed on the p-type electrode 150.

Next, as shown in FIG. 3C, the substrate 100 is removed by an LLO process to expose the surface of the buffer layer 110.

3D, a portion of the buffer layer 110 from which the substrate 100 is removed is selectively etched to expose a portion of the n-type nitride semiconductor layer 120 flatly. . At this time, the etching of the buffer layer 110 to expose a portion of the n-type nitride semiconductor layer 120 is preferably performed by a dry etching method. Exposing the n-type nitride semiconductor layer 120 by etching a portion of the buffer layer 110 as described above is such that the heavily doped n-type nitride semiconductor layer 120 makes contact with a subsequent n-type electrode 160. Thus, the contact resistance of the n-type electrode 160 is reduced and the operating voltage is reduced.

Here, the surface of the buffer layer 110 immediately after removing the substrate 100 as described above is relatively flat, and if the dry etching process is performed on the buffer layer 110 of the flat surface, not only the control of the etching depth is easy, A flat etching surface can be obtained.

Then, the n-type electrode 160 is formed on the flattened n-type nitride semiconductor layer 120.

As such, according to the present invention, by forming the n-type electrode 160 on the highly doped n-type nitride semiconductor layer 120, a low contact resistance and an operating voltage can be obtained, and a sharp concave-convex structure is formed as in the prior art. Since the n-type electrode 160 is formed on a flat surface without forming the n-type electrode 160, the lifespan of the LED can be extended by preventing current concentration due to the sharp concave-convex structure.

Next, as shown in FIG. 3E, irregularities are formed on the surface of the non-etched buffer layer 110 to improve light extraction efficiency. The unevenness may be mainly formed by a wet etching method using KOH.

As such, in the related art, the etching process is performed to form the unevenness on the surface of the n-type nitride semiconductor layer 120, thereby simultaneously performing the unevenness forming process for improving the light extraction efficiency and the process for securing the low operating voltage. As described above, only the n-type nitride semiconductor layer 120 of the region where the n-type electrode 160 is to be formed is previously flattened, and then only the surface of the buffer layer 110 except for the n-type electrode 160 formation region is exposed. Unevenness is formed. That is, in the present invention, the n-type electrode 160 and the surface of the unevenness are formed separately, so that the process considering the electrical and optical characteristics of the device may be performed optimally.

On the other hand, the n-type electrode 120 formed on the n-type nitride semiconductor layer 120 exposed flat, may be formed before forming the irregularities on the surface of the buffer layer 110 as described above, the buffer layer 110 It can be formed after the unevenness is formed on the surface.

As described above, the present invention removes the substrate 100 by the LLO process, and then dry-etchs the buffer layer 110 in the region where the n-type electrode 160 is to be formed to remove a portion of the n-type nitride semiconductor layer 120. After the flat surface is exposed, irregularities are formed only on the surface of the unetched buffer layer 110, thereby improving the electrical and optical properties of the device.

Modified Example of Manufacturing Method of Vertical Structure-nitride Semiconductor Light-Emitting Device

Hereinafter, a method of manufacturing a vertical nitride semiconductor light emitting device according to a modification of the present invention will be described in detail with reference to FIGS. 4A to 4E, where the embodiment of the method of manufacturing the vertical nitride nitride semiconductor light emitting device is described. The same parts as the case will be omitted the detailed description.

4A through 4E are cross-sectional views sequentially illustrating a method of manufacturing a vertical nitride semiconductor light emitting device according to a modification of the present invention, and the processes illustrated in FIGS. 4A through 4C illustrate the vertical nitride semiconductor. 3A to 3C are the same as those of the embodiment of the manufacturing method of the light emitting device.

4A to 4C, the buffer layer 110, the n-type nitride semiconductor layer 120, the active layer 130, the p-type nitride semiconductor layer 140, and the p-type electrode are formed on the substrate 100. 150 is formed in turn (FIG. 4A), and then a structural support layer 200 is formed on the p-type electrode 150 (FIG. 4B), and the substrate 100 is removed by an LLO process to remove the buffer layer. The series of processes for revealing the surface of 110 (Fig. 4C) is the same as in the above embodiment.

4D and 4E, the modified example of the present invention differs from the above embodiment in order to improve light extraction efficiency on the entire surface of the buffer layer 110 from which the substrate 100 is removed. After the irregularities are formed, a portion of the buffer layer 110 in which the irregularities are formed is selectively etched to expose a portion of the n-type nitride semiconductor layer 120 flat. That is, by selectively etching a portion of the buffer layer 110 from which the substrate 100 is removed in the above embodiment, exposing a portion of the n-type nitride semiconductor layer 120 to be flat and unevenness on the surface of the buffer layer 110. It can be said that the prosecution of the step of forming a change has been made.

In addition, an n-type electrode 160 is formed on the n-type nitride semiconductor layer 120 that is flattened through the above steps.

In addition, irregularities formed on the entire surface of the buffer layer 110 may be formed by a wet etching method using mainly KOH, and the like, and the buffer layer 110 for exposing a part of the n-type nitride semiconductor layer 120. Etching is preferably performed by a dry etching method is the same also in the case of a modification of the present invention.

Here, in the modified example of the present invention, there may be disadvantages in that the dry etching process is performed on the buffer layer 110 in which the unevenness is formed, but it is difficult to control relatively precisely compared to the dry etching method. The etching method is advantageous in that the etching method is performed over the entire surface of the buffer layer 110 from which the substrate 100 is removed.

Even in the modified example of the present invention, as described above in the case of the above embodiment, by separately performing the surface on which the n-type electrode 160 is formed and the surface of the uneven formation, it is possible to improve the electrical and optical properties of the device at the same time The effect is the same.

Although the preferred embodiments of the present invention have been described in detail above, those skilled in the art will understand that various modifications and equivalent other embodiments are possible therefrom. Accordingly, the scope of the present invention is not limited to the disclosed embodiments, but various modifications and improvements of those skilled in the art using the basic concept of the present invention as defined in the following claims also fall within the scope of the present invention.

As described above, according to the vertical nitride semiconductor light emitting device according to the present invention and a method for manufacturing the same, the n-type nitride semiconductor layer in contact with the n-type electrode is formed by dividing the n-type electrode and the uneven surface separately. While forming the surface flat, it is possible to facilitate the etching depth control for forming the irregularities.

Therefore, the present invention has the effect of improving the electrical and optical properties of the device at the same time.

Claims (7)

Structural support layer; A p-type electrode formed on the structure support layer; A p-type nitride semiconductor layer formed on the p-type electrode; An active layer formed on the p-type nitride semiconductor layer; An n-type nitride semiconductor layer formed on the active layer; An n-type electrode formed on a portion of the n-type nitride semiconductor layer; And And a buffer layer formed on the n-type nitride semiconductor layer on which the n-type electrode is not formed and having irregularities on the surface thereof. And a surface of the n-type nitride semiconductor layer in contact with the n-type electrode. Sequentially forming a buffer layer, an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer on the substrate; Forming a p-type electrode on the p-type nitride semiconductor layer; Forming a structure support layer on the p-type electrode; Removing the substrate by an LLO process; Selectively etching a portion of the buffer layer from which the substrate is removed to expose a portion of the n-type nitride semiconductor layer to be flat; Forming an n-type electrode on the flattened n-type nitride semiconductor layer; And Forming irregularities on the surface of the unetched buffer layer; Method of manufacturing a vertical nitride semiconductor light emitting device comprising a. The method of claim 2, Selectively etching a portion of the buffer layer to expose a portion of the n-type nitride semiconductor layer, wherein a dry etching method is used. Sequentially forming a buffer layer, an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer on the substrate; Forming a p-type electrode on the p-type nitride semiconductor layer; Forming a structure support layer on the p-type electrode; Removing the substrate by an LLO process; Selectively etching a portion of the buffer layer from which the substrate is removed to expose a portion of the n-type nitride semiconductor layer to be flat; Forming irregularities on the surface of the unetched buffer layer; And Forming an n-type electrode on the flattened n-type nitride semiconductor layer; Method of manufacturing a vertical nitride semiconductor light emitting device comprising a. The method of claim 4, wherein Selectively etching a portion of the buffer layer to expose a portion of the n-type nitride semiconductor layer, wherein a dry etching method is used. Sequentially forming a buffer layer, an n-type nitride semiconductor layer, an active layer, and a p-type nitride semiconductor layer on the substrate; Forming a p-type electrode on the p-type nitride semiconductor layer; Forming a structure support layer on the p-type electrode; Removing the substrate by an LLO process; Forming irregularities on the entire surface of the buffer layer from which the substrate is removed; Selectively etching a portion of the buffer layer on which the unevenness is formed to expose a portion of the n-type nitride semiconductor layer to be flat; And Forming an n-type electrode on the flattened n-type nitride semiconductor layer; Method of manufacturing a vertical nitride semiconductor light emitting device comprising a. The method of claim 6, Selectively etching a portion of the buffer layer on which the unevenness is formed to expose a portion of the n-type nitride semiconductor layer flatly, using a dry etching method.

Images