KR101332092B1 - Liquid Crystal Display Device and Driving Method thereof - Google Patents

Abstract

The present invention provides a liquid crystal display device suitable for displaying an image of good image quality regardless of the liquid crystal panel and the use environment.

A liquid crystal display device comprises: a liquid crystal panel comprising liquid crystal cells commonly-connected to a common voltage line; A driver which converts pixel data into pixel driving signals having alternating positive and negative polarities based on a common voltage, and supplies the converted pixel data to the liquid crystal cells; A common voltage generator configured to generate the common voltage to be supplied to the common voltage line on the liquid crystal panel; And a common voltage compensator configured to compensate the common voltage to be supplied to the common voltage line from the common voltage generator in response to a pixel charging voltage charged in the liquid crystal cell.

Common voltage, pixel charge voltage, afterimage, flicker, deviation, polarity, inversion.

Description

Liquid crystal display device and driving method

1 is a waveform diagram illustrating a pixel drive signal charged in a liquid crystal cell of a liquid crystal panel.

2 is a block diagram of a liquid crystal display according to an exemplary embodiment of the present invention.

FIG. 3 is a detailed block diagram illustrating in detail the common voltage compensator illustrated in FIG. 2.

4 is a detailed block diagram illustrating in detail a compensation voltage width detector illustrated in FIG. 3.

5 is a block diagram of a liquid crystal display according to another exemplary embodiment of the present invention.

FIG. 6 is a detailed block diagram illustrating in detail the compensation rate calculator illustrated in FIG. 5.

BRIEF DESCRIPTION OF THE DRAWINGS

10: liquid crystal panel 12: gate driver

14: data driver 16,50: timing controller

18: common voltage generator 20: common voltage compensator

30: compensation voltage width detection unit 32: adder

34: compensation timing controller 40,42: first and second absolute value integrators

44: differential amplifier 46: sample-holder

50A: common voltage controller 52: variable common voltage generator

54: compensation width calculator 60: analog-to-digital converter

SW1: Control switch

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a liquid crystal display device for displaying an image on a liquid crystal panel, and more particularly, to a liquid crystal display device having a common voltage generator for generating a common voltage to be supplied to a liquid crystal panel, and a driving method thereof.

An ordinary liquid crystal display device displays an image corresponding to video data by adjusting a light transmittance of a liquid crystal in accordance with video data. Such a liquid crystal display device can make the size of the screen larger than the limit while reducing the thickness. Further, the liquid crystal display device can be made slimmer and lighter. In view of this, the liquid crystal display device is used as a display device of a computer or a display device of a television receiver instead of a cathode ray tube (Cathode Ray Tube) display device.

In order to display an image corresponding to video data, the liquid crystal display includes drive circuits for driving the liquid crystal panel. The liquid crystal panel includes liquid crystal cells arranged in a matrix form. Each of the liquid crystal cells responds to a pixel drive signal from the drive circuit. Each of these liquid crystal cells orientates liquid crystal molecules in a direction corresponding to a potential difference between a pixel driving signal and a common voltage serving as a reference voltage. The amount of light passing through the liquid crystal cell is adjusted in accordance with the alignment direction of the liquid crystal molecules, so that an image is displayed.

In the liquid crystal display module, in order to suppress generation of afterimage and flicker noise due to charge and discharge characteristics of the liquid crystal cell, each of the liquid crystal cells on the liquid crystal panel has a positive polarity and a negative polarity based on a reference voltage as shown in FIG. 1. The voltage is driven by a pixel drive signal that alternately has a voltage for each frame period . The pixel voltage charged negative polarity and the positive polarity to be filled in the liquid crystal cell by the pixel drive signal is a scan signal (Vgs) is the one to the voltage level of the pixel drive signals applied to that enabled period is reached after the scan signal (Vgs) is disabled When enabled , it will be lowered. This difference (△ Vp) of the voltage charged to the liquid crystal cell in the supply period of the pixel drive signal to the pixel drive voltage maintaining period is the size of the voltage charged to the liquid crystal cell by a positive pixel-driving signal Province (hereinafter referred to as "positive Polar pixel voltage magnitude ") As the size of the voltage charged to the liquid crystal cell by the pixel drive signal of a negative polarity (hereinafter referred to as "the negative pixel voltage charged" To be different). Negative polarity charged on the liquid crystal cell CLC The difference between the pixel charging voltage and the positive pixel charging voltage (i.e., the difference in swing width) causes the image displayed on the liquid crystal panel to deteriorate or noise such as flicker occurs . In order to reduce the difference in the pixel charging voltage on the liquid crystal cell due to the polarity change of the pixel driving signal, the common voltage supplied to the liquid crystal panel should be appropriately set.

Common voltage included in existing liquid crystal display module Generation part  The manufacturer is set to generate a constant level of common voltage. On the other hand, in the liquid crystal panel, the resistance value of the common voltage wiring varies depending on the size and the number of liquid crystal cells. In addition, the resistance value of the common voltage wiring varies between liquid crystal panels of the same model according to the manufacturing environment and conditions of the liquid crystal panel. In addition, the resistance value of the common voltage line on the liquid crystal panel may vary depending on the use environment such as temperature and humidity.

For this reason, the common voltage to be supplied to the common voltage line on the liquid crystal panel becomes higher or lower than the level suitable for the display of all the gradations . This level variation of the common voltage is caused by the positive polarity charged by the liquid crystal cell of the liquid crystal panel. The difference between the pixel charging voltage and the negative pixel charging voltage is inevitably generated. this Therefore, this is bound to an image displayed on the liquid crystal panel deteriorates, or noise, such as flicker played back to. As a result, the image quality of the image displayed by the liquid crystal display device was inevitably deteriorated.

Accordingly, an object of the present invention is to provide a liquid crystal display device and a driving method thereof suitable for displaying an image of good image quality irrespective of the liquid crystal panel and the use environment.

Another object of the present invention is to provide a liquid crystal display and a driving method thereof suitable for preventing deterioration of an image and generation of flicker even if the liquid crystal panel and the use environment are changed.

According to an aspect of the present invention, there is provided a liquid crystal display device including: a liquid crystal panel including liquid crystal cells commonly connected to a common voltage line; A driver which converts pixel data into pixel driving signals having alternating positive and negative polarities based on a common voltage, and supplies the converted pixel data to the liquid crystal cells; A common voltage generator configured to generate the common voltage to be supplied to the common voltage line on the liquid crystal panel; And a common voltage compensator configured to compensate the common voltage to be supplied to the common voltage line from the common voltage generator in response to a pixel charging voltage charged in the liquid crystal cell.

In another embodiment, a liquid crystal display includes: a liquid crystal panel including liquid crystal cells commonly connected to a common voltage line; A driver which converts pixel data into pixel driving signals having alternating positive and negative polarities based on a common voltage, and supplies the converted pixel data to the liquid crystal cells; A variable common voltage generator configured to generate the common voltage to be supplied to the common voltage line on the liquid crystal panel; A compensation width calculator configured to calculate a compensation width of the common voltage based on a pixel driving voltage charged in the liquid crystal cell; And a common voltage controller for causing the variable type common voltage generator to adjust the level of the common voltage by the compensation width in response to the compensation width from the compensation width calculator.

A driving method of a liquid crystal display according to another exemplary embodiment of the present invention is to supply pixel driving signals having alternating positive and negative polarities to liquid crystal cells commonly connected to common voltage lines on a liquid crystal panel. step; Supplying a common voltage to the common voltage line on the liquid crystal panel; And compensating the common voltage supplied to the common voltage line based on the pixel charging voltage charged in the liquid crystal cell.

A driving method of a liquid crystal display according to another exemplary embodiment of the present invention is to supply pixel driving signals having alternating positive and negative polarities to liquid crystal cells commonly connected to common voltage lines on a liquid crystal panel. step; Supplying a common voltage to the common voltage line on the liquid crystal panel; Calculating the compensation width based on the pixel charge voltage charged in the liquid crystal cell; And varying a level of the common voltage supplied to the common voltage line responsive to the compensation width.

According to the above configuration, in the liquid crystal display device and the driving method thereof according to the present invention, the common voltage is compensated to be increased or decreased by the difference between the positive and negative pixel charge voltages charged in the liquid crystal cell on the liquid crystal panel. The deviation between the positive and negative polarities of the pixel charging voltage charged in the liquid crystal cell may be minimized. Accordingly, the image displayed on the liquid crystal panel is not deteriorated and noise such as flicker is not generated. As a result, the liquid crystal display device according to the present invention can display images of good image quality regardless of the liquid crystal panel and the use environment.

Other objects, other features, and other advantages of the present invention in addition to the above objects will become apparent from the detailed description of the embodiments associated with the accompanying drawings.

Best Mode for Carrying Out the Invention Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings.

2 is a block diagram schematically illustrating a liquid crystal display according to an exemplary embodiment of the present invention. Referring to FIG. 2, the liquid crystal display device includes a gate driver 12 connected to a plurality of gate lines GL1 to GLn on the liquid crystal panel 10 and a plurality of data lines DL1 to DLm on the liquid crystal panel 10. The data driver 14 connected is provided. The plurality of gate lines GL1 to GLn and the plurality of data lines DL1 to DLm are formed on the liquid crystal panel 10 so as to intersect with each other to divide a plurality of pixel regions. A liquid crystal pixel is formed in each of the plurality of pixel regions.

Each of the liquid crystal pixels includes a thin film transistor MT and a liquid crystal cell CLC connected in series between a corresponding data line DL and a common voltage line Vcom. The thin film transistor MT switches the pixel driving signal to be supplied to the corresponding liquid crystal cell CLC from the corresponding data line DL in response to the scan signal Vgs on the corresponding gate line GL. Each time the corresponding thin film transistor MT is turned on (ie, every frame period), the liquid crystal cell CLC charges the pixel driving signal from the corresponding data line DL. In addition, the pixel driving signals Vds charged in the liquid crystal cell CLC alternately have positive and negative voltages for each frame period based on the common voltage Vcom. The liquid crystal cell CLC is charged with the pixel driving signal Vds until the corresponding thin film transistor MT is turned on again by a gate signal such as Vgs of FIG. 4 on the corresponding gate line GL. Keep the voltage at By the pixel driving signal charged in the liquid crystal cell CLC, the liquid crystal molecules included in the liquid crystal cell CLC are aligned in a direction corresponding to a potential difference between the charged pixel driving signal and the common voltage Vcom on the common voltage line. The amount of light passing through the liquid crystal cell CLC is adjusted. In this manner, the liquid crystal panel 10 displays an image by the liquid crystal cell CLC that adjusts the light transmission amount according to the potential difference between the pixel drive signal and the common voltage.

The gate driver 12 sequentially enables a plurality of gate lines GL1 to GLn for a predetermined period (for example, a period of one horizontal synchronizing signal) during one frame. To this end, the gate driver 12 generates a plurality of scan signals Vgs having exclusively enable pulses sequentially shifted for each period of the horizontal synchronization signal. The gate enable pulse included in each of the plurality of scan signals has the same width as the period of the horizontal synchronization signal as shown in Vgs of FIG. 1. The enable pulses included in each of the plurality of scan signals are generated once per frame period. In order to generate these multiple scan signals Vgs, the gate driver 12 responds to gate control signals GCS from the timing controller 16. The gate control signals GCS respond to the start pulse GSP and the gate clock GSC. The gate start pulse GSC has a pulse of a specific logic (for example, high logic) corresponding to the period of one horizontal sync signal from the start of the frame period. The gate clock GSC has the same period as the horizontal synchronization signal.

The data driver 14 corresponds to the number of the data lines DL1 to DLm each time any one of the plurality of gate lines GL1 to GLn is enabled (that is, to the number of pixels arranged in one gate line). Generate pixel drive signals). Each of the pixel driving signals for one line is supplied to a corresponding pixel (ie, a liquid crystal cell) on the liquid crystal panel 10 via a corresponding data line DL. Each of the pixels arranged on the gate line GL passes an amount of light corresponding to a voltage level of the pixel driving signal. In order to generate one line of pixel driving signals, the data driver 14 sequentially inputs one line of pixel data LVDs for each period of the enable pulse included in the scan signal Vgs. The data driver 14 uses the gamma voltage set to simultaneously convert the pixel data LVDs for one line of the sequentially inputted pixel driving signals into an analog type pixel driving signal. The gamma voltages determine the voltage difference between the gradations of the pixel driving signal and the swing width of the pixel driving signal.

The gate driver 12 and the data driver 14 are controlled by the timing controller 16. The timing controller 16 inputs the synchronization signals SYNC from an external video data source (for example, an image demodulation module included in a television receiving module or a graphics card included in a computer system) not shown. The synchronizing signals SYNC supplied from an external video data source include a data enable signal DEN, a data clock Dclk, a horizontal synchronizing signal Hsync and a vertical synchronizing signal Vsync. The timing controller 16 uses a plurality of scan signals (SNC) to allow the gate driver 12 to sequentially scan the plurality of gate lines GL1 to GLn on the liquid crystal panel 10 every frame. Generates gate control signals GCS necessary to generate Vgs). The gate control signals GCS include a gate start pulse GSP and a gate clock GSC. In addition, the timing controller 16 causes the data driver 12 to sequentially input pixel data of one line for each cycle in which the gate line GL is enabled, and sequentially input the pixel data of one line of the inputted analog data. It generates data control signals DCS necessary to convert and output the pixel driving signal. Further, the timing controller 16 inputs the pixel data streams FVDs divided in frame units (one image unit) from the video data source. The timing controller 16 divides the pixel data stream FVDs for each frame by one line into pixel data LVDs and supplies the data to the data driver 14.

The liquid crystal display of FIG. 2 includes a common voltage generator 18 for inputting an input voltage Vin from a power supply of an external video source (for example, a power supply of a television receiver or a computer system); And a common voltage compensator 20 for inputting a power enable signal PEN from a control device of an external video source (for example, a television receiver or a central processing unit of a computer system). The common voltage generator 20 generates the common voltage Vcom by using the input voltage Vin from the power supply of the external video source. To this end, the common voltage generator 18 includes a resistor divider for dividing the input voltage Vin at a ratio of constant resistance values. The voltage divided by the resistor voltage divider is a common voltage Vcom and is supplied to the common voltage line Vcom on the liquid crystal panel 10 via the common voltage compensator 20. In addition, the common voltage generator 18 may further include a buffer circuit that buffers the divided voltage.

The common voltage compensator 20 calculates a compensation voltage width of the common voltage during a predetermined period of initial driving in response to the power enable signal PEN.

  To calculate the compensation rate, the common voltage compensator 20 sets the compensation value calculation period at the beginning of driving by using the power enable signal PEN and the synchronization signal SYNC from an external video source. During this compensation value calculation period, the common voltage compensator 20 detects a difference between the positive pixel charge voltage and the negative pixel charge voltage charged in the liquid crystal cell CLC on the liquid crystal panel 10. The difference between the detected positive and negative pixel charging voltages is set as the compensation voltage width. In addition, the common voltage compensator 20 shares the compensated common voltage Vcomc of the liquid crystal panel 10 by raising or lowering the level of the common voltage Vcom from the common voltage generator 18 by the calculated compensation voltage width. Supply to voltage line Vcom.

As such, since the common voltage Vcom is compensated for increasing or decreasing by the deviation between the positive and negative pixel charge voltages charged in the liquid crystal cell on the liquid crystal panel 10, the pixel charge voltage charged in the liquid crystal cell The deviation between positive and negative polarity can be minimized. Accordingly, the image displayed on the liquid crystal panel 10 is not deteriorated and noise such as flicker is not generated. As a result, the liquid crystal display device according to the present invention can display images of good image quality regardless of the liquid crystal panel and the use environment.

FIG. 3 is a detailed block diagram illustrating in detail the common voltage compensator 20 illustrated in FIG. 2. The common voltage compensator 20 of FIG. 3 includes a compensation voltage width detector 30 and an adder 32 which commonly input a common voltage Vcom from the common voltage generator 18 of FIG. 2, and an external video. And a compensation timing controller 34 for inputting the power enable signal PEN and the synchronization signals SYNC from the source. The pixel charging voltage Vds charged on any one liquid crystal cell CLC on the liquid crystal panel 10 of FIG. 2 is input to the compensation voltage width detector 30. The pixel charging voltage Vds has an inverted polarity for each frame period as shown in FIG. 1. This is because the pixel drive signal supplied from the data driver 14 is inverted every frame period. In other words, in the liquid crystal cell CLC, the positive pixel charging voltage Vds and the negative pixel charging voltage VdS are alternately output according to the frame.

The compensation voltage width detector 30 integrates the pixel charge voltage Vds from the liquid crystal cell CLC on the basis of the common voltage Vcom for each frame period to detect the positive pixel charge voltage and the negative pixel charge voltage. . The compensation voltage width detector 30 detects a difference between the detected positive and negative pixel charge voltages and supplies the difference voltage to the adder 32 as the compensation voltage width Vcw. The compensation voltage width has a negative voltage value when the positive pixel charging voltage is greater than the negative pixel charging voltage, while the compensation voltage width has a positive voltage value when the positive pixel charging voltage is smaller than the negative pixel charging voltage. . In addition, the compensation voltage width Vcw is changed for each frame period in a constant compensation value calculation period (for example, 10 frame periods) from the start of the liquid crystal display, and maintains a final value after the compensation value calculation period. .

The adder 32 increases or decreases the common voltage from the common voltage generator 18 of FIG. 2 by the voltage compensation width Vcw from the compensation voltage detector 30, and increases the high or low compensated common voltage Vcomc. The common voltage line Vcom on the liquid crystal panel 10 of FIG. 2 is supplied. To this end, the adder 32 adds the voltage compensation width Vcw to the common voltage Vcom from the common voltage generator 18.

The compensation timing control part 34 specifies a compensation value specifying a compensation value calculation period for a predetermined period (for example, 10 frame periods) from an enable time point (ie, rising edge or falling edge) of the power enable signal PEN. Generate a calculation control signal CDCS. The compensation value calculation control signal CDCS maintains a certain logic (e.g., high logic) for a certain period (i.e., ten frame periods) from the time of enabling the power enable signal PEN. The compensation voltage width detection unit 30 detects the compensation voltage width in a specific logic period of the compensation value calculation control signal CDCS from the compensation timing controller 34, and then performs the rest of the base logic period () of the compensation value calculation control signal CDCS. For example, in the low logic period, the detected compensation voltage width is kept as it is. In addition, the compensation timing controller 34 may further generate the frame switching signal FSS. The frame switching signal FSS includes a pulse inverted every frame period. By the frame switching signal FSS, the compensation voltage width detector 30 identifies the pixel charge voltage Vds from the liquid crystal cell CLC to identify the positive pixel voltage and the negative pixel voltage. In order to generate these compensation value calculation control signals CDCS and frame switching signal FSS, the compensation timing control section 34 divides the vertical synchronization signal Vsync into two of the synchronization signals and two divided vertical synchronizations. It may include a counter that counts the number of specific edges of the signal. The bisected vertical sync signal is used as the frame switching signal FSS, and the carry signal of the counter is used as the compensation value calculation control signal CDCS.

FIG. 4 is a detailed block diagram illustrating the compensation voltage width detector 30 shown in FIG. 3 in detail. The compensation voltage width detector 30 of FIG. 4 includes a control switch SW1 alternately connected to the first and second absolute value integrators 40 and 42; A differential amplifier 44 for inputting first and second integrated voltages from the first and second absolute value integrators 40 and 42; And a sample-holder 46 for sampling and holding the difference value detected by the differential amplifier 44. The control switch SW1 inputs the pixel charging voltage Vds from the liquid crystal cell CLC on the liquid crystal panel 10 of FIG. 2. The control switch SW1 alternates the pixel charging voltage Vds to the first and second absolute value integrators 40 and 42 according to the logic state of the frame switching signal FSS from the compensation timing controller 34 of FIG. 3. Supply by enemy. By the control switch SW1, the pixel charging voltage Vds is separated into a positive pixel charging voltage and a negative pixel charging voltage. The positive pixel charging voltage is supplied to the first absolute value integrator 40, and the negative pixel charging voltage is supplied to the second absolute value integrator 42. In another form, the control switch SW1 may be removed. In this case, the first and second absolute value integrators 40 and 42 input pixel charge voltages from two adjacent liquid crystal cells CLC on the liquid crystal panel 10, respectively. In this case, two pixel charge voltages output from two adjacent liquid crystal cells CLC have different polarities (that is, opposite to each other).

The first absolute value integrator 40 replaces the absolute pixel charging voltage from the control switch SW1 with the absolute value based on the common voltage Vcom from the common voltage generator 18 of FIG. 2. In addition, the absolute pixel charge voltage substituted with the absolute value is integrated. Similarly, the second absolute value integrator 42 also absolute-substitutes the negative pixel charging voltage from the control switch SW1 on the basis of the common voltage Vcom from the common voltage generator 18. The absolute-substituted negative pixel charging voltage is integrated. The positive and negative pixel charge voltages integrated by these first and second absolute value integrators 40 and 42 are supplied to the differential amplifier 44.

The differential amplifier 44 differentially amplifies the first and second absolute value integral voltages for the positive and negative pixel charge voltages from the first and second absolute value integrators 40 and 42 to differentiate the difference between the two integral voltages. Detect the voltage. The difference voltage generated by the differential amplifier 44 has a positive voltage value when the absolute value integrated voltage of the positive pixel charge voltage is greater than the absolute value integrated voltage of the negative pixel charge voltage, while the positive voltage charge voltage of the positive pixel charge voltage is increased. If the absolute value integrated voltage is less than the absolute value integrated voltage of the negative pixel charging voltage, it has a negative voltage value. The difference voltage generated in the differential amplifier 44 is supplied to the adder 32 of FIG. 3 as the compensation voltage width Vcw via the sample-holder 46.

The sample-holder 46 performs a sampling operation and a hold operation according to the logic state of the compensation value calculation control signal CDCS of FIG. 3. The difference voltage from the differential amplifier 44 is sampled in the period in which the compensation value calculation control signal CDCS maintains a specific logic (that is, a period of 10 frames from the start of the liquid crystal display). In contrast, the sampled difference voltage is held in the remaining period during which the compensation value calculating control signal CDCS maintains the basis logic. The difference voltage sampled and held by this sample-holder 46 is supplied to the adder 34 of FIG. 3 as the compensation voltage width.

5 is a block diagram schematically illustrating a liquid crystal display according to another exemplary embodiment of the present invention. In the liquid crystal display of FIG. 5, the timing controller 50 includes the common voltage controller 50A and the variable type common voltage generator 52 and the common voltage generator 18 and the common voltage compensator 20. Except having the compensation rate calculating section 54, it has the same configuration as the liquid crystal display of FIG. Components in FIG. 5 that have the same functions, effects and configurations as those in FIG. 2 will be referred to by the same name and reference numerals. In addition, a description of the configuration, operation effects and functions of the components of FIG. 5 that are identical to those of FIG. 2 will be omitted since it is clearly shown through the description of FIG.

The timing controller 50, like the timing controller 16 of FIG. 2, inputs the pixel data streams FVDs and the synchronization signals SYNC in units of frames from an external video source. By the synchronization signals SYNC, the timing controller 50 generates gate control signals GCS to be supplied to the gate driver 12 and data control signals DCS to be supplied to the data driver 14. The timing controller 50 rearranges the pixel data streams FVDs in a frame unit into pixel data streams LVDs in a line unit, and supplies the rearranged pixel data streams LVDs in a line unit to the data driver 14. do.

Additionally, timing controller 50 has a common voltage controller 50A that responds to a power enable signal PEN from an external video source. The common voltage controller 50A may have a predetermined period of time (eg, a rising edge or falling edge) from an enabling time point of the power enable signal PEN from an external video source (eg, rising edge or falling edge). The common voltage compensation period of ten frame periods is set. The common voltage compensation period corresponds to a common voltage initial setting period that occupies a predetermined period (that is, ten frame periods) from the start point of the liquid crystal display. In this common voltage compensation period, the common voltage controller 50A raises the level of the common voltage Vcom generated in the variable common voltage generator 52 by the compensation voltage width Vcw from the compensation factor calculator 54, or A lower common voltage specification data is supplied every frame period. Since the logic value of the common voltage specifying data is updated for each frame period, the common voltage Vcom output to the variable common voltage generator 52 is compensated for each frame period. In the remaining period of the remaining power enable signal PEN except the common voltage compensation period, the common voltage controller 50A continuously maintains the common voltage specifying data updated in the last frame period of the common voltage compensation period, thereby changing the variable common voltage. The level of the common voltage Vcom output from the generator 52 is set. The common voltage controller 50A compensating the common voltage Vcom may be implemented by a program executed by the timing controller 50.

The variable common voltage generator 52 generates a common voltage Vcom at a level corresponding to a logic value of the common voltage specifying data from the common voltage controller 50A in the timing controller 50. The common voltage Vcom generated by the variable common voltage generator 52 is supplied to the common voltage line Vcom on the liquid crystal panel 10. In order to generate the common voltage Vcom whose level is changed, the variable common voltage generator 52 may be configured to generate a common voltage from a nonvolatile memory (for example, EEPOM and SRAM) and a nonvolatile memory in which a plurality of common voltage data are stored. It has a digital-to-analog converter for converting voltage data into a common voltage (Vcom) in analog form. The nonvolatile memory stores a plurality of common voltage data having different level values corresponding to the number of logic values that the common voltage specifying data may have.

The compensation width calculation unit 54 integrates the pixel charging voltage Vds from the liquid crystal cell CLC on the liquid crystal panel 10 on the basis of the common voltage Vcom, so that the positive pixel charging voltage and the negative pixel charging voltage are integrated. The average value of is detected. The compensation width calculator 52 detects a difference between the average values of the detected positive and negative pixel charge voltages, and supplies the difference voltage to the common voltage controller 50A as the compensation voltage width Vcw. The compensation voltage width has a negative voltage value when the positive pixel charging voltage is greater than the negative pixel charging voltage, while the compensation voltage width has a positive voltage value when the positive pixel charging voltage is smaller than the negative pixel charging voltage. .

As such, since the common voltage Vcom is compensated for increasing or decreasing by the deviation between the positive and negative pixel charge voltages charged in the liquid crystal cell on the liquid crystal panel 10, the pixel charge voltage charged in the liquid crystal cell The deviation between positive and negative polarity can be minimized. Accordingly, the image displayed on the liquid crystal panel 10 is not deteriorated and noise such as flicker is not generated. As a result, the liquid crystal display device according to the present invention can display images of good image quality regardless of the liquid crystal panel and the use environment.

FIG. 6 is a detailed block diagram illustrating the compensation width calculator 54 shown in FIG. 5 in detail. The compensation width calculator 54 of FIG. 6 has the same configuration as the compensation voltage width detector 30 of FIG. 4. Components in FIG. 6 that have the same functions, effects and configurations as those in FIG. 4 will be referred to by the same name and reference numerals. In addition, a description of the configuration, operation effects and functions of the components of FIG. 6 that are identical to those of FIG. 4 will be omitted since it is clearly shown through the description of FIG. 4.

The analog-to-digital converter 60 converts the differential voltage from the differential amplifier 44 into differential voltage data in digital form. The difference voltage data converted by the analog-to-digital converter 60 is supplied to the common voltage controller 50A in the timing controller 50 of FIG. 5 as the compensation voltage width Vcw, so that the variable common voltage generator 52 To change the level of the common voltage Vcom.

As described above, the liquid crystal display according to the present invention and its driving In the method, since the common voltage is compensated to be higher or lower by the deviation between the positive and negative pixel charge voltages charged in the liquid crystal cell on the liquid crystal panel, the positive and negative polarities of the pixel charge voltage charged in the liquid crystal cell are compensated. Deviation can be minimized. Accordingly, the image displayed on the liquid crystal panel is not deteriorated and noise such as flicker is not generated. As a result, the liquid crystal display device according to the present invention can display images of good image quality regardless of the liquid crystal panel and the use environment.

As described above, the present invention has been limited to the embodiments shown in the accompanying drawings, which are merely exemplary, and those skilled in the art to which the present invention pertains may have the spirit and scope of the present invention. It will be apparent that various modifications, changes and equivalent other embodiments are possible without departing from the scope of the present invention. Accordingly, the technical idea and scope of the present invention to be protected must be determined by the appended claims.

Claims (16)

A liquid crystal panel comprising liquid crystal cells commonly-connected to a common voltage line; A driver which converts pixel data into pixel driving signals having alternating positive and negative polarities based on a common voltage, and supplies the converted pixel data to the liquid crystal cells; A common voltage generator configured to generate the common voltage to be supplied to the common voltage line on the liquid crystal panel; And A common voltage compensator configured to compensate the common voltage to be supplied from the common voltage generator to the common voltage line based on a pixel charge voltage charged in the liquid crystal cell, The common voltage compensator A compensation voltage width detector detecting a compensation voltage width based on the pixel charge voltage charged in the liquid crystal cell; And An adder configured to compensate a common voltage to be supplied to the common voltage line on the liquid crystal panel from the common voltage generator by the compensation voltage width; The compensation voltage width detection unit First and second integrators for integrating the pixel charging voltage from the liquid crystal cell; A divider for causing the pixel charging voltage from the liquid crystal cell to be alternately supplied to the first and second integrators; And And a differential amplifier detecting a difference voltage between the integral voltages from the first and second integrators and supplying the difference voltage to the adder. delete delete The method of claim 1, wherein the common voltage compensator An input unit configured to input a power enable signal instructing driving of the liquid crystal panel; And And a compensation timing control unit configured to control the compensation voltage width detection unit to perform a detection operation only for a predetermined period from a driving time point of the liquid crystal panel in response to the power enable signal from the input unit. Device. The method of claim 4, wherein the compensation voltage width detection unit First and second integrators for integrating the pixel charging voltage from the liquid crystal cell; A divider for causing the pixel charging voltage from the liquid crystal cell to be alternately supplied to the first and second integrators; A differential amplifier detecting a difference voltage between integral voltages from said first and second integrators; And And a sample holder for sampling the difference voltage from the differential amplifier for a predetermined period from the time of driving the liquid crystal panel and maintaining the sampled difference voltage in the remaining period under the control of the compensation timing controller. Display device. 6. The method of claim 5, And the divider causes the pixel charging voltage to be switched between the first and second integrators at every frame period. A liquid crystal panel comprising liquid crystal cells commonly-connected to a common voltage line; A driver which converts pixel data into pixel driving signals having alternating positive and negative polarities based on a common voltage, and supplies the converted pixel data to the liquid crystal cells; A variable common voltage generator configured to generate the common voltage to be supplied to the common voltage line on the liquid crystal panel; A compensation width calculator configured to calculate a compensation width of the common voltage based on a pixel driving voltage charged in the liquid crystal cell; And A common voltage controller for causing the variable type common voltage generator to adjust the level of the common voltage by the compensation width in response to the compensation width from the compensation width calculator; The compensation width calculation unit First and second integrators for integrating the pixel charging voltages from the pixels on the liquid crystal panel; A divider for causing the pixel charging voltage from the pixel on the liquid crystal panel to be alternately supplied to the first and second integrators; And And a differential amplifier detecting a difference voltage between the integral voltages from the first and second integrators and supplying the difference voltage to the common voltage controller. delete The method of claim 7, wherein And an input unit for inputting a power enable signal instructing driving of the liquid crystal panel, And the common voltage controller controls the common voltage output from the variable type common voltage generator to be regulated at a predetermined period from a driving time point of the liquid crystal panel in response to the power enable signal from the input unit. Device. The method of claim 9, And the divider causes the pixel charging voltage to be switched between the first and second integrators at every frame period. 11. The method of claim 10, And the first and second integrators include an absolute value integrator that performs absolute value-substitution and integration on the pixel charging voltage based on the common voltage from the variable type common voltage generator. Supplying pixel driving signals having alternating positive and negative polarities to liquid crystal cells commonly-connected to a common voltage line on the liquid crystal panel; Supplying a common voltage to the common voltage line on the liquid crystal panel; Compensating the common voltage supplied to the common voltage line based on a pixel charging voltage charged in the liquid crystal cell, The compensation step Detecting a compensation voltage width based on a pixel charge voltage charged in the liquid crystal cell; And Compensating the common voltage to be supplied to the common voltage line by the compensation voltage width; The compensation step And controlling the step of detecting the compensation voltage width to be performed only for a predetermined period from the driving time point of the liquid crystal panel. delete delete Supplying pixel driving signals having alternating positive and negative polarities to liquid crystal cells commonly-connected to a common voltage line on the liquid crystal panel; Supplying a common voltage to the common voltage line on the liquid crystal panel; Calculating a compensation width based on the pixel charge voltage charged in the liquid crystal cell; And Varying the level of the common voltage supplied to the common voltage line responsive to the compensation width; The level variable step And varying the level of the common voltage only for a predetermined period from the driving time of the liquid crystal panel. delete

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