KR101202506B1 - phase-change memory device, flexible phase-change memory device using insulating nano-dot and manufacturing method for the same - Google Patents

Abstract

A phase change memory device, a flexible phase change memory device using an insulating nanoparticle, and a method of manufacturing the same are provided.
A phase change memory device using an insulated nanoparticle according to the present invention is in contact with the electrode and the electrode, the phase change memory device including a phase change layer in which a phase change occurs according to the heat generated from the electrode, the crystallization with the electrode And insulating nanoparticles formed from the self-assembled block copolymer between the phase change layer in which the amorphous phase occurs.

Description

Phase-change memory device, flexible phase-change memory device using insulating nanoparticles and method for manufacturing the same {phase-change memory device, flexible phase-change memory device using insulating nano-dot and manufacturing method for the same}

The present invention relates to a phase change memory device, a flexible phase change memory device using an insulating nanoparticles, and a method of manufacturing the same. More specifically, the contact area between an electrode and a phase change material using an insulating nanoparticle obtained from a block copolymer. The present invention relates to a phase change memory device, a flexible phase change memory device using an insulating nanoparticle capable of reducing a reset current, and a method of manufacturing the same.

Phase-change memory (also known as phase-change memory or RAM, P-RAM) devices are next-generation memory semiconductors that store data by determining the phase change of a specific material. The phase change memory device uses a phase change material such as a chalcogenide compound (Ge-Sb-Te: GST) composed of germanium (Ge), antimony (Sb), and tellurium (Te). The information is stored in a manner that detects a signal of 1 when the decision state of the signal is determined to be 1 or 0 when it is not determined. Such a phase change memory device has both the advantages of flash memory, which does not erase stored information even when the power is cut off, and the stored data is lost when the power is cut off, but the DRAM has a high processing speed. However, as the integration density of semiconductor memory devices is increased, due to the limitations of photolithography technology for forming patterns and holes, an ultrafine phase change memory, particularly a fine pattern phase change memory device may be manufactured. Is very difficult.

That is, Joule-heating occurs at the interface between the lower electrode of the phase change memory and the phase change material, and the magnitude of the reset current increases in proportion to the area size of the interface. As the RESET current increases, the power consumption of the device increases accordingly (P = I ^ 2R). Therefore, it is required to structurally reduce the area of the electrode, in particular the lower electrode, in a way of reducing the RESET current. The problem here is that as the device density increases, the critical dimension (CD) decreases, which leads to the limitation of the photolithography process, which also reduces the CD of the lower electrode contact (BEC). That is, as the area between the phase change layer and the electrode is greatly reduced with the increase in capacity and integration of the memory device, it is very difficult to control the compact contact area between the phase change layer and the electrode. Therefore, there is an urgent need for a technique of controlling the required value of the reset current, which is the minimum amount of current for changing the crystal state of the phase change layer, by controlling the area between the phase change layer and the electrode.

Accordingly, an object of the present invention is to provide a novel phase change memory device and a flexible phase change memory device capable of reducing the reset current by reducing the contact area between the phase change layer and the electrode.

Another object of the present invention is to provide a method of manufacturing a new flexible phase change memory device capable of reducing the reset current by reducing the contact area between the phase change layer and the electrode.

In order to solve the above problems, the present invention is a phase change memory device comprising a phase change layer in contact with an electrode and the electrode, the phase change occurs in accordance with the heat generated from the electrode, crystallization and amorphous It provides a phase change memory device, characterized in that the insulating nanoparticles formed from the self-assembled block copolymer is provided between the phase change layer.

In one embodiment of the present invention, the electrode is a lower electrode below the phase change layer, and the patterning is performed by removing a specific polymer block of the self-assembled block copolymer.

In an embodiment of the present invention, the phase change layer and the electrode are in contact with each other in the selectively removed polymer block region, and the crystal form of the phase change layer is changed according to the heat generated in the electrode.

In one embodiment of the present invention, the phase change layer and the electrode are not in contact with the polymer block region that is not selectively removed in the block copolymer.

In one embodiment of the present invention, the block copolymer is polystyrene-polydimethylsiloxane, polystyrene-polymethylmethacrylate, polystyrene-poly (2-vinylpyridine), poly (2-vinylpyridine) -polydimethylsiloxane, polystyrene- It is any one selected from the group consisting of polyferrocenylsilane.

In one embodiment of the present invention, the block copolymer is a silicon-containing block copolymer, and the insulating nanoparticles include silicon oxide. In addition, the block copolymer is polystyrene-polydimethylsiloxane or polystyrene-polyferrocenylsilane.

The present invention also provides a flexible phase change memory device having the above-described phase change memory device on a flexible substrate.

The present invention provides a method for manufacturing a phase change memory device including a phase change layer and an electrode for applying heat to the phase change layer to generate crystallization or amorphous phase of the phase change layer material. After application, annealing to self-assemble; Removing some polymer blocks of the self-assembled block copolymer to form insulating nanoparticles; And depositing a phase change layer on the electrode and the insulating nanoparticles, wherein the phase change layer and the electrode are in contact with each other in the removed block region. do.

In one embodiment of the present invention, the method further comprises the step of laminating a brush layer on the electrode, the electrode is titanium nitride (TiN), the phase change layer is made of chalcogenide compound.

In one embodiment of the present invention, the block copolymer is polystyrene-polydimethylsiloxane copolymer, polystyrene-polymethylmethacrylate, polystyrene-poly (2-vinylpyridine), poly (2-vinylpyridine) -polydimethylsiloxane, Any one selected from the group consisting of polystyrene-polyferrocenylsilane.

The present invention provides a phase change memory device manufactured by the method described above.

The present invention also provides a flexible phase change memory device comprising: a flexible substrate; And a phase change memory device provided on the flexible substrate and including a phase change layer and a lower electrode, wherein insulating nanoparticles formed from a block copolymer are provided between the phase change layer and the lower electrode. A flexible phase change memory device is provided.

In one embodiment of the present invention, the phase change memory device comprises: a flexible silicon semiconductor;

A source / drain doping layer formed on the silicon semiconductor; A word line electrode and a bit line electrode respectively connected to the doped regions of the source / drain doped layer; And a lower electrode and a phase change layer sequentially stacked on the bit line electrode. In this case, the silicon semiconductor may be single crystal silicon.

The present invention can control the interface between the phase change material and the Joule Heating electrode (Bottom Electrode Contact) to reduce the power consumption of the phase change memory. That is, the reset current (Ireset) can be reduced by reducing the contact area (contact area) of the electrode and the phase change material by using the interface control method through the self-assembly of the block copolymer, thereby reducing the power consumption of the memory. Can be. In addition, the phase change memory device according to the present invention enables the reduction of power consumption through the reduction of the reset current, and is effective in overcoming the limitations of the photo-lithography process caused by the higher integration.

1 is a cross-sectional view of a method of manufacturing a phase change memory device according to an embodiment of the present invention.
2A through 2E are cross-sectional views of self-assembled block copolymers used in various phase change memory devices.
3A-3E are plan views of patterned block copolymers of various forms.
4 to 17 are steps of a method of manufacturing a flexible phase change memory device according to an embodiment of the present invention.
18 is a circuit diagram of the phase change memory device according to an embodiment of the present invention.
19 is a reset current and a reset resistance curve of a phase change memory device according to the present invention.
FIG. 20 is a curve illustrating the reduction of reset current as the contact area decreases.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS The present invention will now be described in detail with reference to the drawings. The following embodiments are provided as examples to ensure that the spirit of the present invention can be fully conveyed to those skilled in the art. Therefore, the present invention is not limited to the embodiments described below, but may be embodied in other forms. In the drawings, the width, length, thickness, etc. of the components may be exaggerated for convenience. Like reference numerals designate like elements throughout the specification.

The present invention solves the problem of the prior art, namely, the increased contact area between the electrode where Joule-heating occurs and a phase change material layer (hereinafter, phase change layer) such as a chalcogenide compound and thus an increase in reset current. I tried to solve. To this end, the present invention is in contact with the electrode and the electrode, in the phase change memory device including a phase change layer in which the crystal form is changed according to the Joule-Heat generated in the electrode, the electrode and the phase change layer Insulated nanoparticles are formed between the self-assembled block copolymer technology.

In the present specification, the electrode refers to an electrode in which Joule-heat is generated by the supplied electric energy, and in one embodiment of the present invention, the electrode is a lower electrode under the phase change layer, but the scope of the present invention is not limited thereto. . That is, in one embodiment of the present invention, the heat generated by the power applied by the high resistance of the electrodes on both sides of the phase change layer, the electrode to change the crystal state of the phase change layer belongs to the lower electrode.

According to the present invention, some polymer blocks remaining on the electrode reduce the contact area between the lower electrode contact and the phase change layer, thereby lowering the switching current. Furthermore, the present invention provides a flexible phase change memory device in which a phase change memory device having a reduced reset current is manufactured on a plastic substrate.

1 is a cross-sectional view of a method of manufacturing a phase change memory device according to an embodiment of the present invention.

Referring to FIG. 1, first, the brush layer 11 is laminated on the lower electrode substrate 10. The brush layer is to increase the alignment of the self-assembled structure by phase separation, a single polymer such as polystyrene (PS), polydimethylsiloxane (PDMS), poly (2-vinylpyridine) (P2VP) Can be used as a layer.

Thereafter, a block copolymer solution is coated on the coated brush layer 11. The block copolymer may be polystyrene-polydimethylsiloxane copolymer, polystyrene-polymethylmethacrylate, polystyrene-poly (2-vinylpyridine), poly (2-vinylpyridine) -polydimethylsiloxane, polystyrene-polyferrocenylsilane And the like can be used. Especially. Unlike organic based block copolymers, polydimethylsiloxane or polyferrocenylsilane contains inorganic materials such as silicone. In this case, the block copolymer containing the inorganic material forms insulating nanoparticles of inorganic oxides such as SiOx and FeSixOy by an oxygen plasma etching process. As a result, an inorganic-based insulating nanoparticle having excellent insulation, chemical resistance, and mechanical properties may be provided between the electrode and the phase change layer, thereby manufacturing a reliable phase change memory device.

Toluene, heptane, acetone, DMF, pentanol, and the like may be used as a solvent of the above-mentioned block copolymer solution.

Thereafter, the coated block copolymer 12 is self-assembled through an annealing process. In an embodiment of the present invention, the annealing may be performed by solvent annealing or thermal annealing. Thermal annealing is performed by heat treatment for 1 minute to several days at a temperature of room temperature to 300 ° C. in a vacuum or air state. Through the annealing process, the polymer blocks are aligned in a predetermined shape, and each block polymer has a block domain having a predetermined size and shape.

The self-assembled block copolymer is patterned. The patterning removes certain polymer blocks 13 in the self-assembled block copolymer. This leaves only another specific polymer block 14 on the electrode substrate 10, which reduces the contact area between the phase change layer and the electrode (here substrate 10). In the present invention, the patterning may be performed through a lift-off or etching process, and the etching may be performed both in dry and wet ship etching. In the dry etching method, two-step plasma etching using carbon tetrafluoride (CF4) and oxygen may be used, and in the wet etching method, BOE or hydrogen peroxide etchant may be used. In particular, the silicon-containing polymer block is oxidized to silicon oxide in the form of nanoparticles by oxygen plasma etching, and the oxidized silicon oxide nanoparticles have excellent insulation properties, mechanical properties, and chemical resistance properties. It can be manufactured and used.

2A through 2E are cross-sectional views of self-assembled block copolymers used in various phase change memory devices.

2A to 2E, the self-assembled block copolymer 25 according to the present invention is laminated and coated between the lower electrode BEC 20 and the phase change layer 30, and then patterned through an etching process. The insulating nanoparticles formed by this minimize the contact area between the phase change layer 30 and the electrode 20. Such block copolymer-based insulating nanoparticles according to the present invention can be applied in various sizes and shapes.

3A-3E are plan views of patterned block copolymers of various forms.

3A to 3E, since the block copolymer is applied in a solution state and then self-assembled, the block copolymer may be patterned in a predetermined shape on the substrate regardless of the device size and shape. In FIG. 3A, the block copolymer remains on a square electrode in the form of nano dots or nanoparticles of a predetermined size, and in FIG. 3B, the block copolymer block remains on a straight electrode.

As described above, the present invention is annealed after the liquid block copolymer is applied, and thus, the patterned block copolymer-based insulating nanoparticles may be provided on the electrode, regardless of the size or shape of the substrate.

Another embodiment of the present invention provides a method for manufacturing a flexible phase change memory device using the above-described method and a flexible phase change memory device manufactured thereby. That is, an embodiment of the present invention provides a method of manufacturing a flexible phase change memory device in which a phase change memory device substrate is transferred to a flexible substrate, and a flexible phase change memory device provided on the flexible substrate. This effectively overcomes the substrate limitations associated with the manufacture of memory devices and can extend the range of device applications.

4 to 17 are steps of a method of manufacturing a flexible phase change memory device according to an embodiment of the present invention.

4, the bulk silicon layer 100 of the lower; Insulating layer 110; And a silicon on insulator (SOI) substrate sequentially stacked on the upper silicon layer 120 of a single crystal. A source / drain doping layer 130 doped with a p-type impurity and an n-type impurity is formed in the upper silicon layer 120. In an embodiment of the present invention, the source / drain doping layer is formed in the upper silicon layer 120. There are a plurality of 130. The source / drain doped layer forms a PN junction diode, and the source / drain doped layer 130 and the corresponding upper silicon substrate 120 constitute one memory device substrate. That is, the present invention manufactures a flexible phase change memory device by fabricating a basic device substrate (ie, a PN diode substrate) of a phase change memory device on a silicon substrate and transferring the same onto a flexible substrate.

Referring to FIG. 5, the upper silicon layer 120 around the impurity doped region is etched (first etching), and the etching layer exposes the insulating layer around the impurity doped region (ie, the memory device substrate). In particular, in one embodiment of the present invention, the first etching does not etch all of the periphery of the memory device substrate. When etching all of the periphery of the memory device substrate, since the alignment state of the device substrate is shaken, the memory device substrate 130 is preferably connected to at least the upper silicon layer 120 through a predetermined bridge structure. Do. For example, in FIG. 5, four etching lines are formed around the memory device substrate, and each etching line may not be connected to each other.

Referring to FIG. 6, the insulating layer exposed around the memory device substrate, which is the impurity doped region, is boiling-etched. This separates the memory device substrate (ie, the source / drain doped layer 130 and the corresponding upper silicon layer 120) from the lower bulk silicon layer 100. However, the memory device substrate is still aligned by the peripheral upper silicon layer 120 connected to the memory device substrate.

The upper silicon layer 120 preferably has a thickness condition that may have a flexible characteristic, and has a semiconductor characteristic. Therefore, the upper silicon layer 120 may be referred to as a flexible silicon semiconductor, and has a single crystal crystal structure. The single crystal silicon semiconductor can be transferred from an SOI substrate as in the present embodiment, or alternatively, can be manufactured by laser treatment of an amorphous silicon substrate.

Referring to FIG. 7, the memory device substrate is then transferred to the plastic substrate 210, which is a flexible substrate. The transfer may be performed by attaching the memory device substrate to a transfer layer such as polydimethylsiloxane (PDMS), and then transferring the memory device substrate back to the plastic substrate 210. The plastic substrate 210 may include an adhesive layer such as polyimide ( 200) may be applied. Therefore, the memory device substrate is separated from the transfer layer or the transfer substrate (not shown) according to the adhesion of the adhesive layer 200 and the memory device substrate.

Referring to FIG. 8, a metal electrode 220 is stacked on the source / drain doped layer 130. In one embodiment of the present invention, the metal electrode is connected to each of the source and drain regions, each of which constitutes a word line and a bit line of a memory device.

Referring to FIG. 9, a lower electrode 240 is stacked on the metal electrode 220 connected to the source / drain doping layer 130 on the flexible silicon semiconductor 120. In the present invention, the lower electrode 240 is made of a material that generates heat by a resistance when a voltage is applied. For example, titanium nitride (TiN) may be used as the lower electrode 240.

Referring to FIG. 10, a first insulating layer 250 is stacked on the substrate and then patterned. A portion of the lower electrode 240 is exposed by the patterning.

Referring to FIG. 11, after the self-assembled block copolymer thin film is stacked on the lower electrode 240, some blocks are etched. As a result, the insulating nanoparticles 260 having a predetermined dot shape remain on the lower electrode 240. The above-described block copolymer lamination-self-assembly-etching process is as described above with reference to FIG. 1, and the exposed area of the lower electrode is reduced through the process of FIG. 12. Furthermore, the present invention can be effectively applied to an integrated memory device since the block copolymer is applied in a solution state, then annealed and etched again. In addition, during the block copolymer etching process, the first insulating layer 250 functions as an etching mask layer. In one embodiment of the present invention, the insulating nanoparticles provided on the lower electrode 240 were silicon oxide nanoparticles which are inorganic oxides formed from oxidized polydimethylsiloxane. Therefore, polystyrene-polydimethylsiloxane block copolymer was used as the block copolymer to be applied on the electrode, and polystyrene was removed by oxygen plasma, thereby leaving only the silicon oxide nanoparticles in the form of dots on the lower electrode. At this time, the excellent mechanical and chemical resistance characteristics of the inorganic oxide enable a stable and durable phase change memory device.

Referring to FIG. 12, a phase change layer 270 made of a phase change material is stacked on the lower electrode 240 and the insulating nanoparticles 260. In one embodiment of the present invention, the phase change material was a chalcogenide compound (Ge-Sb-Te: GST) consisting of germanium (Ge), antimony (Sb) and tellurium (Te), and the phase change according to the present invention. The memory device uses a crystalline state of a phase change material, and stores information in a manner of detecting a signal of 1 when the crystalline state of the phase change material is crystalline and 0 when it is amorphous.

In particular, the present invention minimizes the contact area between the phase change material and the electrode by providing insulating nanoparticles obtained by self-assembly and patterning the block copolymer thin film between the phase change layer 270 and the lower electrode 240. This can lead to a reduction in the reset current.

Referring to FIG. 13, another electrode 220 is stacked on the phase change layer 270. As a result, two electrodes are formed with the phase change layer 270 interposed therebetween. In particular, heat generated from the lower electrode having higher resistance changes the crystal form of the phase change layer 270.

Referring to FIG. 14, a word line 310 is connected to a memory device electrode on which a phase change layer 270 is not stacked. The word line 310 is formed by patterning a first insulating layer and then depositing and patterning a metal layer.

Referring to FIG. 15, a second insulating layer 320 is stacked on the substrate and then patterned. As a result, the phase change layer connected to the bit line, more precisely, the second metal adhesive layer 231, is exposed to the outside.

Referring to FIG. 16, a bit line 330 is connected to the second metal adhesive layer 230.

Referring to FIG. 17, a third insulating layer 340 is stacked on the device substrate to cover the bit line 330. As a result, a phase change memory device capable of storing information according to a crystal state of a phase change material is completed, and the phase change memory device may be a self-assembled and selectively patterned block copolymer mask. In addition, the contact area between the device electrode and the phase change material can be reduced and controlled. Accordingly, it is possible to implement a phase change memory device having a reset current less than that of the phase change memory device according to the prior art.

FIG. 18 is a circuit diagram of the phase change memory device according to an embodiment of the present invention, FIG. 20 is a reset current and a reset resistance curve of the phase change memory device according to the present invention, and FIG. 21 is a contact area reduction. The curve illustrating the reduction of reset current according to.

19 and 20, the patterned block copolymer is provided between the phase change layer and the lower electrode, and as the contact area is reduced, the reset current decreases and the reset resistance increases.

Although the above has been described with reference to the preferred embodiment of the present invention, those skilled in the art can variously modify and change the present invention without departing from the spirit and scope of the present invention described in the claims below. You will understand.

Claims (17)

In the method of manufacturing a phase change memory device comprising a phase change layer and an electrode to generate heat or crystallization of the phase change layer material by applying heat to the phase change layer,
Applying a silicon-containing block copolymer onto the electrode, followed by annealing to self-assemble;
Removing some polymers of the self-assembled block copolymer by an oxygen plasma process, and oxidizing the silicon-containing block polymer by the oxygen plasma process to form silicon nanoparticles on the electrode; And
And depositing a phase change layer on the electrode and the silicon nanoparticles, wherein the phase change layer and the electrode are in contact with each other in the removed block region. The method of claim 1, wherein the phase change memory device is manufactured by:
After applying the block copolymer, before the step of annealing and self-assembly, further comprising the step of laminating a brush layer on the electrode. The method of claim 1,
The electrode is a titanium nitride (TiN), the phase change layer is a manufacturing method of a phase change memory device, characterized in that consisting of chalcogenide compound. The method of claim 1,
The block copolymer may be polystyrene-polydimethylsiloxane copolymer, polystyrene-polymethylmethacrylate, polystyrene-poly (2-vinylpyridine), poly (2-vinylpyridine) -polydimethylsiloxane, polystyrene-polyferrocenylsilane The method of manufacturing a phase change memory device, characterized in that any one selected from the group consisting of. A phase change memory device manufactured by the method of manufacturing a phase change memory device according to any one of claims 1 to 4.
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