KR101148601B1

KR101148601B1 - IC Module and Method of Manufacturing the same, and Embedded Printed Circuit Board using IC Module and Method of Manufacturing the same

Info

Publication number: KR101148601B1
Application number: KR1020100064385A
Authority: KR
Inventors: 신이나; 이승은
Original assignee: 삼성전기주식회사
Priority date: 2010-07-05
Filing date: 2010-07-05
Publication date: 2012-05-25
Also published as: JP5226111B2; JP2012015521A; KR20120003658A

Abstract

The present invention relates to an IC module, a method for manufacturing the same, and an embedded printed circuit board using the IC module and a method for manufacturing the same, the chip including an electrode pad formed on an upper surface thereof; A passivation layer including a hole formed through patterning and formed on an entire surface of the upper surface of the chip; A copper seed layer formed on the entire upper surface of the passivation layer including the hole; Including a plating layer formed on the entire upper surface of the copper seed layer; electrically connects the embedded electronic component and the substrate package through the patterning, fine pitch (Fine Pitch) is possible, it is possible to simplify the process, This can be expected to reduce the process cost.

Description

IC Module and Method of Manufacturing the same, and Embedded Printed Circuit Board using IC Module and Method of Manufacturing the same} IC Module and Manufacturing Method Thereof and Embedded Printed Circuit Board Using IC Module

The present invention relates to an IC module, a method for manufacturing the same, and an embedded printed circuit board using the IC module and a method for manufacturing the same.

In order to cope with the trend of light weight, miniaturization, high speed, multifunction, and high performance of electronic products, embedded PCB technology is being developed in which a device is embedded in a printed circuit board (PCB).

To implement an embedded PCB, the most important technique is to enable electrical conduction after the embedding process through the device's package.

The electrical conduction method determines the thickness and performance of the internal package.

A common electrical conduction method used in substrate processing is a method of forming a hole between a bump and an upper layer by using a wafer after embedding a wafer and electrically conducting it.

In the manufacture of PCB for the purpose of embedding the device, the through hole like cavity is formed to embed the device in the core layer, and the heat resistant dust-free tape is attached to one side of the core board for temporary fixing of the device. After lamination of the insulating layer, the dust-free tape is removed.

The insulating layer is laminated again on the tape-coated surface, holes are formed, and the substrate of the device is electrically connected by plating. A circuit pattern is formed on the plating surface, and a printed circuit board including an electronic device is manufactured by using a multilayer printed circuit board manufacturing process.

In this case, the IC forms a Re-Distribution Layer (RDL) in the case of a wafer level package (WLP) process and a bumping process, and establishes an interconnection with an external device (for example, a substrate or a chip). The pad portion is opened through a photolithography process.

Accordingly, the outermost passivation layer must be opened by performing a photolithography process, an exposure process, and a development process to connect to the outside.

Accordingly, in a method of manufacturing a wafer level package according to the related art, an insulating layer is laminated on a semiconductor chip having an electrode pad opened by a protective layer, and an insulating layer is stacked on the electrode pad and the insulating layer. It may be formed to electrically connect the electrode pad and the seed layer. After forming a plating resist for forming a redistribution pattern electrically connected to the electrode pad, and electroplating the seed layer with the electrode to form a redistribution pattern, the plating resist and the redistribution pattern to the outside using a mask Etch the open seed layer. Thereafter, an insulating layer for opening part of the redistribution pattern is stacked.

Therefore, the present invention was devised to solve the above-mentioned problems, and an IC module for simplifying a substrate manufacturing process by electrically connecting an embedded electronic component and a substrate package through patterning, an embedded method using the same, and a manufacturing method thereof Its purpose is to provide a printed circuit board and a method of manufacturing the same.

Embedded printed circuit board of the present invention for achieving the above object, the cavity is formed core layer; An IC module mounted in a cavity of the core layer and having an electrode formed on a surface thereof by a copper plating layer (a); An insulating layer laminated on an upper surface of the core layer including an upper surface of the IC module; And a circuit layer formed on an upper surface of the insulating layer and a lower surface of the core layer, wherein an electrode provided in the IC module includes a copper plating layer (a) of the IC module when the circuit is formed by patterning the circuit layer. This is achieved by patterning and electrically connecting simultaneously with the circuit layer formed on the lower surface of the core layer.
Here, it is preferable that the plating layer (a) consists of copper.
In addition, the circuit layer may be made of copper.
The IC module includes a chip having an electrode pad formed on an upper surface thereof; A passivation layer including a hole formed through patterning and formed on an entire surface of the upper surface of the chip; A copper seed layer formed on the entire upper surface of the passivation layer including the hole; And a copper plating layer stacked on the copper seed layer, wherein the copper plating layer is formed as an electrode by patterning the circuit layer.
The circuit layer may be integrally bonded to the copper plating layer formed on the lower surface of the IC module and simultaneously patterned.
On the other hand, the method of manufacturing an embedded printed circuit board according to the present invention comprises the steps of: arranging a core layer having a cavity; Mounting an IC module having a copper plating layer formed in the cavity; Forming an insulating layer on an upper surface of the core layer including the IC module; Stacking a copper foil on the insulating layer; Forming a copper plating layer by performing copper plating on the upper surface of the copper foil and the lower surface of the core layer; And patterning a copper plating layer formed on a lower surface of the core layer to form a circuit layer integral with an electrode of the IC module.
Here, in the step of laminating the copper foil on the insulating layer, the copper foil may be formed by chemical copper plating or electrocopper plating.
Before mounting the IC module, the IC module may include forming a passivation layer on an upper surface of the chip; Forming a hole in the passivation layer through patterning to expose a portion of the electrode pattern; Forming a copper seed layer on an upper surface of the passivation layer including the hole; And forming a copper plating layer by performing plating on the entire upper surface of the copper seed layer.
In the forming of the circuit layer, a circuit may be formed by simultaneously patterning a copper plating layer of the IC module and a copper plating layer laminated on a lower surface of the core layer.
In addition, before the step of laminating the copper foil, forming an insulating layer on the upper surface of the core layer; may further include.

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The embedded printed circuit board and its manufacturing method using the IC module of the present invention electrically connect the embedded electronic component and the substrate package through patterning, so that fine pitch is possible and the process can be simplified. As a result, it can be expected that the process cost can be reduced.

In addition, the present invention has the advantage that the process can be simplified by omitting the exposure process and the development process that had to be performed in the existing RDL process.

1 to 5 are cross-sectional views sequentially showing a manufacturing process of the IC module according to the present invention;
6 to 14 are cross-sectional views sequentially illustrating a manufacturing process of an embedded printed circuit board according to the present invention.

Hereinafter, embodiments of the present invention will be described in detail with reference to an embedded printed circuit board. The following embodiments are provided as examples to sufficiently convey the spirit of the present invention to those skilled in the art. Accordingly, the invention is not limited to the embodiments described below and may be embodied in other forms. In the drawings, the size and thickness of the device may be exaggerated for convenience. Like reference numerals designate like elements throughout the specification.

1 to 5 are cross-sectional views sequentially showing a manufacturing process of the IC module according to the present invention.

As shown in FIG. 5, the IC module 10 applied to the present invention includes a chip 11, a passivation layer 13, a copper seed layer 17, and a plating layer 21.

In more detail, as illustrated in FIG. 1, an electrode pad may be formed on an upper surface of the chip 11.

As shown in FIG. 3, the passivation layer 13 may include a hole 15 formed through patterning and may be formed on the entire upper surface of the chip 11.

As shown in FIG. 4, a copper seed layer 17 may be formed on the entire upper surface of the passivation layer 13 including the hole 15.

For example, as shown in Figure 4, the copper seed layer is applied along the outer surface of the chip.

The plating layer 21 may be formed on the entire upper surface of the copper seed layer 17.

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The plating layer 21 may be made of copper.

Here, since the plating layer 21 is formed on the upper surface of the copper seed layer 17, that is, the form is formed on the entire surface of the upper portion of the chip, a separate process (for example, a redistribution layer forming process, an exposure and a developing process) is performed. Etc.), the process of inserting the IC module 10 into the core layer to be described later and forming a circuit in the plating layer may simultaneously perform redistribution layer formation connected to the electrode of the chip 11 on the core layer. Therefore, the effect of interconnection with the circuit layer on the chip electrode and the core layer can be expected.

6 to 14 are cross-sectional views sequentially illustrating a manufacturing process of an embedded printed circuit board according to the present invention.

The embedded printed circuit board 100 according to the present invention includes a core layer 110, an IC module 10, an insulating layer 116, and a circuit layer 119.

In more detail, the core layer 110 may be formed with a cavity 112 for mounting the IC module 10.

The IC module 10 may be mounted in the cavity 112.

Here, the IC module 10 includes a chip 11 having an electrode pad formed thereon, a hole 15 formed through patterning, and a passivation layer 13 and a hole 15 formed on the entire upper surface of the chip. Copper seed layer (Cu Seed Layer) 17 formed on the entire upper surface of the protective film layer 13 including a), may include a plating layer 21 formed on the entire upper surface of the copper seed layer (17).

Here, the plating layer 21 may be made of copper.

The insulating layer 116 may be formed on the upper surface of the circuit layer 119.

The circuit layer 119 may be formed on the upper and lower surfaces of the core layer.

Here, the circuit layer 119 may be made of copper.

Meanwhile, the circuit layer 119 may be simultaneously formed on the copper plating layer of the IC module 10 and the copper plating layer laminated on the lower surface of the IC module 10.

This is to form a circuit in the copper plating layer of the IC module 10 and the copper plating layer laminated on the lower surface of the IC module 10 in one step.

Hereinafter, a manufacturing method of the IC module 10 will be described with reference to FIGS. 1 to 5.

First, as shown in FIG. 1, the chip 11 in which the electrode pattern was formed is provided.

As shown in FIG. 2, a passivation layer 13 may be formed on the upper surface of the chip 11.

Subsequently, a hole 15 may be formed in the passivation layer to expose a portion of the electrode pattern.

As shown in FIG. 4, a copper seed layer 17 may be formed on an upper surface of the passivation layer 13 including the hole 15.

As shown in FIG. 5, plating 21 may be performed on the entire upper surface of the copper seed layer 17.

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Here, the plating 21 layer may be made of copper.

6 to 14, a manufacturing method of the embedded printed circuit board 100 will be described.

First, as shown in FIG. 6, the core layer 110 in which the cavity 112 was formed is arrange | positioned.

Then, as shown in FIGS. 7 to 8, a taping process for etching the copper layer and mounting the IC module is performed.

As shown in FIG. 9, the IC module 10 can be mounted in the cavity 112.

As shown in FIG. 10, the insulating layer 116 may be formed on the upper surface of the core layer 110.

Thereafter, the copper foil 119 may be laminated.

As shown in FIG. 11, the taping formed on the lower surface of the core layer 11 can be removed.
In this case, the copper foil 119 may be formed on the lower surface of the insulating layer 116 and the core layer 11, and may be formed by chemical copper plating or electro copper plating.

As shown in FIG. 12, copper plating may be performed on the upper and lower surfaces of the core layer 110.

On the other hand, the IC module 10 includes a copper plating layer (a of FIG. 14) formed on the lower front surface. As a result, an embedded printed circuit board having a copper plating layer formed on the IC module 10 and a copper plating layer formed on the upper and lower surfaces of the core layer 110 up to the present process may have a copper plating layer laminated on the lower surface twice.

Subsequently, a circuit layer can be formed. Here, the circuit layer may simultaneously form a circuit on the copper plating layer of the IC module 10 and the copper plating layer laminated on the lower surface of the IC module 10.

Since the circuit is formed on the copper plating layer included in the IC module 10 and the copper plating layer laminated on the lower surface of the IC module 10 in one step, an effect of simplifying the process procedure when manufacturing an embedded printed circuit board can be expected. have.

FIG. 14 illustrates a structure in which another layer is laid up on the embedded printed circuit board on which the circuit of FIG. 13 is formed, connected through vias, and a circuit is formed.

Preferred embodiments of the present invention described above are disclosed for the purpose of illustration, and various substitutions, modifications, and changes within the scope without departing from the spirit of the present invention for those skilled in the art to which the present invention pertains. It will be possible, but such substitutions, changes and the like should be regarded as belonging to the following claims.

10: IC module
11: chip
13: protective film layer
15: Hall
17: copper seed layer
21: plating layer
100: embedded printed circuit board
110: core
112: Cavity
116: insulation layer
119: circuit layer

Claims

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A core layer in which a cavity is formed;
An IC module mounted in a cavity of the core layer and having an electrode formed on a surface thereof by a copper plating layer (a);
An insulating layer laminated on an upper surface of the core layer including an upper surface of the IC module; And
It consists of a circuit layer formed on the upper surface of the insulating layer and the lower surface of the core layer,
The electrode provided in the IC module is an embedded printed circuit board in which a copper plating layer (a) of the IC module is patterned and electrically connected simultaneously with the circuit layer formed on the lower surface of the core layer when the circuit is formed by patterning the circuit layer. .

The method of claim 3,
The circuit layer is an embedded printed circuit board made of copper.

The method of claim 4, wherein
The IC module includes a chip having an electrode pad formed on an upper surface thereof; A passivation layer including a hole formed through patterning and formed on an entire surface of the upper surface of the chip; A copper seed layer formed on the entire upper surface of the passivation layer including the hole; And a copper plating layer laminated on the copper seed layer.
The copper plating layer is an embedded printed circuit board formed as an electrode by the patterning of the circuit layer.

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The method of claim 5,
The circuit layer,
An embedded printed circuit board formed simultaneously on the copper plating layer of the IC module and the copper plating layer laminated on the lower surface of the IC module.

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Disposing a core layer having a cavity formed thereon;
Mounting an IC module having a copper plating layer formed in the cavity;
Forming an insulating layer on an upper surface of the core layer including the IC module;
Stacking a copper foil on the insulating layer;
Forming a copper plating layer by performing copper plating on the upper surface of the copper foil and the lower surface of the core layer; And
Patterning a copper plating layer formed on a lower surface of the core layer to form a circuit layer integral with an electrode of the IC module;
Embedded printed circuit board manufacturing method comprising a.

The method of claim 11,
Before the step of mounting the IC module,
The IC module,
Forming a passivation layer on an upper surface of the chip;
Forming a hole in the passivation layer through patterning to expose a portion of the electrode pattern;
Forming a copper seed layer on an upper surface of the passivation layer including the hole; And
Forming a copper plating layer by performing plating on the entire upper surface of the copper seed layer.

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The method of claim 12,
Forming the circuit layer,
And forming a circuit simultaneously on a copper plating layer of the IC module and a copper plating layer laminated on a lower surface of the IC module.

The method of claim 14,
Before the step of laminating the copper foil,
Forming an insulating layer on an upper surface of the core layer;
Embedded printed circuit board manufacturing method further comprising.