201230276 六、發明說明： 【發明所屬之技術領域】 [0001] 本發明係有關一種封裝基板及其製法，尤指一種較 為環保之封裝基板及其製法。 【先前技#ί】 [0002] 隨著電子產業的蓬勃發展，電子產品亦逐漸進入多 功能、高性能的研發方向。為滿足半導體封裝件高積集 度（integration)以及微型化（miniaturization)的封 裝要求，提供多數主被動元件及線路連接之封裝基板亦 逐漸由單層板演變成多層板，以便在有限的空間下，藉 由層間連接技術（i nter layer connect ion)擴大電路板 上可利用的佈線面積而配合高電子密度之積體電路 (integrated circuit)需求。 [0003] 習知具有多層線路層之半導體封裝件係先在封裝基 板表面形成例如銲錫凸塊的外部電性連接結構，再將半 導體晶片覆晶（flip chip)接合於該銲錫凸塊，最後， 於該封裝基板之背面植以錫球以對其他電子裝置進行電 性連接。 [0004] 請參閱第1A至1J圖，係習知具多層線路層之封裝基 板及其製法之剖視圖。 [0005] 如第1A圖所示，提供一核心板10，係具有相對應之 二表面101，於至少一該表面101上具有内層線路11。 [0006] 如第1B圖所示，於該表面101及内層線路11上形成介 電層12。 100100813 表單編號A0101 第4頁/共21頁 1002001479-0 201230276 [0007] 如第1C圖所示，以雷射燒灼該介電層12以形成複數 盲孔120，令部份該内層線路11外露於該盲孔120。 [0008] 如第1D圖所示’於該介電層12與内層線路11上形成 導電層13。 [0009] 如第1Ε圖所示，於該導電層13上形成光阻層14。 [0010] 如第1F圖所示’圖案化該光阻層14以形成複數開口 區140，令部份該盲孔120對應該開口區14{)。 [0011] Ο 如第1G圖所示’於該介電層12上的導電層13上電鍍 形成線路層151，並於該盲孔120中的導電層13上電鑛形 成導電盲孔152，以電性連接該線路層151輿内層線路u 〇 · ··' [0012] 如第1H圖所示，移除該光阻層14及其所覆蓋的導電 層1 3。 [0013] 如第11圖所示，於該線路層151與介電層12上形成絕 緣保護層1 6 ^ [0014] 如第1J圖所不’圖案化該絕緣保護層16以形成複數 絕緣保護層開孔m，令部份該線路層151外露於該絕緣 保護層開孔160。 [0015] 准習知封裝基板之製法必須以雷射加工形成盲孔 ，而造成整體加工時間過長；此外，習知之光阻層最終 都需要以化學藥劑清除，因此將額外產生許多不環保的 事業廢棄物。 [0016] 因此，如何避免習知技術中之封裝基板的整體加工 100100813 表單編號A〇101 第5頁/共21頁 M 1002001479-0 201230276 實已成為目前亟欲 [0017] [0018] [0019] [0020] [0021] 時間過長與事業廢棄物過多等問題， 解決的課題。 【發明内容】 鑑於上述習知技術之種種缺失，本發明之主要目的 係提供一種較為環保之封裝基板及其製法。 為達上述及其他目的，本發明揭露一種封裝基板， 係包括：核心板，係具有相對應之二表面，於至少一該 表面上具有内層線路；第一感光性介電層，係設於該表 面及内層線路上，且該第一感光性介電層具有複數開孔 ，令部份該内層線路外露於該開孔；第二感光性介電層 ，係設於該第一感光性介電層上，且該第二感光性介電 層具有複數線路槽，其中，部份該線路槽外露該開孔； 導電盲孔，係設於該開孔中，並電性連接至該内層線路 ;以及線路層，係設於該線路槽中，並電性連接該導電 盲孔，以令該線路層電性連接至該内層線路。 前述之封裝基板中，復可包括導電層，係設於該導 電盲孔與内層線路之間、導電盲孔與第一感光性介電層 之間、線路層與第一感光性介電層之間、以及線路層與 第二感光性介電層之間。 依上述之封裝基板，復可包括絕緣保護層，係設於 該第二感光性介電層及線路層上，且於該絕緣保護層具 有複數絕緣保護層開孔，令部份該線路層外露於該絕緣 保護層開孔。 於本發明之封裝基板中，復可包括線路增層結構， 100100813 表單編號A0101 第6頁/共21頁 1002001479-0 201230276 [0022] Ο201230276 VI. Description of the Invention: [Technical Field of the Invention] [0001] The present invention relates to a package substrate and a method of manufacturing the same, and more particularly to a package substrate which is more environmentally friendly and a method of manufacturing the same. [Previous technology #ί] [0002] With the rapid development of the electronics industry, electronic products have gradually entered the direction of multi-functional, high-performance research and development. In order to meet the high integration and miniaturization packaging requirements of semiconductor packages, most active and passive components and circuit-connected package substrates have gradually evolved from single-layer boards to multi-layer boards in a limited space. The inter-layer connection is used to expand the available wiring area on the board to match the high electron density integrated circuit requirements. [0003] A semiconductor package having a multilayer wiring layer is formed by first forming an external electrical connection structure such as a solder bump on a surface of a package substrate, and then flip-chip bonding a semiconductor wafer to the solder bump. Finally, Tin balls are implanted on the back surface of the package substrate to electrically connect other electronic devices. [0004] Referring to Figures 1A through 1J, there are shown cross-sectional views of a conventional package substrate having a multilayer wiring layer and a method of fabricating the same. As shown in FIG. 1A, a core board 10 is provided having a corresponding two surfaces 101 having an inner layer line 11 on at least one of the surfaces 101. As shown in FIG. 1B, a dielectric layer 12 is formed on the surface 101 and the inner layer line 11. 100100813 Form No. A0101 Page 4 of 21 1002001479-0 201230276 [0007] As shown in FIG. 1C, the dielectric layer 12 is fired by laser to form a plurality of blind holes 120, so that part of the inner layer line 11 is exposed. The blind hole 120. [0008] A conductive layer 13 is formed on the dielectric layer 12 and the inner layer line 11 as shown in FIG. 1D. [0009] As shown in FIG. 1, a photoresist layer 14 is formed on the conductive layer 13. [0010] The photoresist layer 14 is patterned as shown in FIG. 1F to form a plurality of open regions 140 such that a portion of the blind vias 120 correspond to the open regions 14{). [0011] 线路 as shown in FIG. 1G, a wiring layer 151 is formed on the conductive layer 13 on the dielectric layer 12, and a conductive blind hole 152 is formed on the conductive layer 13 in the blind via 120 to form a conductive blind via 152. Electrically connecting the circuit layer 151 to the inner layer line u 〇 · · · ' [0012] As shown in FIG. 1H, the photoresist layer 14 and the conductive layer 13 covered thereby are removed. [0013] As shown in FIG. 11, an insulating protective layer is formed on the wiring layer 151 and the dielectric layer 12. [0014] The insulating protective layer 16 is patterned as shown in FIG. 1J to form a plurality of insulating protection layers. The layer opening m is such that a part of the circuit layer 151 is exposed to the insulating protective layer opening 160. [0015] The conventional method for manufacturing a package substrate must be formed by laser processing to form a blind hole, which causes the overall processing time to be too long; in addition, the conventional photoresist layer needs to be removed by a chemical agent, so that an extra environmentally-friendly one is generated. Business waste. [0016] Therefore, how to avoid the overall processing of the package substrate in the prior art 100100813 Form No. A〇101 Page 5 of 21 M 1002001479-0 201230276 has become the current desire [0017] [0019] [0020] [0021] Problems such as excessive time and excessive business waste, and problems to be solved. SUMMARY OF THE INVENTION In view of the above various deficiencies of the prior art, the main object of the present invention is to provide a more environmentally friendly package substrate and a method of fabricating the same. To achieve the above and other objects, the present invention discloses a package substrate, comprising: a core plate having corresponding surfaces, having an inner layer line on at least one of the surfaces; and a first photosensitive dielectric layer disposed thereon On the surface and the inner layer, the first photosensitive dielectric layer has a plurality of openings, so that a portion of the inner layer is exposed to the opening; and the second photosensitive dielectric layer is disposed on the first photosensitive dielectric On the layer, the second photosensitive dielectric layer has a plurality of circuit trenches, wherein a portion of the circuit trench exposes the opening; a conductive blind via is disposed in the opening and electrically connected to the inner layer wiring; And the circuit layer is disposed in the circuit slot and electrically connected to the conductive blind hole to electrically connect the circuit layer to the inner layer circuit. In the foregoing package substrate, the conductive layer may be disposed between the conductive blind via and the inner layer line, between the conductive blind via and the first photosensitive dielectric layer, and between the circuit layer and the first photosensitive dielectric layer. Between, and between the circuit layer and the second photosensitive dielectric layer. According to the above package substrate, the insulating protective layer is provided on the second photosensitive dielectric layer and the circuit layer, and the insulating protective layer has a plurality of insulating protective layer openings, so that part of the circuit layer is exposed. Opening the insulating protective layer. In the package substrate of the present invention, the complex includes a line build-up structure, 100100813 Form No. A0101 Page 6 of 21 1002001479-0 201230276 [0022]
[0023] [0024] 係設於該第二感光性介電層與線路層上，該線路增層結 構係包括至少一介電層、設於該介電層上的增層線路層 、及設於該介電層中的增層導電盲孔，該增層導電盲孔 將該增層線路層電性連接至線路層。 本發明復提供一種封裝基板之製法，係包括：提供 一核心板，係具有相對應之二表面，於至少一該表面上 具有内層線路；於該表面及内層線路上形成第一感光性 介電層，且圖案化該第一感光性介電層以形成複數開孔 ，令部份該内層線路外露於該開孔；於該第一感光性介 電層上形成第二感光性介電層，該第二感光性介電層具 有複數線路槽，其中，部份該線路槽外露該開孔；於該 開孔中、該線路槽中、及該第二感光性介電層上形成金 屬層；以及薄化該金屬層至該第二感光性介電層之上， 俾使該金屬層齊平於該第二感光性介電層，且該線路槽 内之金屬層作為線路層，及該開孔中之金屬層作為導電 盲孔，令該線路層藉由該導電盲孔電性連接至該内層線 路。 依上所述之封裝基板之製法，復可包括於該第二感 光性介電層及線路層上形成絕緣保護層，且於該絕緣保 護層中形成複數絕緣保護層開孔，令部份該線路層外露 於該絕緣保護層開孔。 前述之封裝基板之製法中，該金屬層之製法係可包 括：於該開孔中、線路槽中、及第二感光性介電層上形 成導電層；以及於該導電層上電鍍形成該金屬層；又薄 化該金屬層至該第二感光性介電層之上復包括移除該第 100100813 表單編號Α0101 第7頁/共21頁 1002001479-0 201230276 [0025] [0026] [0027] [0028] [0029] [0030] [0031] 二感光性介電層上之導電層。 於本發明之封裝基板之製法中，復可包括於該第二 感光性介電層與線路層上形成線路增層結構，該線路增 層結構係包括至少一介電層、設於該介電層上的增層線 路層、及設於該介電層中的增層導電盲孔，該增層導電 盲孔將該增層線路層電性連接至線路層。 由上可知，由於本發明之封裝基板係使用具影像轉 移性質之感光性介電層，不像一般使用介電層及光阻層 之習知技術，需使用雷射於介電層中形成開孔，故能節 省較多製作時間，且光阻層的省略也能進一步節省成本 ，並避免於移除該光阻層後產生不環保的事業廢棄物。 【實施方式】 以下藉由特定的具體實施例說明本發明之實施方式 ，熟悉此技藝之人士可由本說明書所揭示之内容輕易地 瞭解本發明之其他優點及功效。 請參閱第2A至2J圖，係本發明之封裝基板及其製法 的剖視圖。 如第2A圖所示，提供一核心板20，係具有相對應之 二表面201，於至少一該表面201上具有内層線路21，且 該核心板20中具有貫穿該兩表面201之導電通孔22，以電 性連接各該表面201上的内層線路21。 如第2B圖所示，於該表面201及内層線路21上形成第 一感光性介電層23。 如第2C圖所示，圖案化該第一感光性介電層23以形 100100813 表單編號A0101 第8頁/共21頁 1002001479-0 201230276 成複數開孔230，令部份該内層線路21外露於該開孔230 [0032] [0033] 如第2D圖所示，於該第一感光性介電層23上形成第 二感光性介電層24。 如第2Ε圖所示，圖案化該第二感光性介電層24以形 成複數線路槽240，令部份該線路槽240外露該開孔230 [0034] θ [0035] [0036][0024] disposed on the second photosensitive dielectric layer and the circuit layer, the line build-up structure includes at least one dielectric layer, a build-up circuit layer disposed on the dielectric layer, and And a build-up conductive via hole in the dielectric layer, the build-up conductive via hole electrically connecting the build-up circuit layer to the circuit layer. The invention provides a method for manufacturing a package substrate, comprising: providing a core plate having corresponding two surfaces, having an inner layer line on at least one of the surfaces; forming a first photosensitive dielectric on the surface and the inner layer line a layer, and patterning the first photosensitive dielectric layer to form a plurality of openings, exposing a portion of the inner layer wiring to the opening; forming a second photosensitive dielectric layer on the first photosensitive dielectric layer, The second photosensitive dielectric layer has a plurality of line trenches, wherein a portion of the line trench exposes the opening; a metal layer is formed in the opening, in the wiring trench, and on the second photosensitive dielectric layer; And thinning the metal layer onto the second photosensitive dielectric layer, aligning the metal layer with the second photosensitive dielectric layer, and the metal layer in the circuit trench serves as a circuit layer, and the opening The metal layer in the hole serves as a conductive blind hole, so that the circuit layer is electrically connected to the inner layer line through the conductive blind hole. According to the method for manufacturing the package substrate, the insulating layer may be formed on the second photosensitive dielectric layer and the circuit layer, and a plurality of insulating protective layer openings are formed in the insulating protective layer. The circuit layer is exposed to the opening of the insulating protective layer. In the above method for manufacturing a package substrate, the metal layer can be formed by: forming a conductive layer in the opening, in the line trench, and on the second photosensitive dielectric layer; and plating the metal on the conductive layer And thinning the metal layer onto the second photosensitive dielectric layer to include removing the 100100813 form number Α0101, page 7 / total 21 pages 1002001479-0 201230276 [0025] [0026] [0027] [0030] [0031] A conductive layer on the second photosensitive dielectric layer. In the method of manufacturing the package substrate of the present invention, the method further includes forming a line build-up structure on the second photosensitive dielectric layer and the circuit layer, the line build-up structure comprising at least one dielectric layer disposed on the dielectric The build-up wiring layer on the layer and the build-up conductive via hole disposed in the dielectric layer, the build-up conductive via hole electrically connecting the build-up wiring layer to the circuit layer. As can be seen from the above, since the package substrate of the present invention uses a photosensitive dielectric layer having image transfer properties, unlike conventional techniques using a dielectric layer and a photoresist layer, it is necessary to use a laser to form an opening in the dielectric layer. The hole can save a lot of production time, and the omission of the photoresist layer can further save costs, and avoid the environmentally-friendly business waste after removing the photoresist layer. [Embodiment] The embodiments of the present invention are described below by way of specific embodiments, and those skilled in the art can readily understand other advantages and functions of the present invention from the disclosure of the present disclosure. 2A to 2J are cross-sectional views showing a package substrate of the present invention and a method of manufacturing the same. As shown in FIG. 2A, a core board 20 is provided having a corresponding two surfaces 201 having at least one inner layer line 21 on the surface 201, and the core board 20 has conductive through holes penetrating the two surfaces 201. 22, electrically connecting the inner layer lines 21 on each of the surfaces 201. As shown in Fig. 2B, a first photosensitive dielectric layer 23 is formed on the surface 201 and the inner layer line 21. As shown in FIG. 2C, the first photosensitive dielectric layer 23 is patterned to form a plurality of openings 230 in the form of 100100813 Form No. A0101, page 8 / page 21, 20012001-0, 201230276, so that part of the inner layer line 21 is exposed. The opening 230 [0033] As shown in FIG. 2D, a second photosensitive dielectric layer 24 is formed on the first photosensitive dielectric layer 23. As shown in FIG. 2, the second photosensitive dielectric layer 24 is patterned to form a plurality of line trenches 240, and a portion of the line trenches 240 are exposed to the opening 230. [0036] [0036]
[0037] [0038] [0039] 如第2F圖所示，於該開孔230中、線路槽240中、及 第二感光性介電層24上形成導電層25。 如第2G圖所示，於該導電層25上電鍍形成金屬層26 〇 如第2Η圖所示，薄化該金屬層26至該第二感光性介 電層24之上，並移除該第二感光性介電層24上之導電層 25，俾使該金屬層26齊平於該第二感光性介電層24，且 該線路槽240内之金屬層26作為線路層26a，及該開孔中 230之金屬層26作為導電盲孔26b，令該線路層26a藉由 該導電盲孔26b電性連接至該内層線路21。 如第21圖所示，於該第二感光性介電層24及線路層 26a上形成絕緣保護層27。 如第2J圖所示，於該絕緣保護層27中形成複數絕緣 保護層開孔270，令部份該線路層26a外露於該絕緣保護 層開孔270。 或者，在形成該絕緣保護層27之前，復可於該第二 100100813 表單編號A0101 第9頁/共21頁 1002001479-0 201230276 感光性介電層24與線路層26a上形成線路增層結構，該線 路增層結構係包括至少一介電層、設於該介電層上的增 層線路層、及設於該介電層中的增層導電盲孔，該增層 導電盲孔將該增層線路層電性連接至線路層26a，最後， 再於該線路增層結構上形成該絕緣保護層27。（未圖示 此態樣） [0040] [0041] [0042] 本發明復提供一種封裝基板，係包括：核心板20， 係具有相對應之二表面201，於至少一該表面201上具有 内層線路21 ;第一感光性介電層23，係設於該表面201及 内層線路21上，且該第一感光性介電層23具有複數開孔 230，令部份該内層線路21外露於該開孔230 ;第二感光 性介電層24，係設於該第一感光性介電層23上，且該第 二感光性介電層具有複數線路槽240，其中，部份該線路 槽240外露該開孔230 ;導電盲孔26b，係設於該開孔230 中，並電性連接至該内層線路21 ;以及線路層26a，係設 於該線路槽240中，並電性連接該導電盲孔26b，以令該 線路層26a電性連接至該内層線路21。 所述之封裝基板中，復可包括導電層25，係設於該 導電盲孔26b與内層線路21之間、導電盲孔26b與第一感 光性介電層23之間、線路層26a與第一感光性介電層23之 間、以及線路層26a與第二感光性介電層24之間。 於上述之封裝基板中，復可包括絕緣保護層27，係 設於該第二感光性介電層24及線路層26a上，且該絕緣保 護層27具有複數絕緣保護層開孔270，令部份該線路層 26a外露於該絕緣保護層開孔270。 100100813 表單編號A0101 第10頁/共21頁 1002001479-0 201230276 [0043] 於本發明之封裝基板中，復可包括線路增層結構（ 未圖示），係設於該第二感光性介電層24與線路層26a上 ，該線路增層結構係包括至少一介電層、設於該介電層 上的增層線路層、及設於該介電層中的增層導電盲孔， 該增層導電盲孔將該增層線路層電性連接至線路層26a。[0039] As shown in FIG. 2F, a conductive layer 25 is formed in the opening 230, in the line trench 240, and on the second photosensitive dielectric layer 24. As shown in FIG. 2G, a metal layer 26 is formed on the conductive layer 25, as shown in FIG. 2, the metal layer 26 is thinned onto the second photosensitive dielectric layer 24, and the first layer is removed. The conductive layer 25 on the photosensitive dielectric layer 24 is such that the metal layer 26 is flush with the second photosensitive dielectric layer 24, and the metal layer 26 in the line trench 240 serves as the wiring layer 26a, and the opening The metal layer 26 of the hole 230 serves as the conductive blind hole 26b, so that the circuit layer 26a is electrically connected to the inner layer line 21 by the conductive blind hole 26b. As shown in Fig. 21, an insulating protective layer 27 is formed on the second photosensitive dielectric layer 24 and the wiring layer 26a. As shown in Fig. 2J, a plurality of insulating protective layer openings 270 are formed in the insulating protective layer 27, and a portion of the wiring layer 26a is exposed to the insulating protective layer opening 270. Alternatively, before the formation of the insulating protective layer 27, a circuit layer-forming structure is formed on the photosensitive dielectric layer 24 and the circuit layer 26a in the second 100100813 Form No. A0101, page 9 / page 21, 20012001-0, 201230276. The line build-up structure includes at least one dielectric layer, a build-up circuit layer disposed on the dielectric layer, and a build-up conductive via hole disposed in the dielectric layer, the build-up conductive via hole to build the layer The circuit layer is electrically connected to the wiring layer 26a, and finally, the insulating protective layer 27 is formed on the wiring buildup structure. The present invention further provides a package substrate comprising: a core plate 20 having two corresponding surfaces 201, and an inner layer on at least one of the surfaces 201. [0042] The first photosensitive dielectric layer 23 is disposed on the surface 201 and the inner layer line 21, and the first photosensitive dielectric layer 23 has a plurality of openings 230, so that a portion of the inner layer line 21 is exposed. The second photosensitive dielectric layer 24 is disposed on the first photosensitive dielectric layer 23, and the second photosensitive dielectric layer has a plurality of circuit trenches 240, wherein the portion of the wiring trench 240 The opening 230 is exposed; the conductive blind hole 26b is disposed in the opening 230 and electrically connected to the inner layer 21; and the circuit layer 26a is disposed in the circuit slot 240 and electrically connected to the conductive The blind hole 26b is configured to electrically connect the circuit layer 26a to the inner layer line 21. The package substrate further includes a conductive layer 25 disposed between the conductive blind via 26b and the inner layer line 21, between the conductive blind via 26b and the first photosensitive dielectric layer 23, and between the circuit layer 26a and the first Between a photosensitive dielectric layer 23 and between the wiring layer 26a and the second photosensitive dielectric layer 24. In the package substrate, the insulating protective layer 27 is disposed on the second photosensitive dielectric layer 24 and the circuit layer 26a, and the insulating protective layer 27 has a plurality of insulating protective layer openings 270. The circuit layer 26a is exposed to the insulating protective layer opening 270. 100100813 Form No. A0101 Page 10 of 21 1002001479-0 201230276 [0043] In the package substrate of the present invention, the circuit further includes a line build-up structure (not shown) disposed on the second photosensitive dielectric layer And the circuit layer 26a, the line build-up structure includes at least one dielectric layer, a build-up circuit layer disposed on the dielectric layer, and a build-up conductive via hole disposed in the dielectric layer. The layer conductive vias electrically connect the buildup wiring layer to the wiring layer 26a.
[0044] 綜上所述，相較於習知技術，由於本發明之封裝基 板係使用具影像轉移性質之感光性介電層，不像一般使 用介電層及光阻層之習知技術，需使用雷射於介電層中 形成開孔（盲孔），故能節省較多製作時間，且光阻層 的省略也能進一步節省成本，並避免於移除該光阻層後 產生不環保的事業廢棄物。 [0045] 上述實施例係用以例示性說明本發明之原理及其功 效，而非用於限制本發明。任何熟習此項技藝之人士均 可在不違背本發明之精神及範疇下，對上述實施例進行 修改。因此本發明之權利保護範圍，應如後述之申請專 利範圍所列。 【圖式簡單說明】 [0046] 第1A至1J圖係習知具多層線路層之封裝基板及其製 法之剖視圖；以及 [0047] 第2A至2 J圖係本發明之封裝基板及其製法的剖視圖 【主要元件符號說明】 [0048] 10, 20 核心板 [0049] 101，201 表面 100100813 表單編號A0101 第11頁/共21頁 1002001479-0 201230276 [0050] 11,21 内層線路 [0051] 12 介電層 [0052] 120 盲孔 [0053] 13, 25 導電層 [0054] 14 光阻層 [0055] 140 開口區 [0056] 151,26a 線路層 [0057] 152,26b 導電盲孔 [0058] 16, 27 絕緣保護層 [0059] 1 60, 270 絕緣保護層開孔 [0060] 22 導電通孔 [0061] 23 第一感光性介電層 [0062] 230 開孔 [0063] 24 第二感光性介電層 [0064] 240 線路槽 [0065] 26 金屬層 100100813 表單編號A0101 第12頁/共21頁 1002001479-0[0044] In summary, compared with the prior art, since the package substrate of the present invention uses a photosensitive dielectric layer having image transfer properties, unlike conventional techniques in which a dielectric layer and a photoresist layer are generally used, It is necessary to use a laser to form an opening (blind hole) in the dielectric layer, so that more production time can be saved, and the omission of the photoresist layer can further save costs, and avoids environmental protection after removing the photoresist layer. Business waste. The above-described embodiments are intended to be illustrative of the principles of the invention and its advantages, and are not intended to limit the invention. Any of the above-described embodiments may be modified by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the application patents which will be described later. BRIEF DESCRIPTION OF THE DRAWINGS [0046] FIGS. 1A to 1J are cross-sectional views showing a package substrate having a multilayer wiring layer and a method of manufacturing the same; and [0047] FIGS. 2A to 2J are diagrams of a package substrate of the present invention and a method of manufacturing the same Sectional view [Description of main component symbols] [0048] 10, 20 core board [0049] 101, 201 surface 100100813 Form number A0101 Page 11 of 21 page 1002001479-0 201230276 [0050] 11,21 inner layer line [0051] 12 Electrical layer [0052] 120 blind hole [0053] 13, 25 conductive layer [0054] 14 photoresist layer [0055] 140 open region [0056] 151, 26a circuit layer [0057] 152, 26b conductive blind hole [0058] 16 , 27 Insulation Protective Layer [0059] 1 60, 270 Insulation Protective Layer Opening [0060] 22 Conductive Through Hole [0061] 23 First Photosensitive Dielectric Layer [0062] 230 Opening [0063] 24 Second Sensitive Interface Electrical Layer [0064] 240 Line Slot [0065] 26 Metal Layer 100100813 Form No. A0101 Page 12 of 21 1002001479-0