KR101096751B1 - Light emitting device - Google Patents

Light emitting device Download PDF

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Publication number
KR101096751B1
KR101096751B1 KR1020090118844A KR20090118844A KR101096751B1 KR 101096751 B1 KR101096751 B1 KR 101096751B1 KR 1020090118844 A KR1020090118844 A KR 1020090118844A KR 20090118844 A KR20090118844 A KR 20090118844A KR 101096751 B1 KR101096751 B1 KR 101096751B1
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KR
South Korea
Prior art keywords
electrode
semiconductor layer
semiconductor
layer
light emitting
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KR1020090118844A
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Korean (ko)
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KR20110062201A (en
Inventor
김봉진
오재응
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우리엘에스티 주식회사
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Priority to KR1020090118844A priority Critical patent/KR101096751B1/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/49105—Connecting at different heights
    • H01L2224/49107—Connecting at different heights on the semiconductor or solid-state body
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/49105—Connecting at different heights
    • H01L2224/49109—Connecting at different heights outside the semiconductor or solid-state body

Abstract

The present disclosure includes a first semiconductor layer having a first conductivity; A second semiconductor layer having a second conductivity different from the first conductivity; An active layer interposed between the first semiconductor layer and the second semiconductor layer; A first electrode provided in the first semiconductor layer; A second electrode provided in the second semiconductor layer; And a dielectric layer interlocking with any one of the first electrode and the first semiconductor layer and any one of the second electrode and the second semiconductor layer to form a capacitor so as to reduce path disturbance of light emitted from the active layer. It relates to a semiconductor light emitting device comprising a.

Electric and electronics, semiconductors, light emitting devices, dielectrics, electrostatic discharge, luminous efficiency

Description

Semiconductor Light Emitting Device {LIGHT EMITTING DEVICE}

The present disclosure relates to a semiconductor light emitting device as a whole, and more particularly to a semiconductor light emitting device having improved resistance to electrostatic discharge (ESD).

Here, the semiconductor light emitting device refers to a semiconductor optical device that generates light through recombination of electrons and holes, for example, a group III nitride semiconductor light emitting device. The group III nitride semiconductor consists of a compound of Al (x) Ga (y) In (1-x-y) N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1). A GaAs-based semiconductor light-emitting element used for red light emission, and the like.

This section provides background information related to the present disclosure which is not necessarily prior art.

1 is a diagram illustrating an example of a conventional semiconductor light emitting device, and FIG. 2 is an equivalent circuit diagram of FIG. 1, wherein the semiconductor light emitting device is connected to the LED 10 and the LED 10 in parallel with the sub-mount 21. Zener diode 23 is formed.

The LED 10 is an n-type semiconductor layer (for example, n-GaN) 12, an active layer 13, and a p-type semiconductor layer (for example, p-GaN) sequentially stacked on the sapphire substrate 11. 14, an n-type electrode 16 stacked on the n-type semiconductor layer 12, and a p-type electrode 15 stacked on the p-type semiconductor layer 14.

The zener diode 23 may be provided by, for example, injecting p-type ions into a portion of the sub-mount 23a such as an n-type silicon substrate to form the p-type silicon region 23b.

The n-type electrode 16 of the LED 10 is connected to the p-type silicon region 153 through the first conductive bump 25, and the p-type electrode 15 is submounted through the second conductive bump 27. By being connected to 21, flip chip bonding is performed.

When an electrostatic discharge voltage is applied through an input / output terminal (not shown) of the semiconductor light emitting device, most of the discharge current flows through the zener diode 23 connected in parallel to the LED 10. By this structure, the LED 10 can be protected from an unexpected electrostatic discharge voltage.

However, in this case, an expensive ion implantation process is performed to fabricate a zener diode in the submount, or it includes a diffusion process that is difficult to control, which not only makes the submount manufacturing process complicated but also increases the cost. There is a problem.

This will be described later in the Specification for Implementation of the Invention.

SUMMARY OF THE INVENTION Herein, a general summary of the present disclosure is provided, which should not be construed as limiting the scope of the present disclosure. of its features).

According to one aspect of the present disclosure, an accommodating to one aspect of the present disclosure includes: a first semiconductor layer having a first conductivity; A second semiconductor layer having a second conductivity different from the first conductivity; An active layer interposed between the first semiconductor layer and the second semiconductor layer; A first electrode provided in the first semiconductor layer; A second electrode provided in the second semiconductor layer; And a dielectric layer interlocking with any one of the first electrode and the first semiconductor layer and any one of the second electrode and the second semiconductor layer to form a capacitor so as to reduce path disturbance of light emitted from the active layer. There is provided a semiconductor light emitting device comprising a.

This will be described later in the Specification for Implementation of the Invention.

The present disclosure will now be described in detail with reference to the accompanying drawing (s).

3 is a view illustrating an example of a semiconductor light emitting device according to the present disclosure. The semiconductor light emitting device 100 may include a first semiconductor layer 111, an active layer 112, a second semiconductor layer 113, and a first electrode. 131, the second electrode 132, and the dielectric layer 140.

The first semiconductor layer 111, the second semiconductor layer 113, and the active layer 112 may be formed of a group III-V compound semiconductor, hereinafter referred to as Al (x) Ga (y) In (1-xy) N. The case where it is provided with the group III nitride semiconductor represented by (0 <= x <1>, 0 <= y <= 1, 0 <= x + y <= 1) is demonstrated as an example.

The active layer 112 is interposed between the first semiconductor layer 111 and the second semiconductor layer 113, and the first semiconductor layer 111, the second semiconductor layer 113, and the active layer 112 are disposed in the vertical direction. Can be stacked. In addition, the substrate 120 may be provided to stack them.

As the substrate 120, a GaN-based substrate is used as the homogeneous substrate, and a sapphire substrate, a SiC substrate, or a Si substrate is used as the heterogeneous substrate. Any substrate may be used as long as the group III nitride semiconductor layer can be grown. The substrate 120 may be removed after the growth of the semiconductor layer 110 is completed.

Here, the semiconductor layer 110 refers to the first semiconductor layer 111, the second semiconductor layer 113, and the active layer 112.

The growth of the semiconductor layer 110 on the substrate 120 is mainly performed by MOCVD (organic metal vapor growth method).

The first semiconductor layer 111 and the second semiconductor layer 113 are provided to have different conductivity. For example, the first semiconductor layer 111 may be a p-type semiconductor layer, and the second semiconductor layer 113 may be provided as an n-type semiconductor layer.

The first electrode 131 is provided on the first semiconductor layer 111, and the second electrode is provided on the second semiconductor layer 113, and is applied to a voltage applied between the first electrode 131 and the second electrode 132. As a result, light emission is generated in the active layer 112.

When the semiconductor layer 110 is grown on an electrically insulating substrate such as sapphire (Al 2 O 3 ), the first electrode 131 and the second electrode 132 are provided to face in the same direction, but are electrically conductive such as SiC. When the substrate is grown on the substrate or the electrically insulating substrate is removed, the first electrode 131 and the second electrode 132 may be provided to face in opposite directions.

On the other hand, it is connected to the first electrode 131, so as to spread the current uniformly from the first electrode 131 to the entire first semiconductor layer 111, is formed over almost the entire surface of the first semiconductor layer 111 The light-transmitting electrode 135 may be further provided.

The transparent electrode 135 may be made of (1) Ni and Au, or (2) Indium Tin Oxide (ITO).

The dielectric layer 140 is interlocked with any one of the first electrode 131 and the first semiconductor layer 111 and any one of the second electrode 132 and the second semiconductor layer 113 to form a capacitor. It is provided. In addition, the dielectric layer 140 is connected in parallel with the semiconductor layer 110.

The dielectric layer 140 may be formed of a material such as SiO 2 , SiN, ZnO, SrO, V 2 O 3 , BaTiO 3 , KH 2 PO 4, or a mixture thereof, and may also include SiO 2 , SiN, ZnO. , SrO, V 2 O 3 , BaTiO 3 , KH 2 PO 4 It may be provided with a structure in which at least two or more materials are stacked.

As a result, when an electrostatic discharge voltage is applied between the first electrode 131 and the second electrode 132, the electrostatic discharge charge is diverted to the dielectric layer 140 to burn out the semiconductor light emitting device 100. ) Can be prevented.

In addition, the dielectric layer 140 is provided at a position where the path of the light emitted from the active layer 112 can be prevented from being interrupted by the dielectric layer 140 to reduce the luminous efficiency.

To this end, the groove 150 formed to expose the second semiconductor layer is formed in the first semiconductor layer 111. For example, the groove 150 may be formed through the active layer 112 from the upper surface of the first semiconductor layer 111.

The dielectric layer 140 is formed in the groove 150 so that one side thereof is connected to the second semiconductor layer 113. In addition, the first electrode 131 is provided on the other side of the dielectric layer 140. That is, the dielectric layer 140 is interposed between the first electrode 131 and the second semiconductor layer 113.

As a result, the dielectric layer 140 bypasses the electrostatic discharge voltage applied between the first electrode 131 and the second electrode 132.

In addition, since the dielectric layer 140 is positioned under the first electrode 131, it is possible to minimize the decrease in the luminous efficiency by the dielectric layer 140.

In detail, since the light emitted from the active layer 112 does not penetrate the first electrode 131, a decrease in luminous efficiency is generally generated by the first electrode 131.

In this example, the dielectric layer 140 is positioned below the first electrode 131, so that the reduction in luminous efficiency by the dielectric layer 140 and the decrease in luminous efficiency by the first electrode 131 overlap. As a whole, it is possible to obtain the effect that the reduction of the luminous efficiency by the dielectric layer 140 is prevented.

Therefore, when viewed from the top of the first semiconductor layer 111, the area of the dielectric layer 140 is equal to the area of the first electrode 131 so that the dielectric layer 140 may be covered by the first electrode 131. It is preferable to form smaller.

4 is a view illustrating another example of the semiconductor light emitting device according to the present disclosure, and FIG. 5 is a cross-sectional view of II of FIG. 4, wherein the semiconductor light emitting device 200 includes a first semiconductor layer 211 and an active layer 212. ), The second semiconductor layer 213, the first electrode 231, and the second electrode 232 together with the first branch electrode 231a, the second branch electrode 232a, and a dielectric layer 240 interposed therebetween. More).

The description of the first semiconductor layer 211, the active layer 212, the second semiconductor layer 213, the first electrode 231, and the second electrode 232 will be replaced with the above description.

The first branch electrode 231a extends from the first electrode 231 and is provided to be electrically connected to the first semiconductor layer 211. That is, the first branch electrode 231a may be provided in the first semiconductor layer 211 or the light transmissive electrode 235.

The second branch electrode 232a extends from the second electrode 232 and is provided to be electrically connected to the second semiconductor layer 213.

The dielectric layer 240 is interposed between the first branch electrode 231a and the second branch electrode 232a.

Specifically, the first branch electrode 231a and the second branch electrode 232a are provided to have a facing area A which is aligned to face each other and is positioned to face each other, and the dielectric layer 240 is a facing area. In (A), it is interposed between the 1st branch electrode 231a and the 2nd branch electrode 232a.

The facing area A may be formed by extending the first branch electrode 231a to coincide with the direction in which the second branch electrode 232a extends. In the facing area A, the facing area A and the first branch electrode 231a may be formed. The translucent electrode 135 is to be spatially separated.

The dielectric layer 240 may be provided to surround the second branch electrode 232a as well as a portion in which the first branch electrode 231a and the second branch electrode 232a face each other in the facing area A. It may be provided in contact with the second semiconductor layer 213.

As a result, the dielectric layer 240 bypasses the electrostatic discharge voltage applied between the first electrode 231 and the second electrode 232.

In addition, since the dielectric layer 240 is formed between the first and second branch electrodes 231a and 232a having a generally thin width, the reduction of the luminous efficiency by the dielectric layer 240 may be minimized.

Furthermore, in order to minimize the reduction in luminous efficiency by the dielectric layer 240, the facing area A may be formed at the edge of the second semiconductor layer 213.

6 is a view illustrating another example of a semiconductor light emitting device according to the present disclosure, and FIG. 7 is a view illustrating main parts of FIG. 6, wherein the semiconductor light emitting device 300 includes a first semiconductor layer 311 and an active layer 312. And a first conductive frame 361, a second conductive frame 362, and a dielectric layer interposed therebetween with the second semiconductor layer 313, the first electrode 331, and the second electrode 332. 340) further.

The description of the first semiconductor layer 311, the active layer 312, the second semiconductor layer 313, the first electrode 331, and the second electrode 332 will be replaced with those described above.

The first conductive frame 361 and the second conductive frame 362 have a plate shape and are electrically connected to the first electrode 331 and the second electrode 332, respectively.

In this case, the electrical connection means that the wires are connected by wire-bonding or are in direct contact to allow electricity to flow.

The first and second conductive frames 361 and 362 are connected to an external power source (not shown), and a voltage applied by the external power source is applied between the first electrode 331 and the second electrode 332.

FIG. 6 illustrates a case in which the substrate 320 is provided as an electrically insulating substrate. In this case, the first electrode 331 and the second electrode 332 have the first conductivity type frame 361 and the second conductivity type, respectively. Wire bonding to frame 362.

Wire bonding connects two conductive materials with a thin metal, and gold (Au), platinum (Pt), or the like may be used as the metal.

Alternatively, when the substrate 320 is provided as a conductive substrate, or when the substrate 320 is removed, the second electrode 332 may be positioned under the second semiconductor layer 313, in which case the second electrode The electrode 332 may be in direct contact with the second conductivity type frame 362.

Meanwhile, the first and second conductive frames 361 and 362 may be integrally fixed by the fixing member 370 formed of a resin or ceramic material.

Also, the first conductive frame 361 and the second conductive frame 362 are located on the same plane.

Accordingly, one side of the first conductive frame 361 and one side of the second conductive frame 362 correspond to each other, and a dielectric layer 340 is formed therebetween.

In this case, an uneven portion 363 may be further formed in the first and second conductive frames 361 and 362 in order to increase the contact area between the dielectric layer 340 and the first and second conductive frames 361 and 362.

In this case, it is preferable that the recesses formed in the first conductive frame 361 are provided so as to face the iron formed in the second conductive frame 362.

As a result, the electrostatic discharge voltage applied between the first electrode 331 and the second electrode 332 is bypassed to the dielectric layer 340, and the problem of the emission efficiency being reduced by the dielectric layer 340 can be eliminated. have.

FIG. 8 is a view illustrating a modified example of the semiconductor light emitting device of FIG. 6, and FIG. 9 is a view illustrating main parts of FIG. 8, wherein the semiconductor light emitting device 400 includes a first conductive frame 461 and a second conductive frame. The same as in the example of FIG. 6 described above, except that 462 is positioned to face up and down, and the dielectric layer 440 is positioned therebetween.

Accordingly, the first semiconductor layer 411, the active layer 412, the second semiconductor layer 413, the first electrode 431, the second electrode 432, and the substrate 420 constituting the semiconductor light emitting device 400 may be formed. The description of the fixing member 470 will be replaced with the above description.

On the other hand, the semiconductor light emitting device 400 according to the present example, in order to enlarge the contact area between the dielectric layer 440 and the first and second conductive frames 461 and 462, among the first and second conductive frames 461 and 462. It may further include an uneven portion 463 provided in at least one.

In particular, when the uneven parts 463 are provided in both the first and second conductive frames 461 and 462, the concave formed in the first conductive frame 461 is formed in the second conductive frame 462. It is preferable to be provided so as to face the iron to be formed.

Various embodiments of the present disclosure will be described below.

(1) a groove formed in the first semiconductor layer so that the second semiconductor layer is exposed;

The dielectric layer is a semiconductor light emitting device, characterized in that the one side is connected to the second semiconductor layer, the other side is formed in the groove so as to be connected to the first electrode.

As a result, when the reverse voltage is applied between the first electrode and the second electrode, the damage of the semiconductor light emitting device may be prevented by the dielectric layer functioning as a capacitor, and the dielectric layer is disposed since the first electrode is located below. This can minimize the problem of disturbing the emission of light.

In addition, the dielectric layer may have a property of conducting electricity above a specific voltage, thereby providing a function of protecting the semiconductor light emitting device by safely bypassing the overcurrent when an overcurrent occurs.

(2) The dielectric layer is located under the first electrode and is formed smaller than the area of the first electrode.

(3) The semiconductor light emitting element, characterized in that the groove is formed through the first semiconductor layer and the active layer.

(4) a first branch electrode extending from the first electrode and electrically connected to the first semiconductor layer; And a second branch electrode extending from the second electrode and electrically connected to the second semiconductor layer, wherein the dielectric layer is interposed between the first branch electrode and the second branch electrode. .

As a result, when the reverse voltage is applied between the first electrode and the second electrode, damage to the semiconductor light emitting device can be prevented by the dielectric layer functioning as the capacitor, and the dielectric layer is interposed between the branch electrodes, thereby providing a capacitor function. For this reason, there is no need to add a separate metal layer, and in general, since a dielectric layer is interposed between the branch electrodes having a smaller width, the problem of preventing the emission of light can be minimized.

(5) at least a portion of the first branch electrode and at least a portion of the second branch electrode further comprising a facing area in which the extending direction is coincident and disposed to face each other; wherein the dielectric layer comprises a first branch electrode in the facing area And a second light emitting device interposed between the second branch electrode.

(6) a first conductivity type frame electrically connected to the first electrode; And a second conductive frame electrically connected to the second electrode, wherein the dielectric layer is interposed between the first conductive frame and the second conductive frame.

As a result, when the reverse voltage is applied between the first electrode and the second electrode, damage to the semiconductor light emitting device may be prevented by the dielectric layer serving as a capacitor, and the dielectric layer may be formed into the first and second semiconductor layers and the active layer. Since it is located between the first and second conductive frames provided separately and not provided in the light emitting area, the problem of preventing the emission of light due to the addition of the dielectric layer can be eliminated.

(7) the first conductive frame and the second conductive frame are located on the same plane, and the concave-convex portion is formed in the longitudinal direction in a region corresponding to the first conductive frame and the second conductive frame; A semiconductor light emitting device, characterized in that.

(8) The semiconductor light emitting device according to claim 1, wherein the first conductive frame and the second conductive frame are positioned to face each other in the vertical direction, with a dielectric layer interposed therebetween.

According to one semiconductor light emitting device according to the present disclosure, since a dielectric layer is interposed between the first electrode and the second semiconductor layer, when a reverse voltage is applied between the first electrode and the second electrode, the dielectric layer functions as a capacitor. Damage to the semiconductor light emitting device can be prevented, and the problem that the emission of light is prevented due to the dielectric layer can be minimized since the dielectric layer is positioned below the first electrode.

In addition, according to another semiconductor light emitting device according to the present disclosure, since a dielectric layer is interposed between branch electrodes, damage of the semiconductor light emitting device is prevented by a dielectric layer functioning as a capacitor when a reverse voltage is applied between the first electrode and the second electrode. It can be prevented, there is no need to add a separate metal layer for the function of the capacitor, and in general, the dielectric layer is interposed between the branch electrodes having a small width can minimize the problem that the emission of light is prevented.

In addition, according to another semiconductor light emitting device according to the present disclosure, since the dielectric layer is positioned between the first and second conductive frames provided separately, not in the light emitting region including the first and second semiconductor layers and the active layer, When a reverse voltage is applied between the electrode and the second electrode, damage to the semiconductor light emitting device can be prevented by the dielectric layer serving as a capacitor, and the problem of preventing the emission of light due to the addition of the dielectric layer can be eliminated. .

1 is a view showing an example of a conventional semiconductor light emitting device;

2 is an equivalent circuit diagram of FIG. 1;

3 illustrates an example of a semiconductor light emitting device according to the present disclosure;

4 is a view showing another example of a semiconductor light emitting device according to the present disclosure;

5 is a cross-sectional view of I-I of FIG. 4;

6 is a view showing another example of a semiconductor light emitting device according to the present disclosure;

7 is a view illustrating main parts of FIG. 6;

8 is a view showing a modification of the semiconductor light emitting device of FIG.

9 is a view illustrating main parts of FIG. 8;

Claims (13)

A first semiconductor layer having a first conductivity; A second semiconductor layer having a second conductivity different from the first conductivity; An active layer interposed between the first semiconductor layer and the second semiconductor layer; A first electrode provided in the first semiconductor layer; A second electrode provided in the second semiconductor layer; And A dielectric layer interlocking with any one of the first electrode and the first semiconductor layer and any one of the second electrode and the second semiconductor layer to form a capacitor so as to reduce path disturbance of light emitted from the active layer; A semiconductor light emitting device, comprising: a dielectric layer positioned below the first electrode and formed to be smaller than the area of the first electrode. The method according to claim 1, And a groove formed in the first semiconductor layer to expose the second semiconductor layer. The dielectric layer is a semiconductor light emitting device, characterized in that the one side is connected to the second semiconductor layer, the other side is formed in the groove so as to be connected to the first electrode. delete The method according to claim 2, The groove is formed through the first semiconductor layer and the active layer, the semiconductor light emitting device. A first semiconductor layer having a first conductivity; A second semiconductor layer having a second conductivity different from the first conductivity; An active layer interposed between the first semiconductor layer and the second semiconductor layer; A first electrode provided in the first semiconductor layer; A second electrode provided in the second semiconductor layer; A first branch electrode extending from the first electrode and electrically connected to the first semiconductor layer; A second branch electrode extending from the second electrode and electrically connected to the second semiconductor layer; And A dielectric layer interlocking with any one of the first electrode and the first semiconductor layer and any one of the second electrode and the second semiconductor layer to form a capacitor so as to reduce path disturbance of light emitted from the active layer; A semiconductor light emitting device comprising: a dielectric layer interposed between a first branch electrode and a second branch electrode. The method according to claim 5, At least a portion of the first branch electrode and at least a portion of the second branch electrode, the extending direction is the same and the facing area disposed to face each other; And a dielectric layer is interposed between the first branch electrode and the second branch electrode in the facing region. A first semiconductor layer having a first conductivity; A second semiconductor layer having a second conductivity different from the first conductivity; An active layer interposed between the first semiconductor layer and the second semiconductor layer; A first electrode provided in the first semiconductor layer; A second electrode provided in the second semiconductor layer; A first conductivity type frame electrically connected to the first electrode; A second conductivity type frame electrically connected to the second electrode; And A dielectric layer interlocking with any one of the first electrode and the first semiconductor layer and any one of the second electrode and the second semiconductor layer to form a capacitor so as to reduce path disturbance of light emitted from the active layer; A semiconductor light emitting device comprising: a dielectric layer interposed between a first conductivity type frame and a second conductivity type frame. The method of claim 7, The first conductive frame and the second conductive frame is positioned so as to face in the vertical direction, the semiconductor light emitting device, characterized in that the dielectric layer is interposed therebetween. The method of claim 7, The first conductive frame and the second conductive frame are located on the same plane, And a concave-convex portion formed in a longitudinal direction in a region where the first conductive frame and the second conductive frame correspond to each other. The method according to claim 2, The first semiconductor layer is provided with a p-type group III nitride semiconductor, The second semiconductor layer is provided with an n-type group III nitride semiconductor, The groove is formed through the first semiconductor layer and the active layer, the semiconductor light emitting device. The method according to claim 6, The first and second semiconductor layers and the active layer are provided with a group III nitride semiconductor, The first semiconductor layer is formed of a p-type group III nitride semiconductor, The second semiconductor layer is a semiconductor light emitting device, characterized in that provided with an n-type Group III nitride semiconductor. The method of claim 7, Further comprising: a fixing member for integrally fixing the first, second conductive frame, The first and second semiconductor layers and the active layer are provided with a group III nitride semiconductor, The first and second conductivity type frames are positioned to face in the vertical direction, and a semiconductor layer is interposed therebetween. The method of claim 7, A fixing member for integrally fixing the first and second conductive frames; And And an uneven portion formed in a longitudinal direction in a region where the first conductive frame and the second conductive frame correspond to each other. The first and second semiconductor layers and the active layer are provided with a group III nitride semiconductor, The first conductive frame and the second conductive frame is a semiconductor light emitting device, characterized in that located on the same plane.
KR1020090118844A 2009-12-03 2009-12-03 Light emitting device KR101096751B1 (en)

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Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004342885A (en) 2003-05-16 2004-12-02 Sumitomo Chem Co Ltd Light emitting device and light emitting apparatus

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004342885A (en) 2003-05-16 2004-12-02 Sumitomo Chem Co Ltd Light emitting device and light emitting apparatus

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