KR101089098B1 - 액정표시장치용 듀얼 풀다운 출력회로 - Google Patents
액정표시장치용 듀얼 풀다운 출력회로 Download PDFInfo
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- KR101089098B1 KR101089098B1 KR1020050026875A KR20050026875A KR101089098B1 KR 101089098 B1 KR101089098 B1 KR 101089098B1 KR 1020050026875 A KR1020050026875 A KR 1020050026875A KR 20050026875 A KR20050026875 A KR 20050026875A KR 101089098 B1 KR101089098 B1 KR 101089098B1
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- South Korea
- Prior art keywords
- output
- signal
- circuit
- clock signal
- pull
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3674—Details of drivers for scan electrodes
- G09G3/3677—Details of drivers for scan electrodes suitable for active matrices only
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/34—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source
- G09G3/36—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters by control of light from an independent source using liquid crystals
- G09G3/3611—Control of matrices with row and column drivers
- G09G3/3614—Control of polarity reversal in general
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/01—Modifications for accelerating switching
- H03K19/017—Modifications for accelerating switching in field-effect transistor circuits
- H03K19/01728—Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals
- H03K19/01742—Modifications for accelerating switching in field-effect transistor circuits in synchronous circuits, i.e. by using clock signals by means of a pull-up or down element
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- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Crystallography & Structural Chemistry (AREA)
- General Physics & Mathematics (AREA)
- Chemical & Material Sciences (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Liquid Crystal Display Device Control (AREA)
- Liquid Crystal (AREA)
Abstract
Description
Claims (6)
- 복수개의 구동신호를 입력받아 동작되어 제1출력신호 및 상기 제1출력신호와 위상 반전되는 제2출력신호를 출력하는 회로에 있어서,상기 제2출력신호에 턴온 여부가 결정되고 제1클럭신호를 입력받는 제1스위칭소자와;상기 제2출력신호에 턴온 여부가 결정되고 제2클럭신호를 입력받는 제2스위칭소자와;상기 제1출력신호 또는 상기 제1스위칭소자의 출력에 턴온 여부가 결정되고 상기 제2클럭신호를 입력받는 제3스위칭소자와;상기 제2스위칭소자의 출력에 턴온 여부가 결정되고 상기 제1클럭신호를 입력받으며 상기 제3스위칭소자와 연결되어 출력노드를 형성하는 제4스위칭소자를 포함하는 액정표시장치용 듀얼 풀다운 출력회로
- 청구항 제 1 항에 있어서,상기 각 스위칭소자는 박막트랜지스터인 것을 특징으로 하는 액정표시장치용 듀얼 풀다운 출력회로
- 청구항 제 1 항에 있어서,상기 각 스위칭소자는 N-타입 트랜지스터인 것을 특징으로 하는 액정표시장치용 듀얼 풀다운 출력회로
- 청구항 제 1 항에 있어서,상기 제1클럭신호 및 제2클럭신호는 각각 주기가 동일하며 서로 위상 반전된 전압신호인 것을 특징으로 하는 액정표시장치용 듀얼 풀다운 출력회로
- 청구항 제 1 항에 있어서,상기 제1클럭신호 및 제2클럭신호는 각각 하이레벨과 로우레벨의 전압 극성이 서로 다른 신호인 것을 특징으로 하는 액정표시장치용 듀얼 풀다운 출력회로
- 청구항 제 1 항에 있어서,상기 복수개의 구동신호는 인에이블신호, 구동클럭신호를 포함하는 것을 특징으로 하는 액정표시장치용 듀얼 풀다운 출력회로
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
KR1020050026875A KR101089098B1 (ko) | 2005-03-31 | 2005-03-31 | 액정표시장치용 듀얼 풀다운 출력회로 |
Applications Claiming Priority (1)
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KR1020050026875A KR101089098B1 (ko) | 2005-03-31 | 2005-03-31 | 액정표시장치용 듀얼 풀다운 출력회로 |
Publications (2)
Publication Number | Publication Date |
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KR20060104587A KR20060104587A (ko) | 2006-10-09 |
KR101089098B1 true KR101089098B1 (ko) | 2011-12-06 |
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KR1020050026875A KR101089098B1 (ko) | 2005-03-31 | 2005-03-31 | 액정표시장치용 듀얼 풀다운 출력회로 |
Country Status (1)
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KR (1) | KR101089098B1 (ko) |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100455014B1 (ko) | 1996-12-09 | 2004-11-06 | 톰슨 | 양방향 시프트 레지스터 |
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- 2005-03-31 KR KR1020050026875A patent/KR101089098B1/ko active IP Right Grant
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR100455014B1 (ko) | 1996-12-09 | 2004-11-06 | 톰슨 | 양방향 시프트 레지스터 |
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