KR101075253B1 - 임계 전압의 치밀한 분포가 가능한 비휘발성 메모리의 비 실시간 재 프로그래밍 방법 - Google Patents

임계 전압의 치밀한 분포가 가능한 비휘발성 메모리의 비 실시간 재 프로그래밍 방법 Download PDF

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KR101075253B1
KR101075253B1 KR1020087023383A KR20087023383A KR101075253B1 KR 101075253 B1 KR101075253 B1 KR 101075253B1 KR 1020087023383 A KR1020087023383 A KR 1020087023383A KR 20087023383 A KR20087023383 A KR 20087023383A KR 101075253 B1 KR101075253 B1 KR 101075253B1
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programming
nonvolatile
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KR20090007298A (ko
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니마 모크레시
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샌디스크 코포레이션
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Priority claimed from US11/425,790 external-priority patent/US7486561B2/en
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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/10—Programming or data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5628—Programming or writing circuits; Data input circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G11C11/5642—Sensing or reading circuits; Data output circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/08—Address circuits; Decoders; Word-line control circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3418—Disturbance prevention or evaluation; Refreshing of disturbed memory data
    • G11C16/3427—Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/3436—Arrangements for verifying correct programming or erasure
    • G11C16/3454—Arrangements for verifying correct programming or for detecting overprogrammed cells
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2211/00—Indexing scheme relating to digital stores characterized by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C2211/56—Indexing scheme relating to G11C11/56 and sub-groups for features not covered by these groups
    • G11C2211/562—Multilevel memory programming aspects
    • G11C2211/5621—Multilevel programming verification
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Read Only Memory (AREA)
KR1020087023383A 2006-06-22 2007-05-25 임계 전압의 치밀한 분포가 가능한 비휘발성 메모리의 비 실시간 재 프로그래밍 방법 Expired - Fee Related KR101075253B1 (ko)

Applications Claiming Priority (4)

Application Number Priority Date Filing Date Title
US11/425,794 US7489549B2 (en) 2006-06-22 2006-06-22 System for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages
US11/425,790 US7486561B2 (en) 2006-06-22 2006-06-22 Method for non-real time reprogramming of non-volatile memory to achieve tighter distribution of threshold voltages
US11/425,790 2006-06-22
US11/425,794 2006-06-22

Publications (2)

Publication Number Publication Date
KR20090007298A KR20090007298A (ko) 2009-01-16
KR101075253B1 true KR101075253B1 (ko) 2011-10-20

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KR1020087023383A Expired - Fee Related KR101075253B1 (ko) 2006-06-22 2007-05-25 임계 전압의 치밀한 분포가 가능한 비휘발성 메모리의 비 실시간 재 프로그래밍 방법

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EP (1) EP2030205B1 (https=)
JP (1) JP4994447B2 (https=)
KR (1) KR101075253B1 (https=)
AT (1) ATE515771T1 (https=)
TW (1) TWI337746B (https=)
WO (1) WO2007149677A2 (https=)

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ITRM20080114A1 (it) * 2008-02-29 2009-09-01 Micron Technology Inc Compensazione della perdita di carica durante la programmazione di un dispositivo di memoria.
US7924614B2 (en) 2009-01-19 2011-04-12 Macronix International Co., Ltd. Memory and boundary searching method thereof
US8504759B2 (en) * 2009-05-26 2013-08-06 Micron Technology, Inc. Method and devices for controlling power loss
JP2011159364A (ja) * 2010-02-02 2011-08-18 Toshiba Corp 不揮発性半導体記憶装置および不揮発性半導体記憶装置の駆動方法
JP2011198419A (ja) * 2010-03-19 2011-10-06 Toshiba Corp 不揮発性半導体記憶装置およびその書き込み方法
KR20110126408A (ko) 2010-05-17 2011-11-23 삼성전자주식회사 비휘발성 메모리 장치, 그것을 포함한 메모리 시스템 및 그것의 프로그램 방법
JP2012190523A (ja) 2011-03-14 2012-10-04 Toshiba Corp 不揮発性半導体記憶装置
WO2014061055A1 (en) 2012-10-15 2014-04-24 Hitachi, Ltd. Storage sysyem which includes non-volatile semiconductor storage medium, and storage control method of storage system
US9257203B2 (en) 2012-12-06 2016-02-09 Micron Technology, Inc. Setting a default read signal based on error correction
KR102175039B1 (ko) * 2013-06-25 2020-11-05 삼성전자주식회사 불휘발성 메모리 장치의 데이터 기입 방법
KR20160032910A (ko) 2014-09-17 2016-03-25 에스케이하이닉스 주식회사 메모리 시스템 및 메모리 시스템의 동작 방법
JP6453718B2 (ja) * 2015-06-12 2019-01-16 東芝メモリ株式会社 半導体記憶装置及びメモリシステム
US10460816B2 (en) 2017-12-08 2019-10-29 Sandisk Technologies Llc Systems and methods for high-performance write operations
FR3163657A1 (fr) 2024-06-24 2025-12-26 IFP Energies Nouvelles Injection d’hydrogène produit par électrolyse de l’eau sur une unité de production de carburants durables obtenus par conversion thermochimique d’une charge plastique carbonée avec valorisation du CO2 par réaction du gaz à l’eau inverse.
FR3163658A1 (fr) 2024-06-24 2025-12-26 IFP Energies Nouvelles Injection d’hydrogène produit par électrolyse de l’eau sur une unité de production de biocarburants obtenus par conversion thermochimique de biomasse lignocellulosique avec valorisation du CO2 par réaction du gaz à l’eau inverse.

Citations (3)

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Publication number Priority date Publication date Assignee Title
US20030002348A1 (en) * 2001-06-27 2003-01-02 Sandisk Corporation Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states
US20050088890A1 (en) * 2002-11-29 2005-04-28 Yasuhiko Matsunaga NAND type flash EEPROM in which sequential programming process is performed by using different intermediate voltages
WO2006093886A1 (en) * 2005-02-28 2006-09-08 Micron Technology, Inc. Multiple level programming in a non-volatile memory device

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JP3930074B2 (ja) * 1996-09-30 2007-06-13 株式会社ルネサステクノロジ 半導体集積回路及びデータ処理システム
KR100257868B1 (ko) * 1997-12-29 2000-06-01 윤종용 노어형 플래시 메모리 장치의 소거 방법
JP3957985B2 (ja) * 2001-03-06 2007-08-15 株式会社東芝 不揮発性半導体記憶装置
US6657891B1 (en) * 2002-11-29 2003-12-02 Kabushiki Kaisha Toshiba Semiconductor memory device for storing multivalued data
JP4410188B2 (ja) * 2004-11-12 2010-02-03 株式会社東芝 半導体記憶装置のデータ書き込み方法

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US20030002348A1 (en) * 2001-06-27 2003-01-02 Sandisk Corporation Operating techniques for reducing effects of coupling between storage elements of a non-volatile memory operated in multiple data states
US20050088890A1 (en) * 2002-11-29 2005-04-28 Yasuhiko Matsunaga NAND type flash EEPROM in which sequential programming process is performed by using different intermediate voltages
WO2006093886A1 (en) * 2005-02-28 2006-09-08 Micron Technology, Inc. Multiple level programming in a non-volatile memory device

Non-Patent Citations (1)

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Tae-Sung Jung et al.,"A 117-mm2 3.3-V Only 128Mb Multilevel NAND Flash Memory for Mass Storage Applications", IEEE Journal of Solid-state Circuits, Vol. 31, No. 11, November 1996.*

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Publication number Publication date
KR20090007298A (ko) 2009-01-16
EP2030205B1 (en) 2011-07-06
WO2007149677A3 (en) 2008-05-22
ATE515771T1 (de) 2011-07-15
TWI337746B (en) 2011-02-21
JP4994447B2 (ja) 2012-08-08
EP2030205A2 (en) 2009-03-04
WO2007149677A2 (en) 2007-12-27
JP2009541909A (ja) 2009-11-26
TW200814084A (en) 2008-03-16

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