KR101060270B1 - 내고장성 비동기식 회로 - Google Patents

내고장성 비동기식 회로 Download PDF

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Publication number
KR101060270B1
KR101060270B1 KR1020087029014A KR20087029014A KR101060270B1 KR 101060270 B1 KR101060270 B1 KR 101060270B1 KR 1020087029014 A KR1020087029014 A KR 1020087029014A KR 20087029014 A KR20087029014 A KR 20087029014A KR 101060270 B1 KR101060270 B1 KR 101060270B1
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KR
South Korea
Prior art keywords
circuit
output
elements
logic
fault
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KR1020087029014A
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English (en)
Korean (ko)
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KR20090003367A (ko
Inventor
라지트 마노하
클린턴 더블유. 켈리
Original Assignee
아크로닉스 세미컨덕터 코포레이션
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Priority claimed from US11/740,168 external-priority patent/US7505304B2/en
Priority claimed from US11/740,180 external-priority patent/US7504851B2/en
Application filed by 아크로닉스 세미컨덕터 코포레이션 filed Critical 아크로닉스 세미컨덕터 코포레이션
Publication of KR20090003367A publication Critical patent/KR20090003367A/ko
Application granted granted Critical
Publication of KR101060270B1 publication Critical patent/KR101060270B1/ko
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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/41—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger
    • G11C11/412—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming static cells with positive feedback, i.e. cells not needing refreshing or charge regeneration, e.g. bistable multivibrator or Schmitt trigger using field-effect transistors only
    • G11C11/4125—Cells incorporating circuit means for protecting against loss of information
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/003—Modifications for increasing the reliability for protection
    • H03K19/0033—Radiation hardening
    • H03K19/00338—In field effect transistor circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/007—Fail-safe circuits
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits

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  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Static Random-Access Memory (AREA)
  • Logic Circuits (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
KR1020087029014A 2006-04-27 2007-04-27 내고장성 비동기식 회로 Active KR101060270B1 (ko)

Applications Claiming Priority (11)

Application Number Priority Date Filing Date Title
US79612506P 2006-04-27 2006-04-27
US60/796,125 2006-04-27
US81733506P 2006-06-28 2006-06-28
US81750806P 2006-06-28 2006-06-28
US60/817,508 2006-06-28
US60/817,335 2006-06-28
US11/740,180 2007-04-25
US11/740,168 2007-04-25
US11/740,168 US7505304B2 (en) 2006-04-27 2007-04-25 Fault tolerant asynchronous circuits
US11/740,180 US7504851B2 (en) 2006-04-27 2007-04-25 Fault tolerant asynchronous circuits
PCT/US2007/067622 WO2007127917A2 (en) 2006-04-27 2007-04-27 Fault tolerant asynchronous circuits

Publications (2)

Publication Number Publication Date
KR20090003367A KR20090003367A (ko) 2009-01-09
KR101060270B1 true KR101060270B1 (ko) 2011-08-29

Family

ID=38656414

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020087029014A Active KR101060270B1 (ko) 2006-04-27 2007-04-27 내고장성 비동기식 회로

Country Status (4)

Country Link
EP (1) EP2020085B1 (https=)
JP (1) JP5158607B2 (https=)
KR (1) KR101060270B1 (https=)
WO (1) WO2007127917A2 (https=)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7505304B2 (en) 2006-04-27 2009-03-17 Achronix Semiconductor Corporation Fault tolerant asynchronous circuits
US7504851B2 (en) 2006-04-27 2009-03-17 Achronix Semiconductor Corporation Fault tolerant asynchronous circuits
WO2011155532A1 (ja) * 2010-06-11 2011-12-15 国立大学法人京都工芸繊維大学 フリップフロップ回路、半導体装置および電子機器
FR2998688B1 (fr) * 2012-11-29 2014-12-26 Electricite De France Procede de durcissement logique par partitionnement d'un circuit electronique
WO2015056314A1 (ja) * 2013-10-16 2015-04-23 株式会社日立製作所 半導体装置
CN109991531B (zh) * 2019-03-28 2021-12-24 西北核技术研究所 低概率条件下大气中子单粒子效应截面测量方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4785204A (en) * 1985-06-21 1988-11-15 Mitsubishi Denki Kabushiki Kaisha Coincidence element and a data transmission path
DE602004024683D1 (https=) * 2003-07-14 2010-01-28 Fulcrum Microsystems Inc
US7157934B2 (en) * 2003-08-19 2007-01-02 Cornell Research Foundation, Inc. Programmable asynchronous pipeline arrays
WO2006026676A2 (en) * 2004-08-30 2006-03-09 California Institute Of Technology Seu-tolerant qdi circuits
US7301362B2 (en) * 2005-03-14 2007-11-27 California Institute Of Technology Duplicated double checking production rule set for fault-tolerant electronics

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
G.K.M. Fault-Tolerant Asynchronous Sequential Machines, IEEE transaction on computers, July, 1974. pp. 651-657*

Also Published As

Publication number Publication date
EP2020085B1 (en) 2017-11-08
WO2007127917A3 (en) 2008-07-24
EP2020085A4 (en) 2011-04-27
WO2007127917A2 (en) 2007-11-08
JP2009538549A (ja) 2009-11-05
KR20090003367A (ko) 2009-01-09
EP2020085A2 (en) 2009-02-04
JP5158607B2 (ja) 2013-03-06

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