KR101051159B1 - Method for forming semiconductor device - Google Patents

Abstract

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a semiconductor device, wherein a support layer is etched using a photoresist pattern as a mask on a lower electrode to form a first support layer having a line space shape in a cell region, and a second support layer is formed in a ferry region. By preventing the sacrificial insulating layer from being etched into the second support layer during the process, the storage cell open (SCO) mask pattern forming process used to alleviate the step difference between the cell region and the ferry region can be skipped during the subsequent process, and the semiconductor It relates to an invention that can reduce the production cost of the device and improve the process yield.

Description

The method for manufacturing a semiconductor device

1A to 1F are cross-sectional views illustrating a method of forming a semiconductor device in accordance with the present invention.

2 is a plan view showing a method of forming a semiconductor device according to the present invention.

                  Description of the Related Art [0002]

100: semiconductor substrate 110: lower electrode contact plug

120: etching stop film 130: sacrificial insulating film

140: support layer 150: guard ring

155: first photosensitive film pattern 160: lower electrode

165: second photosensitive film pattern 170a: first support layer

170b: second support layer 180: upper electrode

190: interlayer insulating film 1000a: cell region

1000b: Peri Area

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a semiconductor device, wherein a support layer is etched using a photoresist pattern as a mask on a lower electrode to form a first support layer having a line space shape in a cell region, and a second support layer is formed in a ferry region. By preventing the sacrificial insulating layer from being etched into the second support layer during the process, the storage cell open (SCO) mask pattern forming process used to alleviate the step difference between the cell region and the ferry region can be skipped during the subsequent process, and the semiconductor It relates to an invention that can reduce the production cost of the device and improve the process yield.

As the demand for memory devices of semiconductor devices increases rapidly, various techniques have been proposed for obtaining high capacity capacitors.

The capacitor has a structure in which a dielectric film is interposed between the lower electrode for the storage node and the upper electrode for the plate electrode.

The capacitance of the capacitor is proportional to the electrode surface area and the dielectric constant of the dielectric film and is inversely proportional to the spacing between the electrodes, that is, the thickness of the dielectric film. Therefore, a method of using a dielectric film having a high dielectric constant, a method of reducing the thickness of the dielectric film, a method of increasing the lower electrode surface area, or a method of reducing the distance between electrodes has been developed to manufacture a capacitor having a high capacitance.

However, as device size gradually decreases due to an increase in the degree of integration of semiconductor memory devices, it becomes increasingly difficult to manufacture capacitors capable of ensuring sufficient capacitance. Accordingly, researches to improve the structure of the lower electrode have been steadily made. As a solution, a concave type or cylinder type capacitor having a three-dimensional structure has been developed.

Recently, a cylindrical capacitor that uses not only an internal area but also an external area as a node area is more preferred than a concave capacitor using only an internal area as a node area.

However, in the case of a cylinder capacitor, as the length of the capacitor increases, a step occurs between the cell region and the ferry region after the dip-out process.

To alleviate this step, a storage cell open (SCO) mask is used.

In particular, in the case of the cylinder capacitor, the difference between the cell region and the ferry region is increased by the height of the capacitor after the dip-out process.

After forming an interlayer insulating film to planarize such a step, a mask and an etching process using a storage cell open (SCO) mask are performed.

As a result, there is a problem of an increase in the cylinder capacitor forming process and an increase in production cost.

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a method of forming a semiconductor device, wherein a support layer is etched using a photoresist pattern as a mask on a lower electrode to form a first support layer having a line space shape in a cell region, and a second support layer is formed in a ferry region. By preventing etching of the sacrificial insulating film to the second support layer during the process, it is possible to skip the storage cell open (SCO) mask pattern forming process used to alleviate the step difference between the cell region and the ferry region during the subsequent process, It is an object of the present invention to provide a method for forming a semiconductor device that can reduce production costs and improve process yield of the semiconductor device.

The method for forming a semiconductor device according to the present invention,

Forming a sacrificial insulating film and a support layer on the semiconductor substrate having the cell region and the ferry region;

Etching the support layer and the sacrificial insulating layer to form a lower electrode region in the cell region;

Forming a lower electrode on a surface of the lower electrode region formed in the cell region;

Forming a photoresist pattern on the entire surface including the lower electrode; and

Etching the remaining support layer using the photoresist pattern as a mask to form a first support layer remaining in the cell region to support the lower electrode, and simultaneously forming a second support layer remaining in the ferry region. It features.

Here, the first support layer is formed by alternately forming a line pattern for supporting the odd and even columns of the lower electrode,

Removing the photoresist pattern after forming the first support layer and the second support layer;

Removing the sacrificial insulating film of the cell region by a dip out process; and

Forming a dielectric film and an upper electrode on the lower electrode surface;

Forming a guard ring for separating the cell region and the ferry region when the lower electrode is formed;

The support layer is formed of a nitride film.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the technical idea of the present invention.

In addition, in the drawings, the thicknesses of layers and regions are exaggerated for clarity, and if it is mentioned that the layer is on another layer or substrate it may be formed directly on another layer or substrate, Alternatively, a third layer may be interposed therebetween.

Also, the same reference numerals throughout the specification represent the same components.

1A to 1F are cross-sectional views illustrating semiconductor devices formed in accordance with the present invention, and are taken along the line AA ′ of FIG. 2.

Referring to FIG. 1A, an interlayer insulating film (not shown) is formed on the semiconductor substrate 100.

A photosensitive film is formed on the interlayer insulating film, and a photosensitive film pattern (not shown) is formed by an exposure and development process using an exposure mask for lower electrode contact.

An interlayer insulating layer is etched using the photoresist pattern as a mask to form a lower electrode contact hole (not shown) exposing the semiconductor substrate 100.

The lower electrode contact plug 110 may be formed to remove the photoresist pattern and fill the lower electrode contact hole.

In this case, the lower electrode contact plug 110 is formed by forming a contact material filling the lower electrode contact hole and flattening etching the same.

Next, the etch stop layer 120, the sacrificial insulating layer 130, and the support layer 140 are formed on the entire surface.

The support layer 140 is preferably formed of a nitride film.

A photosensitive film is formed on the support layer 140, and the first photosensitive film pattern 155 is formed by an exposure and development process using a lower electrode mask.

Referring to FIG. 1B, the lower electrode region exposing the lower electrode contact plug 110 by etching the support layer 140, the sacrificial insulating layer 130, and the etch stop layer 120 using the first photoresist pattern 155 as a mask ( Not shown).

Next, a conductive layer for a lower electrode (not shown) is formed on the entire surface, including the lower electrode region (not shown).

Thereafter, an oxide film (not shown) filling the lower electrode region is formed on the entire surface, and the guard ring 150 and the lower electrode 160 are formed by planarization etching until the support layer 140 is exposed.

In this case, the guard ring 150 is formed between the cell region 1000a and the ferry region 1000b.

Here, the oxide film remaining inside the lower electrode 160 is removed.

Referring to FIG. 1C, a photosensitive film is formed on the entire surface of the lower electrode 160.

The second photosensitive film pattern 165 is formed by an exposure and development process using an exposure mask.

Referring to FIG. 1D, the support layer 140 is etched using the second photoresist pattern 165 as a mask to form a first support layer 170a in the cell region 1000a, and a second support layer 170b in the ferry region 1000b. ).

In this case, the first support layer 170a is alternately formed in the space between the lower electrodes 160 in a line shape arranged left and right, and the second support layer 170b is formed to cover the entire surface of the ferry region. .

Next, the second photoresist pattern 165 is removed, and a dip out process is performed to remove the sacrificial insulating layer 130 of the cell region 1000a.

At this time, the sacrificial insulating layer 130 of the ferry region 1000b is left as it is, and the step difference with the cell region 1000a is reduced.

In addition, a storage cell open (SCO) mask used to reduce the step difference between the cell region 1000a and the ferry region 1000b may be skipped during the subsequent process.

1E and 1F, a dielectric film (not shown) and an upper electrode 180 are formed on the entire surface including the lower electrode 160.

Next, a photoresist film is formed on the upper electrode 180, and a third photoresist pattern (not shown) is formed by an exposure and development process using a mask.

The upper electrode 180 and the second support layer 170b of the ferry region 1000b are etched using the third photoresist pattern as a mask.

Thereafter, the interlayer insulating layer 190 is formed on the entire surface including the upper electrode 180.

FIG. 2 is a plan view illustrating a semiconductor device formed in accordance with the present invention, and is shown along the cut plane A-A of FIG. 1E.

Referring to FIG. 2, the lower electrode 160, the first support layer 170a, the second support layer 170b, and the guard ring 150 are illustrated.

The lower electrode 160 is formed on the semiconductor substrate 100 of the cell region 1000a by being aligned with each other in up, down, left, and right directions.

The first support layer 170a may be formed by alternately forming a line-shaped support portion that supports the lower electrodes in the odd rows and the even rows in the even rows.

The second support layer 170b is formed on the entire surface of the ferry region 1000b.

The guard ring 150 is formed with a predetermined line width in the cell region 1000a and the ferry region 1000b positioned at the boundary portion.

It can skip the SCO (Storage Cell Open) mask pattern formation process used to alleviate the step difference between the cell region and the ferry region, and provides the effect of reducing the production cost of semiconductor devices and improving the process yield. .

In addition, the preferred embodiment of the present invention for the purpose of illustration, those skilled in the art will be able to various modifications, changes, substitutions and additions through the spirit and scope of the appended claims, such modifications and changes are the following claims It should be seen as belonging to a range.

Claims (5)

Forming a sacrificial insulating film and a support layer on the semiconductor substrate having a cell region and a ferry region; Etching the support layer and the sacrificial insulating layer to form a lower electrode region in the cell region; Forming a lower electrode on a surface of the lower electrode region formed in the cell region; Forming a photoresist pattern on the entire surface including the lower electrode; And Etching the support layer having the photoresist pattern as a mask to support the lower electrode in the cell region, and form a first support layer having alternating line patterns for connecting odd and even rows of the lower electrode. And forming a second support layer remaining in the ferry region at the same time. delete Claim 3 was abandoned when the setup registration fee was paid. The method of claim 1, Removing the photoresist pattern after forming the first support layer and the second support layer; Removing the sacrificial insulating film of the cell region by a dip out process; And And forming a dielectric film and an upper electrode on the lower electrode surface. Claim 4 was abandoned when the registration fee was paid. The method of claim 1, And forming a guard ring that separates the cell region and the ferry region when the lower electrode is formed. Claim 5 was abandoned upon payment of a set-up fee. The method of claim 1, And the supporting layer is formed of a nitride film.

Images