KR101035916B1 - Circuit for driving of Liquid Crystal Display Device - Google Patents

Abstract

SUMMARY OF THE INVENTION The present invention provides a driving circuit of a liquid crystal display device for reducing cost and stably outputting an input power source. The driving circuit of the liquid crystal display device for achieving the above object includes a plurality of gate lines (G); 1. A liquid crystal display device having a liquid crystal display panel in which data lines D are arranged in a direction perpendicular to each other and having a pixel region in a matrix form, wherein the gate driving is performed on a data signal and a gate line on each data line of the liquid crystal display panel. A data driver and a gate driver for inputting a pulse; An input power supply unit; A voltage boosting unit configured to receive an input power from the input power supply unit and output a constant boosted first constant voltage VDD1; A voltage distribution unit configured to receive and distribute the first constant voltage VDD1 to output a power supply voltage Vcc; A filter for separating or stabilizing and outputting the power supply voltage Vcc output through the voltage distribution unit; An ASIC and a driving circuit unit for receiving a power supply voltage output through the filter and outputting a data signal to the data driver; A delay output unit configured to delay and output the second constant voltage VDD2 boosted by receiving the input power; A gamma output unit configured to receive the delayed second constant voltage VDD2 and output a gamma voltage to the data driver, wherein the delay output unit inputs a delay circuit unit to delay output the input power and an output of the delay circuit unit. The turn-on / turn-off is determined and includes a switching transistor ST1 configured between an output node of the voltage boosting unit and a ground voltage terminal.

Voltage booster, DC / DC converter, delay output

Description

Circuit for driving of Liquid Crystal Display Device

1 is a block diagram of a driving circuit of a general liquid crystal display device

2 is a block diagram illustrating a driving circuit of a liquid crystal display according to the related art.

3 is a diagram illustrating a configuration of a conventional input power supply unit

4 is an exemplary configuration diagram of circuits constituting a conventional filter.

5 is an exemplary configuration diagram of a conventional regulator

6 is a block diagram illustrating a driving circuit of a liquid crystal display according to an exemplary embodiment of the present invention.

Explanation of symbols on the main parts of the drawings

60: input power unit 61: voltage boosting unit

62: voltage divider 63: filter

64: AIZ and driving circuit section 65: delay output section

66: gamma output section 67: delay circuit section

68: DC / DC converter 70: liquid crystal display panel

71: data driver 72: gate driver

The present invention relates to a liquid crystal display device, and more particularly to a driving circuit of the liquid crystal display device for the stability of the input power source.

As the information society develops, the demand for display devices is increasing in various forms, and in recent years, liquid crystal display devices (LCDs), plasma display panels (PDPs), electro luminescent displays (ELDs), and vacuum fluorescent (VFD) Various flat panel display devices such as displays have been studied, and some of them are already used as display devices in various devices.

Among them, LCD is the most widely used as the substitute for CRT (Cathode Ray Tube) for mobile image display because of its excellent image quality, light weight, thinness, and low power consumption. In addition to the use of the present invention, a variety of applications such as a television, a computer monitor, and the like for receiving and displaying broadcast signals have been developed.

Such a liquid crystal display may be classified into a liquid crystal display panel displaying a video signal and a driving circuit applying a driving signal to the liquid crystal display panel from the outside.

Although not shown in the drawing, the liquid crystal display panel is a display device in which liquid crystal is injected between two transparent substrates (glass substrates) bonded to each other with a predetermined space, and a plurality of liquid crystal display panels arranged at regular intervals on one of the two transparent substrates. A plurality of gate lines, a plurality of data lines arranged at regular intervals in a direction perpendicular to the gate lines, a plurality of pixel electrodes formed in each pixel region in a matrix form defined by the gate lines and the data lines, A plurality of thin film transistors for applying the signal of the data line to each pixel electrode in accordance with the signal of the gate line is formed at a portion where the gate line and the data line cross each other. A color filter layer, a common electrode, and a black matrix layer are formed on the remaining substrates.

Therefore, when the turn-on signal is sequentially applied to the gate line, an image is displayed because the data signal is applied to the pixel electrode of the corresponding line.

In addition, a backlight is provided on the back surface of the two substrates thus bonded to provide a uniform light source.

In addition, in the case of the liquid crystal display device, the amount of current used varies depending on the image displayed on the screen. For example, in the normally white mode, in which liquid crystal molecules are rearranged in the direction of an electric field with the application of a voltage to block incident light, the panel consumes more power as the number of bright pixels on the screen increases. On the other hand, as the number of dark pixels increases, the power consumed by the panel tends to increase. By using this tendency, a method of controlling a current value of a lamp interlocked with the panel according to power consumed is mainly used.

The application of this technique requires the implementation of additional circuitry such as detecting the current consumed by the panel and modifying it to fit the variable range of the luminance control signal of the inverter driving the backlight.

Hereinafter, a driving circuit of a general liquid crystal display device will be described with reference to the accompanying drawings.

1 is a block diagram of a driving circuit of a general liquid crystal display device.

As described above, the driving circuit of the liquid crystal display device includes a liquid crystal display panel 1 having a plurality of gate lines G and data lines D arranged in a direction perpendicular to each other and having a matrix-like pixel region, and the liquid crystal. The driving circuit unit 2 supplies a driving signal and a data signal to the display panel 1, and the backlight 8 provides a constant light source to the liquid crystal display panel 1.

The driving circuit unit 2 applies a gate driver pulse to a data driver 1b for inputting a data signal to each data line of the liquid crystal display panel 1 and a gate line of the liquid crystal display panel 1. Input the gate driver 1a, the display data R, G, and B inputted from the driving system of the liquid crystal display panel, and the control signals DTEN such as the vertical and horizontal synchronization signals Vsync and Hsync and the clock signal DCLK. A timing controller 3 which formats and outputs each display data, a clock, and a control signal at a timing suitable for each data driver 1b and the gate driver 1a of the liquid crystal display panel 1 to reproduce a screen; A power supply unit 4 for supplying a voltage required for the liquid crystal display panel 1 and each unit, and digital data input from the data driver 1b by receiving power from the power supply unit 4; A gamma reference voltage unit 5 for supplying a reference voltage required for conversion into analog data, a constant voltage V _DD and a gate used in the liquid crystal display panel 1 using the voltage output from the power supply unit 4. A DC / DC converter 6 for outputting a high voltage V _GH , a gate low voltage V _GL , a reference voltage V _ref , a common voltage Vcom, and an inverter for driving the backlight 8; 9) is configured.

The operation of the driving circuit of the conventional liquid crystal display device configured as described above is as follows.

That is, the timing controller 3 controls the display data R, G, and B inputted from the driving system PC of the liquid crystal display panel, the control signals such as the vertical and horizontal synchronization signals Vsync and Hsync, and the clock signal DCLK. Since the data driver 1b and the gate driver 1a of the liquid crystal display panel 1 provide each display data, a clock, and a control signal at a timing suitable for reproducing the screen, The gate driver 1a applies a gate driving pulse to each gate line of the liquid crystal display panel 1, and in synchronization therewith, the data driver 1b applies a data signal to each data line of the liquid crystal display panel 1. Display the input video signal.

In this case, the backlight 8 provides a backlight having a constant brightness regardless of the brightness of the input image signal.

Hereinafter, a driving circuit of a conventional liquid crystal display device will be described with reference to the accompanying drawings.

2 is a block diagram illustrating a driving circuit of a liquid crystal display according to the related art.

3 is a diagram illustrating a configuration of a conventional input power supply terminal, FIG. 4 is a diagram illustrating a configuration of circuits constituting a conventional filter, and FIG. 5 is a diagram illustrating a configuration of a conventional regulator.

As shown in FIG. 2, the driving circuit of the liquid crystal display according to the related art includes an input power supply unit 20, a filter 22 for receiving and stabilizing power by receiving an input power source Vcc, and the filter 22. The ASIC and the driving circuit unit 23 for receiving the separated power voltage through the input power and outputting the driving signal to the data driver, and receiving the input power from the input power supply unit 20 to output the constant voltage VDD. A DC / DC converter 24 and a gamma output unit 25 for receiving the constant voltage VDD and outputting a gamma voltage to a data driver.

In the above, the regulator 21 may be further provided between the input power supply unit 20 and the filter 22.

Reference numeral 26 denotes a liquid crystal display panel in which a plurality of gate lines G and data lines D are arranged in a direction perpendicular to each other, and have a matrix-type pixel region, and '27' denotes the liquid crystal display panel 26. Is a data driver for inputting a data signal to each data line, and '28' is a gate driver for applying a gate driving pulse to each gate line of the liquid crystal display panel 26.

3 is a diagram illustrating the configuration of the input power supply unit 20. The power supply voltage is represented by IVCC. FIG. 4 is a diagram illustrating various configurations of circuits constituting the conventional filter 22. FIG. 5 is a diagram of a conventional regulator. It is an example of the structure of (21).

As described above, the DC power of the input power supply unit 20 is directly supplied to the ASIC and the driving circuit through the regulator and the filter, or directly to the ASIC and the driving circuit through the filter. In the case of further use, an additional circuit configuration such as that shown in FIG. 5 is required, resulting in a higher cost.

And if the driving voltage is applied to the AC and drive circuit using only the filter without using the regulator, voltage drop occurs through the user connector of the input power supply, and the data driver is supplied with unstable power or the data voltage of the desired size is output. A problem may arise. Such unstable power supply directly causes image defects.

SUMMARY OF THE INVENTION The present invention has been made to solve the above problems, and an object of the present invention is to provide a driving circuit of a liquid crystal display device for saving cost and stably outputting input power.

A driving circuit of a liquid crystal display according to the present invention for achieving the above object is a liquid crystal display panel having a plurality of gate lines (G) and the data line (D) arranged in a direction perpendicular to each other having a pixel region of the matrix form A liquid crystal display device comprising: a data driver and a gate driver for inputting a data signal to each data line of the liquid crystal display panel and a gate driving pulse to each gate line; An input power supply unit; A voltage boosting unit configured to receive an input power from the input power supply unit and output a constant boosted first constant voltage VDD1; A voltage distribution unit configured to receive and distribute the first constant voltage VDD1 to output a power supply voltage Vcc; A filter for separating or stabilizing and outputting the power voltage Vcc output through the voltage distribution unit; An ASIC and a driving circuit unit for receiving a power supply voltage output through the filter and outputting a data signal to the data driver; A delay output unit configured to delay and output the second constant voltage VDD2 boosted by receiving the input power; And a gamma output unit configured to receive the delayed second constant voltage VDD2 and output a gamma voltage to the data driver.

The voltage booster includes an inductance L1 having one end connected to the input power unit, a diode D1 configured between the inductance L1 and the first constant voltage output node of the voltage booster, and the other end of the inductance L1 and ground. It is characterized by consisting of a switch (S1) connected in parallel between the voltage terminals.

The delay output unit includes a delay circuit unit for delaying an input power and a switching transistor ST1 configured to be turned on / off by receiving an output of the delay circuit unit and configured between an output node of the voltage boost unit and a ground voltage terminal. It features.

The second constant voltage VDD2 output node of the delay output unit is positioned between the voltage boosting unit and one end of the switching transistor ST1.

The diode D1 and the switch S1 of the voltage boosting unit and the delay output unit 65 may be configured in one chip.

It is characterized in that it further comprises a regulator without having the voltage divider.

The first constant voltage VDD1 and the second constant voltage VDD2 have the same magnitude.

Hereinafter, a driving circuit of a liquid crystal display according to an exemplary embodiment of the present invention will be described with reference to the accompanying drawings.

6 is a block diagram illustrating a driving circuit of the liquid crystal display according to the present invention.

According to the present invention, a plurality of gate lines (G) and data lines (D) are arranged in a direction perpendicular to each other and have a matrix-shaped pixel region, and a driving for supplying driving signals and data signals to the liquid crystal display panels. A circuit portion and a circuit arrangement for supplying a data signal from a driving circuit portion to a data driver among a backlight for providing a constant light source to the liquid crystal display panel.

As shown in FIG. 6, a driving circuit of a liquid crystal display device according to an exemplary embodiment of the present invention includes a data driver 71 for inputting a data signal to each data line of the liquid crystal display panel 70, and the liquid crystal display. Voltage boosting for outputting a gate driver 72 for applying a gate driving pulse to each gate line of the panel 70, an input power supply unit 60, and a first constant voltage VDD1 that is boosted by receiving an input power supply from the input power supply unit. A voltage distribution unit 62 that receives the unit 61, the first constant voltage VDD1, and distributes the output voltage to the power supply voltage Vcc; and a power supply voltage Vcc output through the voltage distribution unit 62. A filter (63) for separating or stabilizing the output signal, an ASIC and a driving circuit unit (64) for receiving a power voltage output through the filter (63), and outputting a driving signal to a data driver; A second boosted by receiving the input power Vcc And the voltage (VDD2), the delayed output delay output unit (65) for the, receiving a second positive voltage of the delay output (VDD2) is composed of a gamma-output unit 66 for outputting a gamma voltage to the data driver.

The voltage booster 61 includes a diode configured between an inductance L1 having one end connected to an input power supply 60, and an output node of the first constant voltage VDD1 of the inductance L1 and the voltage booster 61. D1) and a switch S1 connected in parallel between the other end of the inductance L1 and the ground voltage terminal.

In addition, the delay output unit 65 receives a delay circuit unit 67 for delaying and outputting an input power, and the turn-on / turn-off is determined by receiving the output of the delay circuit unit 67, and the output terminal and the ground of the voltage booster 61 are grounded. It consists of a switching transistor ST1 comprised between voltage terminals. In this case, the second constant voltage VDD2 output node of the delay output unit 65 is positioned between the voltage boosting unit 61 and one end of the switching transistor ST1.

The voltage boosting unit 61 outputting the first constant voltage VDD1 eliminates a problem caused by the voltage drop phenomenon of the input power supply unit 60, which is a conventional user connector, and always maintains a constant first constant voltage VDD1. Is outputted to the voltage distribution unit 62 and distributed to output the stable power supply voltage Vcc at all times. That is, the voltage boosting unit 61 is a constant voltage output unit for outputting a stable Vcc without a voltage drop.

For example, the voltage boosting unit 61 outputs the same constant voltage (eg, 7V) even when 4V, 3V, or 2.5V are input from the input power supply unit 60. Accordingly, through the voltage distribution unit 62, it is possible to always output a stable power supply voltage.

The delay output unit 65 is configured to delay the power supply voltage Vcc output through the voltage divider 62 so that the second constant voltage VDD2 is output. That is, it is configured to match the power sequence when power is supplied to the data driver through the gamma output unit 66. In this case, the second constant voltage VDD2 has the same magnitude as the first constant voltage VDD1.

In the above, the diode D1 and the switch S1 of the voltage boosting unit 61, the delay circuit unit 67 and the switching transistor ST1 of the delay output unit 65 are configurable in one chip. It serves as a DC / DC converter 68 for outputting Vcc).

In the above, a regulator may be used instead of the voltage divider 62.

Although not shown in the drawing, the DC / DC converter 68 may include not only the first and second constant voltages VDD1 and VDD2, but also a gate high voltage V _GH , a gate low voltage V _GL , and a reference voltage V _ref . And a common voltage Vcom.

Those skilled in the art will appreciate that various changes and modifications can be made without departing from the spirit of the present invention.

Therefore, the technical scope of the present invention should not be limited to the contents described in the above embodiments, but should be defined by the claims.

The driving circuit of the liquid crystal display device of the present invention as described above has the following effects.

First, since a constant constant voltage VDD1 is always output using the voltage booster, Vcc is output through the voltage divider, and thus a stable power supply voltage can be output to the logic and driving circuits.

Second, since the diode and the switch of the voltage boosting unit and the second constant voltage delay output unit may be provided on a single chip to serve as a new DC / DC changing unit, the power circuit configuration can be simplified.

Third, stable power supply voltage (Vcc) can be output without using a separate regulator, which can solve the problem of additional cost.

Claims (7)

In the liquid crystal display device having a liquid crystal display panel having a plurality of gate lines (G) and data lines (D) arranged in a direction perpendicular to each other having a pixel region of the matrix form, A data driver and a gate driver for inputting a data signal to each data line of the liquid crystal display panel and a gate driving pulse to each gate line; An input power supply unit; A voltage boosting unit configured to receive an input power from the input power supply unit and output a constant boosted first constant voltage VDD1; A voltage distribution unit configured to receive and distribute the first constant voltage VDD1 to output a power supply voltage Vcc; A filter for separating or stabilizing and outputting the power supply voltage Vcc output through the voltage distribution unit; An ASIC and a driving circuit unit for receiving a power supply voltage output through the filter and outputting a data signal to the data driver; A delay output unit configured to delay and output the second constant voltage VDD2 boosted by receiving the input power; A gamma output unit configured to receive the delayed second constant voltage VDD2 and output a gamma voltage to the data driver, The delay output unit includes a delay circuit unit for delaying and outputting the input power and a switching transistor ST1 configured to be turned on / off by receiving an output of the delay circuit unit and configured between an output node of the voltage booster unit and a ground voltage terminal. A driving circuit of the liquid crystal display device. The method of claim 1, The voltage boosting unit has an inductance L1 having one end connected to the input power supply unit, A diode D1 configured between the inductance L1 and the first constant voltage output node of the voltage boosting unit, And a switch (S1) connected in parallel between the other end of the inductance (L1) and the ground voltage terminal. delete The method of claim 1, And a second constant voltage (VDD2) output node of the delay output unit is located between the voltage boosting unit and one end of the switching transistor ST1. The method according to claim 1 or 2, And a diode (D1) and a switch (S1) of the voltage boosting unit and the delay output unit in one chip. The method of claim 1, And a regulator without having the voltage divider unit. The method of claim 1, And the first constant voltage VDD1 and the second constant voltage VDD2 have the same magnitude.

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