KR100504544B1 - driving circuit of liquid crystal display device - Google Patents

Abstract

The present invention relates to a driving circuit of a liquid crystal display device which reduces EMI between neighboring data paths by opening only the data path of a corresponding data driver when inputting data signals to the plurality of data drivers. A timing controller for outputting a digital data signal and a selection signal, a switching unit for outputting a digital data signal corresponding to one of the digital data signals corresponding to the plurality of data drivers according to the selection signal of the timing controller; And a plurality of data drivers converting the digital data signal of the timing controller output through the switching unit into an analog image signal and applying the same to the pixel electrodes of the liquid crystal panel.

Description

Driving circuit of liquid crystal display device

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a driving circuit of a liquid crystal display device, and more particularly to a driving circuit of a liquid crystal display device suitable for eliminating electro magnetic interference (EMI).

As the information society develops, the demand for display devices is increasing in various forms, and in recent years, liquid crystal display devices (LCDs), plasma display panels (PDPs), electro luminescent displays (ELDs), and vacuum fluorescent (VFD) Various flat panel display devices such as displays have been studied, and some of them are already used as display devices in various devices.

Among them, LCD is the most widely used as the substitute for CRT (Cathode Ray Tube) for mobile image display because of its excellent image quality, light weight, thinness, and low power consumption. In addition to the use of the present invention, a variety of applications such as a television, a computer monitor, and the like for receiving and displaying broadcast signals have been developed.

Such a liquid crystal display may be classified into a liquid crystal display panel displaying a video signal and a driving circuit applying a driving signal to the liquid crystal display panel from the outside.

Although not shown in the drawing, the liquid crystal display panel is a display device in which liquid crystal is injected between two transparent substrates (glass substrates) bonded to each other with a predetermined space, and a plurality of liquid crystal display panels arranged at regular intervals on one of the two transparent substrates. A plurality of gate lines, a plurality of data lines arranged at regular intervals in a direction perpendicular to the gate line, a plurality of pixel electrodes formed in each pixel region in a matrix form defined by the gate lines and the data lines, In accordance with the signal of the gate line, a plurality of thin film transistors for applying the signal of the data line to each pixel electrode is formed at a portion where the gate line and the data line cross each other. A color filter layer, a common electrode, and a black matrix layer are formed on the remaining substrates.

Therefore, when the turn-on signal is sequentially applied to the gate line, an image is displayed because the data signal is applied to the pixel electrode of the corresponding line.

In addition, a backlight is provided on the back surface of the two substrates thus bonded to provide a uniform light source. CCFL (Cold Cathode Fluorescent Lamp), which is used as a light source of the backlight, has an inverse relationship in brightness and lifetime in terms of its characteristics. That is, when driving at a high current to increase the brightness, the life is reduced, while to increase the life, it is difficult to achieve high luminance because it must be driven at a low current.

In practice, however, in most cases, high brightness and long life are required simultaneously.

To meet these demands, while driving a screen with a certain brightness in a screen state of a general liquid crystal display device, when driving a screen where a high brightness is required, a high current is temporarily applied to a backlight lamp to temporarily It is applying technology to widen the active area.

In addition, in the case of the liquid crystal display device, the amount of current used varies depending on the image displayed on the screen. For example, in the normally white mode, in which liquid crystal molecules are rearranged in the direction of an electric field with the application of a voltage to block incident light, the panel consumes more power as the number of bright pixels on the screen increases. On the other hand, as the number of dark pixels increases, the power consumed by the panel tends to increase. By using this tendency, a method of controlling a current value of a lamp interlocked with the panel according to power consumed is mainly used.

The application of this technique requires the implementation of additional circuitry such as detecting the current consumed by the panel and modifying it to fit the variable range of the luminance control signal of the inverter driving the backlight.

1 is an exploded perspective view illustrating a part of a general liquid crystal display device.

As shown in FIG. 1, the lower substrate 1 and the upper substrate 2 bonded to each other with a predetermined space, and the liquid crystal layer 3 injected between the lower substrate 1 and the upper substrate 2 are composed of. It is.

More specifically, the lower substrate 1 has a plurality of gate lines 4 arranged in one direction at regular intervals to define the pixel region P, and in a direction perpendicular to the gate lines 4. A plurality of data lines 5 are arranged at regular intervals, and pixel electrodes 6 are formed in each pixel region P where the gate lines 4 and the data lines 5 intersect, and each of the gate lines The thin film transistor T is formed at the portion where (4) and the data wiring 5 intersect.

The upper substrate 2 includes a black matrix layer 7 for blocking light in portions other than the pixel region P, an R, G, and B color filter layer 8 for expressing color colors, and an image. The common electrode 9 is formed to implement the.

The thin film transistor T may include a gate electrode protruding from the gate line 4, a gate insulating film (not shown) formed on a front surface, an active layer formed on the gate insulating film above the gate electrode, and the data. A source electrode protruding from the wiring 5 and a drain electrode are provided so as to face the source electrode.

The pixel electrode 6 uses a transparent conductive metal having a relatively high light transmittance, such as indium-tin-oxide (ITO).

In the liquid crystal display device configured as described above, the liquid crystal layer 3 positioned on the pixel electrode 6 is aligned by a signal applied from the thin film transistor T, and the liquid crystal layer 3 is aligned with the alignment degree of the liquid crystal layer 3. Accordingly, the image can be expressed by controlling the amount of light passing through the liquid crystal layer 3.

As described above, the liquid crystal panel drives the liquid crystal by an electric field applied up and down, and has excellent characteristics such as transmittance and aperture ratio, and the common electrode 9 of the upper substrate 2 serves as a ground to discharge static electricity. It is possible to prevent the destruction of the liquid crystal cell.

Hereinafter, a driving circuit of a conventional liquid crystal display device will be described with reference to the accompanying drawings.

2 is a schematic diagram illustrating a driving circuit of a general liquid crystal display device.

As shown in FIG. 2, a plurality of gate lines G and a data line D are arranged in a direction perpendicular to each other to have a matrix-type pixel region, and the liquid crystal display panel 21. ) Is divided into a driving circuit unit 22 for supplying a driving signal and a data signal, and a backlight 28 for providing a constant light source to the liquid crystal display panel 21.

Here, the driving circuit unit 22 drives a gate to the data driver 21b for inputting a data signal to each data line of the liquid crystal display panel 21 and the gate lines G of the liquid crystal display panel 21. A gate driver 21a for applying a pulse, display data R, G, and B input from a driving system 27 of a liquid crystal display panel, vertical and horizontal synchronization signals Vsync, Hsync, a clock signal DCLK, and the like. A timing controller that receives a control signal and formats and outputs each display data, a clock, and a control signal at a timing suitable for each data driver 21b and the gate driver 21a of the liquid crystal display panel 21 to reproduce a screen. 23, a power supply unit 24 for supplying a voltage required for the liquid crystal display panel 21 and each part, and a digital input from the data driver 21b by receiving power from the power supply unit 24; A gamma reference voltage unit 25 for supplying a reference voltage necessary for converting data into analog data, a constant voltage VDD used in the liquid crystal display panel 21 using the voltage output from the power supply unit 24, DC / DC converter 26 for outputting a gate high voltage VGH, a gate low voltage VGL, a reference voltage Vref, a common voltage Vcom, and an inverter 29 for driving the backlight 28. It is configured to include.

The operation of the driving circuit of the conventional liquid crystal display device configured as described above is as follows.

That is, the timing controller 23 controls the display data R, G, and B, and the control signals such as the vertical and horizontal synchronization signals Vsync and Hsync and the clock signal DCLK, which are input from the driving system 27 of the liquid crystal display panel. Since the data driver 21b and the gate driver 21a of the liquid crystal display panel 21 provide the display data, the clock, and the control signal at a timing suitable for reproducing the screen, the gate driver 21a A gate driving pulse is applied to each gate line G of the liquid crystal display panel 21 and the data driver 21b inputs a data signal to each data line D of the liquid crystal display panel 21 in synchronization with the gate driving pulse. Display the input video signal.

At this time, the backlight 28 provides a backlight having a constant brightness regardless of the brightness of the input video signal.

3 is a schematic configuration diagram illustrating a driving circuit of a conventional liquid crystal display device.

In general, the higher the resolution, the larger the number of data lines, so that a plurality of data drivers 32 are configured as shown in FIG. 3.

The plurality of data drivers 32 are connected to the timing controller 31 through one common line, and sequentially apply image signals corresponding to one dot from the timing controller 31 through the common line. When the video signal corresponding to one line is latched, the data signal is output to the data line 33 at once.

However, in order for the plurality of data drivers 32 to latch the video signals, the timing controller 31 must output the video signals at a very high speed. That is, the operating frequency of the timing controller 31 should be high.

This high operating frequency puts a significant electrical load on the data driver 32 and the peripheral devices, and also causes electromagnetic interference (EMI) between paths due to high frequencies.

Disclosure of Invention The present invention has been made to solve the above-mentioned problems. When the data signal is input to a plurality of data drivers, the liquid crystal display device reduces EMI between neighboring data paths by only opening the data path of the corresponding data driver. The purpose is to provide a driving circuit.

A driving circuit of a liquid crystal display according to a first embodiment of the present invention for achieving the above object is a timing controller for outputting a digital data signal and a selection signal corresponding to a plurality of data drivers, and a selection signal of the timing controller A switching unit for outputting a digital data signal corresponding to one data driver among the digital data signals corresponding to the plurality of data drivers, and converting the digital data signal of the timing controller output through the switching unit into an analog image signal. And a plurality of data drivers applied to the pixel electrodes of the liquid crystal panel.

Here, the switching unit is configured inside or outside the timing controller.

In addition, the driving circuit of the liquid crystal display according to the second embodiment of the present invention includes a timing controller for outputting a digital data signal and a selection signal corresponding to a plurality of data drivers, and the plurality of data according to the selection signal of the timing controller. A switching unit for outputting a digital data signal corresponding to two or more neighboring data drivers among the digital data signals corresponding to the driver, and converting the digital data signal of the timing controller output through the switching unit into an analog image signal to convert the liquid crystal panel And a plurality of data drivers applied to the pixel electrodes.

In addition, the driving circuit of the liquid crystal display according to the third embodiment of the present invention includes a timing controller for outputting a digital data signal corresponding to a plurality of data drivers, and converts the digital data signal output from the timing controller into an analog image signal. And a plurality of data drivers to be applied to the pixel electrodes of the liquid crystal panel, and a plurality of data drivers configured to be in front of each of the data drivers to selectively output digital data signals of the timing controller to the respective data drivers by an external control signal. It is characterized by comprising a number of switches.

Hereinafter, the driving circuit of the liquid crystal display according to the present invention will be described in detail with reference to the accompanying drawings.

4 is a schematic diagram illustrating a driving circuit of the liquid crystal display according to the first embodiment of the present invention.

As shown in FIG. 4, display image data (R, G, B), control signals such as vertical and horizontal synchronization signals (Vsync, Hsync) and clock signal (DCLK), which are input from the driving system of the liquid crystal display panel, are received. A timing controller 41 for outputting each digital data signal and a selection signal at a timing suitable for reproducing the screen, and converting the digital data signal of the timing controller 41 into an analog image signal and applying the same to the pixel electrodes of the liquid crystal panel; A digital data signal corresponding to one data driver 42 among a plurality of data drivers 42 and digital data signals corresponding to the plurality of data drivers 42 according to a selection signal of the timing controller 41. It comprises a switching unit 43 for selectively outputting the.

In this case, the switching unit 43 may be arbitrarily configured inside or outside the timing controller 41.

The driving circuit of the liquid crystal display according to the present invention configured as described above generates a select signal output from the timing controller 41 and controls the switching unit 43 so that the digital data signal 42 can be input. Open only the data path of.

Therefore, when the digital data signal is input to the data driver 42, only the data path is opened, thereby minimizing the data path through which the digital data signal flows, thereby reducing the occurrence of EMI between the data paths.

In addition, the second embodiment of the present invention allows two or more neighboring data drivers to be connected to one or more data paths in order to solve the problem of reducing EMI in the first embodiment but greatly increasing the number of wires.

That is, FIG. 5 is a schematic configuration diagram showing a driving circuit of the liquid crystal display according to the second embodiment of the present invention.

As shown in FIG. 5, display image data (R, G, B) and control signals, such as vertical and horizontal synchronization signals (Vsync, Hsync) and clock signal (DCLK), are input from the driving system of the liquid crystal display panel. A timing controller 41 for outputting each digital data signal and a selection signal at a timing suitable for reproducing the screen, and converting the digital data signal of the timing controller 41 into an analog image signal and applying the same to the pixel electrodes of the liquid crystal panel; One of the plurality of data drivers 42 and two or more data drivers 42 neighboring among the digital data signals corresponding to the plurality of data drivers 42 according to the selection signal of the timing controller 41. And a switching unit 43 for selectively outputting the digital data signal through the data path.

In this case, the switching unit 43 may be arbitrarily configured inside or outside the timing controller 41.

On the other hand, in order to simplify the wiring, as in the third embodiment, the data path is controlled using the plurality of switches S1, S2, and S3.

That is, FIG. 6 is a schematic diagram illustrating a driving circuit of the liquid crystal display according to the third embodiment of the present invention.

As shown in FIG. 6, display image data (R, G, B) and control signals such as vertical and horizontal synchronization signals (Vsync, Hsync) and clock signal (DCLK), which are input from the driving system of the liquid crystal display panel, are received. A timing controller 41 for outputting each digital data signal and a selection signal at a timing suitable for reproducing the screen, and converting the digital data signal of the timing controller 41 into an analog image signal and applying the same to the pixel electrodes of the liquid crystal panel; A plurality of data drivers 42 and a plurality of data drivers 42 that are configured in front of each of the data drivers 42 to selectively turn on / off data paths corresponding to the plurality of data drivers 42 according to external control signals. It consists of two switches S1, S2, and S3.

Here, the state of the switch for inputting the digital data signal to each of the data drivers 42 is as follows.

D-IC # 1 D-IC # 2 D-IC # 3 D-IC # 4 S1 off on on on S2 off off on on S3 off off off on

As the area of LCD panels becomes larger and higher in resolution, the spatial distribution of data paths through which digital data signals flow increases, and EMI increases due to high frequencies.

However, when the driving circuit of the liquid crystal display device of the present invention is applied, EMI can be significantly reduced.

As described above, the driving circuit of the liquid crystal display according to the present invention has the following effects.

That is, when inputting a digital data signal to each data driver, only the corresponding data path is selectively opened, thereby minimizing the data path through which the digital data signal flows, thereby reducing EMI generated between the data paths.

1 is an exploded perspective view showing a part of a general liquid crystal display device

2 is a schematic diagram illustrating a driving circuit of a general liquid crystal display device;

3 is a schematic configuration diagram showing a driving circuit of a conventional liquid crystal display device;

4 is a schematic structural diagram showing a driving circuit of a liquid crystal display according to a first embodiment of the present invention;

5 is a schematic configuration diagram showing a driving circuit of a liquid crystal display according to a second embodiment of the present invention.

6 is a schematic diagram illustrating a driving circuit of a liquid crystal display according to a third exemplary embodiment of the present invention.

Explanation of symbols for the main parts of the drawings

41: timing controller 42: data driver

43: switching unit

Claims (5)

A timing controller for outputting digital data signals and selection signals corresponding to the plurality of data drivers; A switching unit configured to output a digital data signal corresponding to one data driver among the digital data signals corresponding to the plurality of data drivers according to the selection signal of the timing controller; And a plurality of data drivers converting the digital data signal of the timing controller output through the switching unit into an analog image signal and applying the same to the pixel electrodes of the liquid crystal panel. The driving circuit of claim 1, wherein the switching unit is configured inside or outside the timing controller. A timing controller for outputting digital data signals and selection signals corresponding to the plurality of data drivers; A switching unit for outputting a digital data signal corresponding to two or more neighboring data drivers among digital data signals corresponding to the plurality of data drivers according to the selection signal of the timing controller; And a plurality of data drivers converting the digital data signal of the timing controller output through the switching unit into an analog image signal and applying the same to the pixel electrodes of the liquid crystal panel. The driving circuit of claim 3, wherein the switching unit is configured inside or outside the timing controller. A timing controller for outputting digital data signals corresponding to a plurality of data drivers; A plurality of data drivers converting the digital data signal output from the timing controller into an analog image signal and applying the same to the pixel electrodes of the liquid crystal panel; And a plurality of switches configured in front of each of the data drivers and selectively outputting digital data signals of the timing controller to each of the data drivers by external control signals.