KR101006517B1 - Phase-change memory device and method for manufacturing the same - Google Patents

Abstract

The present invention discloses a phase change memory device capable of reducing the amount of current required for phase change of a phase change film by reducing the contact area between the phase change film and the bottom electrode, and a manufacturing method thereof. The disclosed phase change memory device includes a first insulating film formed on a semiconductor substrate including a predetermined substructure and having a first contact hole exposing a predetermined portion of the substrate, and filling the first contact hole. A second insulating film, a phase change film, and a third insulating film formed on a lower electrode contact, and sequentially formed on the first insulating film including the lower electrode contact and exposing the lower electrode contact, and an extension of the third insulating film. And a contact hole formed in the portion and exposing a portion of the phase change film, an upper electrode contact to fill the contact hole, and an upper electrode connected to the upper electrode contact.

Description

Phase change memory device and its manufacturing method {PHASE-CHANGE MEMORY DEVICE AND METHOD FOR MANUFACTURING THE SAME}

1 is a graph for explaining a method of programming and erasing a phase change memory device.

2 is a cross-sectional view for explaining a conventional phase change memory element.

3 is a cross-sectional view illustrating a phase change memory device according to an embodiment of the present invention.

4A to 4F are cross-sectional views for each process for explaining a method of manufacturing a phase change memory device according to an embodiment of the present invention.

Explanation of symbols on main parts of drawing

40: semiconductor substrate 41: first insulating film

42: first contact hole 43: lower electrode contact

44: second insulating film 45: phase change film

46: third insulating film 47: opening

48: lower electrode 49: contact surface

50: fourth insulating film 51: second contact hole

52: upper electrode contact 53: upper electrode

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor memory device. More particularly, the present invention relates to a phase change memory for reducing the amount of current required for a phase change of a phase change film by reducing the contact area between the phase change film and the bottom electrode. An element and a method of manufacturing the same.

Semiconductor memory devices, such as DRAM (dynamic random access memory) and SRAM (static random access memory (SRAM)), are volatile and fast data input / output (RAM) products that lose data over time. Once the data is entered, it can be maintained, but it can be divided into read only memory (ROM) products that have slow input / output data. Such typical memory elements represent logic '0' or logic '1' depending on the stored charge.

Here, the DRAM, which is a volatile memory device, requires high charge storage capability because periodic refresh operation is required, and thus many efforts have been made to increase the surface area of a capacitor electrode. However, increasing the surface area of the capacitor electrode makes it difficult to increase the integration of the DRAM device.

On the other hand, nonvolatile memory devices have almost indefinite storage capacities, and in particular, demand for flash memory devices that can be electrically input and output such as EEPROM (elecrtically erasable and programmable ROM) is increasing.                         

Such flash memory cells generally have a vertically stacked gate structure with a floating gate formed on a silicon substrate. The multilayer gate structure typically includes one or more tunnel oxide or dielectric films and a control gate formed on or around the floating gate, wherein the principle of writing or erasing data in the flash memory cell is based on It uses a method of tunneling charges through. At this time, a higher operating voltage than the power supply voltage is required. As a result, the flash memory elements require a boosting circuit to form a voltage necessary for writing and erasing operations.

Therefore, many efforts have been made to develop a new memory device having a non-volatile characteristic, random access, and a simple structure while increasing the integration of the device. A representative example is a phase change random access memory (PRAM). to be.

The phase change memory device widely uses a chalcogenide film as a phase change film. In this case, the chalcogenide film is a compound film containing germanium (Ge), stevidium (Sb), and tellurium (Te) (hereinafter referred to as a 'GST film'), wherein the GST film is provided with a current, that is, Joule According to joule heat, the switch is electrically switched between an amorphous state and a crystalline state.

1 is a graph for explaining a method of programming and erasing a phase change memory device, in which the horizontal axis represents time and the vertical axis represents temperature applied to the phase change film.                         

As shown in FIG. 1, when the phase change film is heated at a temperature higher than the melting temperature (Tm) for a short time (first operating period; t ₁ ) and then cooled rapidly (quenching), the phase change film is amorphous. Change to an amorphous state (see curve 'A'). On the contrary, the phase change film is heated at a temperature lower than the melting temperature Tm and higher than the crystallization temperature Tc for a longer time than the first operating period t ₁ (second operating period; t ₂ ). Upon cooling, the phase change film changes to a crystalline state (see curve 'B').

Here, the resistivity of the phase change film having an amorphous state is higher than that of the phase change film having a crystalline state. Therefore, by sensing the current flowing through the phase change film in the read mode, it is possible to determine whether the information stored in the phase change memory cell is logic '1' or logic '0'.

As described above, Joule heat is required for the phase change of the phase change film. In a conventional phase change memory device, when a high density of current flows through an area in contact with a phase change film, the crystal state of the phase change film contact surface changes, and the smaller the contact surface changes the state of the phase change material. The required current density is small.

2 is a cross-sectional view illustrating a conventional phase change memory device.

As shown in FIG. 2, the conventional phase change memory device includes a semiconductor substrate 10 having a bottom electrode 11 formed thereon, and formed on the bottom electrode 11. A first insulating film 12 having a first contact hole 13 exposing a predetermined portion, a bottom electrode contact 14 filling the first contact hole 13, and the bottom electrode contact; A second insulating film 15 formed on the first insulating film 12 including the second insulating film 15 having a second contact hole 16 exposing the lower electrode contact 14, and the second contact hole 16. ) And a top electrode 18 formed on the second insulating layer 15 including the phase change layer 17.

In the conventional phase change memory device, when a current flows between the lower electrode 11 and the upper electrode 18, the contact surface 19 between the lower electrode contact 14 and the phase change film 17 passes through. The crystal state of the phase change film of the contact surface 19 changes according to the current intensity (ie, heat). At this time, the heat required to change the state of the phase change film is directly affected by the contact surface 19 of the phase change film 17 and the lower electrode contact 14. Therefore, the contact area between the phase change film 17 and the lower electrode contact 14 should be as small as possible.

However, in the conventional phase change memory device, since the lower electrode 11 and the phase change film 17 are connected through the lower electrode contact 14, the phase change film 17 and the lower electrode contact 14 are connected. The contact area between) is entirely limited by the photo process limits for the contact hole, which makes it difficult to reduce the contact area. Thus, a problem arises in that the amount of current required for phase change is increased.

Accordingly, the present invention has been made to solve the above problems, and by reducing the contact area between the phase change film and the lower electrode, the phase change memory device and the method of manufacturing the same can reduce the amount of current required for the phase change of the phase change film Its purpose is to provide this.

The phase change memory device of the present invention for achieving the above object is a first insulating film formed on a semiconductor substrate including a predetermined substructure and having a first contact hole for exposing a predetermined portion of the substrate, and A second insulating film, a phase change film, and a third insulating film having a lower electrode contact filling the first contact hole, an opening formed on the first insulating film including the lower electrode contact and exposing the lower electrode contact; And a contact hole formed in an extended portion of the third insulating layer and exposing a portion of the phase change layer, an upper electrode contact to fill the contact hole, and an upper electrode connected to the upper electrode contact. .

The second and third insulating layers may be any one selected from the group consisting of HDP, USG, SOG, TEOS, BPSG, PSG, and HLD oxide, and the phase change layer may include any one of GeSb2Te4 and Ge2Sb2Te5.

In addition, the manufacturing method of the phase change memory device of the present invention for achieving the above object, the first insulating film having a first contact hole for exposing a predetermined portion of the substrate on a semiconductor substrate including a predetermined substructure Forming a; Forming a bottom electrode contact to fill the first contact hole; Sequentially forming a second insulating film, a phase change film, and a third insulating film on the first insulating film including a lower electrode contact; Selectively etching the third insulating film, the phase change film, and the second insulating film to form an opening exposing the lower electrode contact; Forming a lower electrode filling the opening; Forming a fourth insulating film on the third insulating film including the lower electrode; Selectively etching the fourth insulating layer and the third insulating layer to form a second contact hole exposing a portion of the phase change layer; Forming an upper electrode contact to fill the second contact hole; And forming an upper electrode connected to the upper electrode contact on the resultant.

The forming of the lower electrode filling the opening may include forming a conductive film for the lower electrode so as to fill the opening on the third insulating film including the opening, and until the third insulating film is exposed. CMP of the lower electrode conductive film is included.

(Example)

Hereinafter, preferred embodiments of the present invention will be described in detail with reference to the accompanying drawings.

3 is a cross-sectional view illustrating a phase change memory device according to an exemplary embodiment of the present invention.

As shown in FIG. 3, a phase change memory device according to an exemplary embodiment of the present invention is formed on a semiconductor substrate 40 including a predetermined substructure (not shown) and exposes a predetermined portion of the substrate 40. A first insulating layer 41 having a first contact hole 42, a lower electrode contact 43 filling the first contact hole 42, and the first insulating layer including the lower electrode contact 43. A second insulating film 44, a phase change film 45 and a third insulating film 46, which are sequentially formed on the 41 and have an opening 47 exposing the lower electrode contact 43, and the opening 47. ) And a portion of the phase change film 45 to expose the lower electrode 48, the fourth insulating film 50 formed on the third insulating film 46 including the lower electrode 48, The second contact hole 51 formed in the third insulating layer 46 and the fourth insulating layer 50, the upper electrode contact 52 filling the second contact hole 51, and the upper electrode contact ( 52) The upper electrode 53 is formed on the fourth insulating layer 50 to be connected to the upper electrode contact 52.

Here, the lower electrode contact 43, the lower electrode 48, the upper electrode contact 52, and the upper electrode 53 are all made of one of polysilicon-based and metal-based materials. In addition, the second and third insulating layers 44 and 46 are made of any one selected from the group consisting of HDP, USG, SOG, PSG, BPSG, TEOS, and HLD oxide. The phase change layer 45 is made of a GST layer, and in this case, any one of the GeSb 2 Te 4 layer and the Ge 2 Sb 2 Te 5 layer may be used as the GST layer.

On the other hand, a contact surface 49 with the phase change layer 45 is formed on a portion of the sidewall of the lower electrode 48, and when the current flows between the lower electrode 48 and the upper electrode 53, the contact surface 49. ), The phase change of the phase change film 45 occurs.

At this time, the area of the contact surface 49 is determined by the thickness of the phase change film 45. That is, when the phase change film 45 is formed as thin as possible, the area of the contact surface 49 is also reduced by that much.

The thickness of the phase change film 45 that determines the contact area is not influenced by the limitations of the photolithography process, and can be formed to a desired dimension by the deposition process. 49) can be formed. Thus, the amount of current required for the phase change of the phase change film 45 may be lower than in the related art.

Hereinafter, a method of manufacturing the phase change memory device shown in FIG. 3 will be described.

4A through 4F are cross-sectional views illustrating processes of manufacturing a phase change memory device according to an exemplary embodiment of the present invention.

In a method of manufacturing a phase change memory device according to an embodiment of the present invention, as shown in FIG. 4A, a predetermined portion of the substrate 40 is formed on a semiconductor substrate 40 including a predetermined substructure (not shown). The first insulating layer 41 having the first contact hole 42 exposing the light emitting layer is formed. Subsequently, the first contact hole 42 is filled with a conductive film to form a lower electrode contact 43. Here, the lower electrode contact 43 is made of one of polysilicon and metal based materials.

Next, as shown in FIG. 4B, a second insulating film 44, a phase change film 45, and a third insulating film 46 are disposed on the first insulating film 41 including the lower electrode contact 43. Form in turn. Here, the second and third insulating films 44 and 46 are made of any one selected from the group consisting of HDP, USG, SOG, PSG, BPSG, TEOS, and HLD oxide. In addition, the phase change film 45 is made of a GST film, and in this case, any one of the GeSb2Te4 film and the Ge2Sb2Te5 film is used as the GST film.

Meanwhile, the contact area between the phase change film 45 and the lower electrode to be formed subsequently is determined by the thickness of the phase change film 45. That is, by making the thickness of the phase change film 45 as thin as possible, the contact area between the phase change film and the lower electrode can be made smaller. Since the thickness of the phase change film 45 may be formed to a desired dimension by the deposition process, the contact area between the phase change film 45 and the lower electrode may be formed to a dimension lower than the limit of the conventional photo process. It becomes possible.

Then, as shown in FIG. 4C, the opening 47 that selectively exposes the lower electrode contact 43 by selectively etching the third insulating layer 46, the phase change layer 45, and the second insulating layer 44. ).

Next, as shown in FIG. 4D, a conductive film for a lower electrode (not shown) is formed on the third insulating layer 46 including the opening 47 to fill the opening 47. Thereafter, the lower electrode 48 filling the opening 47 is formed by chemical mechanical polishing (CMP) of the lower electrode conductive film until the third insulating layer 46 is exposed. do. Here, the lower electrode 48 is made of one of polysilicon-based and metal-based materials. In this case, a contact surface 49 of the phase change layer 45 is formed on a portion of a sidewall of the lower electrode 48, and when a current flows between the lower electrode 48 and an upper electrode to be formed subsequently, the contact surface ( In 49, a phase change of the phase change film 45 occurs.

Subsequently, as illustrated in FIG. 4E, a fourth insulating film 50 is formed on the third insulating film 46 including the lower electrode 48. Thereafter, the fourth insulating layer 50 and the third insulating layer 46 are selectively etched to form a second contact hole 51 exposing a portion of the phase change layer 45.

Subsequently, as shown in FIG. 4F, the second contact hole 51 is filled with a conductive film (not shown) to form an upper electrode contact 52, and then the second electrode including the upper electrode contact 52. An upper electrode 53 connected to the upper electrode contact 52 is formed on the fourth insulating layer 50. Here, the upper electrode contact 52 and the upper electrode 53 are all made of one of polysilicon and metal based materials.

As described above, in the present invention, the phase change film is formed by forming a contact surface with the phase change film on the sidewall of the lower electrode so that the contact area between the lower electrode and the phase change film can be determined by the thickness of the phase change film. The contact area between the lower electrode and the lower electrode can be reduced. That is, since the thickness of the phase change film may be formed to a desired dimension by the deposition process, the contact surface between the phase change film and the lower electrode may be formed to have a lower dimension than the limit of the conventional photo process.

Therefore, the present invention can lower the amount of current required for the phase change of the phase change film.

Claims (5)

A first insulating layer formed on the semiconductor substrate including a predetermined substructure and having a first contact hole exposing a predetermined portion of the substrate; A lower electrode contact filling the first contact hole; A second insulating film, a phase change film, and a third insulating film that are sequentially stacked on the first insulating film including the lower electrode contact and have an opening exposing the lower electrode contact; A lower electrode formed in the opening and having a sidewall portion forming a contact surface with the phase change film; A contact hole formed in an extended portion of the third insulating layer and exposing a portion of the phase change layer; An upper electrode contact filling the contact hole; And an upper electrode connected to the upper electrode contact. The phase change memory device as claimed in claim 1, wherein the second and third insulating films are one selected from the group consisting of HDP, USG, SOG, TEOS, BPSG, PSG, and HLD oxide films. The phase change memory device as claimed in claim 1, wherein the phase change film is made of one of a GeSb2Te4 film and a Ge2Sb2Te5 film. Forming a first insulating layer having a first contact hole exposing a predetermined portion of the substrate on a semiconductor substrate including a predetermined substructure; Forming a bottom electrode contact to fill the first contact hole; Sequentially forming a second insulating film, a phase change film, and a third insulating film on the first insulating film including the lower electrode contact; Selectively etching the third insulating film, the phase change film, and the second insulating film to form an opening exposing the lower electrode contact; Filling the opening to form a lower electrode having a portion of a sidewall forming a contact surface with the phase change layer; Forming a fourth insulating film on the third insulating film including the lower electrode; Selectively etching the fourth insulating layer and the third insulating layer to form a second contact hole exposing a portion of the phase change layer; Forming an upper electrode contact to fill the second contact hole; And Forming an upper electrode connected to the upper electrode contact on the upper electrode contact and the fourth insulating layer; Method of manufacturing a phase change memory device comprising a. The method of claim 4, wherein the forming of the lower electrode filling the opening comprises: forming a conductive film for the lower electrode so as to fill the opening on the third insulating film including the opening, and exposing the third insulating film. And CMP of the lower electrode conductive film until the lower electrode is conductive.

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