KR101001347B1 - 배선 레벨에서의 공정 제어 - Google Patents

배선 레벨에서의 공정 제어 Download PDF

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Publication number
KR101001347B1
KR101001347B1 KR1020057005289A KR20057005289A KR101001347B1 KR 101001347 B1 KR101001347 B1 KR 101001347B1 KR 1020057005289 A KR1020057005289 A KR 1020057005289A KR 20057005289 A KR20057005289 A KR 20057005289A KR 101001347 B1 KR101001347 B1 KR 101001347B1
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South Korea
Prior art keywords
wiring
control
workpiece
layer
semiconductor wafer
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Expired - Fee Related
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KR1020057005289A
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English (en)
Korean (ko)
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KR20050054969A (ko
Inventor
로버트 제이. 총
에릭 오. 그린
Original Assignee
글로벌파운드리즈 인크.
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Publication of KR20050054969A publication Critical patent/KR20050054969A/ko
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    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B19/00—Program-control systems
    • G05B19/02—Program-control systems electric
    • G05B19/418—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM]
    • G05B19/4183—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM] characterised by data acquisition, e.g. workpiece identification
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P95/00—Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P74/00—Testing or measuring during manufacture or treatment of wafers, substrates or devices
    • H10P74/23—Testing or measuring during manufacture or treatment of wafers, substrates or devices characterised by multiple measurements, corrections, marking or sorting processes
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/30—Nc systems
    • G05B2219/32—Operator till task planning
    • G05B2219/32183—Test cell
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/30—Nc systems
    • G05B2219/36—Nc in input of data, input key till input tape
    • G05B2219/36284—Use of database for machining parameters, material, cutting method, tools
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/30—Nc systems
    • G05B2219/45—Nc applications
    • G05B2219/45026—Circuit board, pcb
    • G—PHYSICS
    • G05—CONTROLLING; REGULATING
    • G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
    • G05B2219/00—Program-control systems
    • G05B2219/30—Nc systems
    • G05B2219/45—Nc applications
    • G05B2219/45031—Manufacturing semiconductor wafers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W46/00—Marks applied to devices, e.g. for alignment or identification
    • H10W46/501—Marks applied to devices, e.g. for alignment or identification for use before dicing
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
    • Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]

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  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Automation & Control Theory (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Control By Computers (AREA)
KR1020057005289A 2002-09-30 2003-09-19 배선 레벨에서의 공정 제어 Expired - Fee Related KR101001347B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/260,894 2002-09-30
US10/260,894 US6842661B2 (en) 2002-09-30 2002-09-30 Process control at an interconnect level

Publications (2)

Publication Number Publication Date
KR20050054969A KR20050054969A (ko) 2005-06-10
KR101001347B1 true KR101001347B1 (ko) 2010-12-14

Family

ID=32029815

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020057005289A Expired - Fee Related KR101001347B1 (ko) 2002-09-30 2003-09-19 배선 레벨에서의 공정 제어

Country Status (9)

Country Link
US (1) US6842661B2 (https=)
JP (1) JP2006501676A (https=)
KR (1) KR101001347B1 (https=)
CN (1) CN1685494A (https=)
AU (1) AU2003270745A1 (https=)
DE (1) DE10393397B4 (https=)
GB (1) GB2409339B (https=)
TW (1) TWI289243B (https=)
WO (1) WO2004032225A1 (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8301288B2 (en) * 2004-06-16 2012-10-30 International Business Machines Corporation Optimized scheduling based on sensitivity data
US7235414B1 (en) * 2005-03-01 2007-06-26 Advanced Micro Devices, Inc. Using scatterometry to verify contact hole opening during tapered bilayer etch
US7964422B1 (en) 2005-11-01 2011-06-21 Nvidia Corporation Method and system for controlling a semiconductor fabrication process
KR100759684B1 (ko) * 2006-04-17 2007-09-17 삼성에스디아이 주식회사 건식식각장치 및 이를 이용한 유기전계발광 표시장치의식각방법

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001050522A1 (en) * 2000-01-04 2001-07-12 Advanced Micro Devices, Inc. Method for determining optimal process targets in microelectronic fabrication

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3320035B2 (ja) * 1991-08-23 2002-09-03 株式会社半導体エネルギー研究所 半導体装置
US5844416A (en) * 1995-11-02 1998-12-01 Sandia Corporation Ion-beam apparatus and method for analyzing and controlling integrated circuits
US6041270A (en) * 1997-12-05 2000-03-21 Advanced Micro Devices, Inc. Automatic recipe adjust and download based on process control window
JP3310608B2 (ja) * 1998-01-22 2002-08-05 アプライド マテリアルズ インコーポレイテッド スパッタリング装置
US6054868A (en) * 1998-06-10 2000-04-25 Boxer Cross Incorporated Apparatus and method for measuring a property of a layer in a multilayered structure
JP3897922B2 (ja) * 1998-12-15 2007-03-28 株式会社東芝 半導体装置の製造方法、及びコンピュ−タ読取り可能な記録媒体
US6157078A (en) * 1999-09-23 2000-12-05 Advanced Micro Devices, Inc. Reduced variation in interconnect resistance using run-to-run control of chemical-mechanical polishing during semiconductor fabrication
JP3910324B2 (ja) * 1999-10-26 2007-04-25 ファブソリューション株式会社 半導体製造装置
JP3556549B2 (ja) * 1999-12-10 2004-08-18 シャープ株式会社 シート抵抗測定器および電子部品製造方法
US6413867B1 (en) * 1999-12-23 2002-07-02 Applied Materials, Inc. Film thickness control using spectral interferometry
US6747734B1 (en) 2000-07-08 2004-06-08 Semitool, Inc. Apparatus and method for processing a microelectronic workpiece using metrology
JP4437611B2 (ja) * 2000-11-16 2010-03-24 株式会社ルネサステクノロジ 半導体装置の製造方法
US6958814B2 (en) * 2002-03-01 2005-10-25 Applied Materials, Inc. Apparatus and method for measuring a property of a layer in a multilayered structure
US6828542B2 (en) * 2002-06-07 2004-12-07 Brion Technologies, Inc. System and method for lithography process monitoring and control

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2001050522A1 (en) * 2000-01-04 2001-07-12 Advanced Micro Devices, Inc. Method for determining optimal process targets in microelectronic fabrication

Also Published As

Publication number Publication date
DE10393397T5 (de) 2005-08-11
GB2409339B (en) 2006-05-10
TW200408920A (en) 2004-06-01
AU2003270745A1 (en) 2004-04-23
CN1685494A (zh) 2005-10-19
JP2006501676A (ja) 2006-01-12
US6842661B2 (en) 2005-01-11
WO2004032225A1 (en) 2004-04-15
US20040064214A1 (en) 2004-04-01
TWI289243B (en) 2007-11-01
GB2409339A (en) 2005-06-22
DE10393397B4 (de) 2010-09-02
KR20050054969A (ko) 2005-06-10
GB0505536D0 (en) 2005-04-27

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