KR100992121B1 - Thin film transistor array panel and liquid crystal display including the panel - Google Patents

Abstract

A liquid crystal display device according to an embodiment of the present invention includes a gate line having a gate electrode, a storage electrode overlapping a pixel electrode thereafter to form a storage capacitor, a gate insulating film formed over the gate line, and a semiconductor formed over the gate insulating film. Layer, a data line formed on the semiconductor layer and having a bent portion and a portion orthogonal to the gate line, a drain electrode facing the source electrode on the gate electrode, a protective film covering the semiconductor layer, and a protective film formed on the electrical The thin film transistor array panel includes a thin film transistor array panel including a pixel electrode connected to and curved along a side of the data line, and a common electrode display panel on which a common electrode is formed to face the pixel electrode to form a liquid crystal capacitor. In this case, the storage capacitor is formed by overlapping the storage electrode and the drain electrode, and they have a curved shape along the curved shape of the pixel or data line.

Liquid crystal display, liquid crystal capacitance, charge rate, aperture ratio, sustain electrode,

Description

Thin film transistor array panel and liquid crystal display including the same {THIN FILM TRANSISTOR ARRAY PANEL AND LIQUID CRYSTAL DISPLAY INCLUDING THE PANEL}

1 is a layout view of a thin film transistor array panel for a liquid crystal display according to a first exemplary embodiment of the present invention.

2 is a layout view of a common electrode display panel of the liquid crystal display according to the first exemplary embodiment of the present invention.

3 is a layout view of a liquid crystal display according to a first exemplary embodiment of the present invention;

4 is a cross-sectional view taken along line IV-IV ′ of FIG. 3,

5 is a cross-sectional view taken along line V-V 'and line V'-V' 'of FIG. 4;

6 is a layout view of a thin film transistor array panel for a liquid crystal display according to a second exemplary embodiment of the present invention.

FIG. 7 is a cross-sectional view of the liquid crystal display including the thin film transistor array panel of FIG. 6 taken along the line VII-VII ′ of FIG. 6.

FIG. 8 is a cross-sectional view of a liquid crystal display including the thin film transistor array panel of FIG. 6, taken along lines VIII-VIII ′ and VIII′-VIII ″ of FIG. 6.

9 is a layout view illustrating a structure of a liquid crystal display according to a third exemplary embodiment of the present invention.                 

10 is a cross-sectional view of the liquid crystal display of FIG. 9 taken along the line X-X '.

The present invention relates to a thin film transistor array panel and a liquid crystal display device including the same.

In general, a liquid crystal display device injects a liquid crystal material between an upper substrate on which a common electrode, a color filter, and the like are formed, and a lower substrate on which a thin film transistor and a pixel electrode are formed. By applying a different potential to form an electric field to change the arrangement of the liquid crystal molecules, and through this to control the light transmittance is a device that represents the image.

However, it is an important disadvantage that the liquid crystal display device has a narrow viewing angle. In order to overcome these disadvantages, various methods for widening the viewing angle have been developed. Among them, liquid crystal molecules are oriented vertically with respect to the upper and lower substrates, and a method of forming a constant incision pattern or protrusion on the pixel electrode and the common electrode opposite thereto is performed. This is becoming potent.

However, in the method of forming the protrusions or the incision pattern, the opening ratio is lowered due to the protrusions or the incision pattern portion. In order to compensate for this, an ultra-high-aperture structure that forms the pixel electrode as wide as possible has been devised. However, since the distance between adjacent pixel electrodes is very close, a lateral field formed between the pixel electrodes is strongly formed. Accordingly, the liquid crystals positioned at the edges of the pixel electrodes are affected by the lateral electric field, and thus the alignment is disturbed, resulting in texture or light leakage. In particular, the coupling between the data line and the common electrode reduces the image quality by driving liquid crystal molecules positioned between the two to cause light leakage around the data line. This causes a decrease.

On the other hand, as the liquid crystal display device becomes larger, the size of the pixel also increases, and accordingly, the area of the electrode for forming the liquid crystal capacitor or the storage capacitor formed in each pixel, and the width of the protrusion or the cutout pattern should be increased. However, when the area of the electrode is widened to a predetermined level or more, a problem of deterioration in luminance or a decrease in response speed occurs, and the width of the protrusion or the cutout pattern causes a decrease in the aperture ratio. Therefore, even when the liquid crystal display device is opposed to each other, it is desirable to have a pixel structure in which the size of the electrode can easily adjust the shape of protrusions or incision patterns.

An object of the present invention is to provide a thin film transistor array panel that forms a stable multi-domain.

Another object of the present invention is to provide a thin film transistor array panel having a pixel that can be easily designed even if it is enlarged.

In order to solve this problem, in the present invention, the data line defining the pixel includes a bent portion, and the pixel division means for dividing orienting the liquid crystal molecules with the drain electrode or the sustain electrode forming the storage capacitor is arranged along the curved shape of the pixel. Formed.

More specifically, in the thin film transistor array panel according to the exemplary embodiment of the present invention, a gate line including a gate electrode is formed on an insulating substrate, and a data line including a portion and a bent portion intersecting and insulated from the gate line on the insulating substrate. Is formed. Pixel electrodes are formed in pixels defined by crossing gate lines and data lines, and each pixel is formed with a thin film transistor including a gate electrode, a source electrode connected to the data line, and a drain electrode connected to the pixel electrode. And a sustain electrode which overlaps with the pixel electrode or the drain electrode to form the storage capacitor. At this time, the curved portion of the data line and the portion crossing the gate line repeatedly appear in units of the length of the pixel, and a part of the drain electrode or the sustain electrode extends at least along the shape of the curved portion of the pixel.

The curved portion of the data line includes two straight portions, and one of the two straight portions is substantially 45 degrees with respect to the gate line and the other is substantially -45 degrees with respect to the gate line.

In this case, it is preferable that the drain electrode and the sustain electrode overlap each other to form a storage capacitor, the pixel electrode is patterned along the curved shape of the data line in the pixel, and the edge of the pixel electrode overlaps the data line in the pixel.

The pixels may be divided into two or more subpixels, and the pixel electrodes may be divided into subpixels through the cutouts.

The semiconductor layer may further include a semiconductor layer formed between the gate electrode and the source and drain electrodes. The semiconductor layer may extend to a lower portion of the data line. The semiconductor layer except for the channel portion between the source electrode and the drain electrode may have a data line and a drain. It may have the same pattern as the electrode.

The liquid crystal display according to the exemplary embodiment of the present invention has a thin film transistor array panel and a common electrode panel facing the thin film transistor array panel and having a common electrode facing the pixel electrode.

It is preferable to further include a color filter formed of a red, green, and blue color filter formed on a thin film transistor array panel or a common electrode display panel and formed along a column of pixels separated by data lines. The liquid crystal contained in the liquid crystal layer formed between the display panels has negative dielectric anisotropy and preferably has long axes of the liquid crystals oriented perpendicular to the two display panels.

The common electrode and the pixel electrode preferably have pixel dividing means for dividing and aligning the liquid crystal molecules of the liquid crystal layer, and the pixel dividing means is a cutout or a protrusion, and the pixel dividing means has a shape bent along the shape of the data line. And overlap the drain electrode or the sustain electrode.

DETAILED DESCRIPTION Embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily practice the present invention. The present invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein.

In the drawings, the thickness of layers, films, panels, regions, etc., are exaggerated for clarity. Like parts are designated by like reference numerals throughout the specification. When a part of a layer, film, region, plate, etc. is said to be "on" another part, this includes not only the other part being "right over" but also another part in the middle. On the contrary, when a part is "just above" another part, there is no other part in the middle.

Next, a liquid crystal display according to an exemplary embodiment of the present invention will be described with reference to the drawings.

1 is a layout view of a thin film transistor array panel for a liquid crystal display according to a first embodiment of the present invention, FIG. 2 is a layout view of a common electrode display panel of a liquid crystal display according to a first embodiment of the present invention, and FIG. 4 is a cross-sectional view taken along line IV-IV 'of FIG. 3, and FIG. 5 is taken along lines V-V ′ and V′-V ″ of FIG. 3. This is a cross section.

As shown in FIG. 4, the liquid crystal display according to the first exemplary embodiment of the present invention is formed between the thin film transistor array panel 100, the common electrode display panel 200 facing the same, and the two display panels 100 and 200. The major axis of the liquid crystal molecules 310 included therein is composed of the liquid crystal layer 300 which is oriented almost perpendicular to the display panels 100 and 200.                     

First, the thin film transistor array panel will be described in more detail with reference to FIGS. 1, 4, and 5.

The gate line 121 is formed in the horizontal direction on the insulating substrate 110, and the gate line 121 includes a gate electrode 123 having a protrusion shape. One end portion 125 of the gate line 121 is extended in width for connection with an external circuit.

The storage electrode line 131 and the storage electrode 133 are formed on the insulating substrate 110. The storage electrode line 131 extends in the horizontal direction across the center of the pixel and the storage electrode 133 extends in the vertical direction along the curved pixel shape. A portion of the storage electrode line 131 is bent at 45 degrees, and the other portion thereof is curved. Is bent to -45 degrees and is connected to the storage electrode line 131.

The gate lines 121, 123 and 125 and the sustain electrode wirings 131 and 133 are made of a first layer 201 made of Cr or Mo alloy having excellent physicochemical properties and the like, and a material made of Al or Ag alloy having low resistance. It is formed of a double layer of two layers 202. These gate lines 121, 123, 125 and sustain electrode wirings 131, 133 may be formed in a single layer or triple layers or more, as necessary.

The gate insulating layer 140 is formed on the gate lines 121, 123, and 125 and the storage electrode wirings 131 and 133.

The linear semiconductor layers 151 and 154 made of a semiconductor such as amorphous silicon are formed on the gate insulating layer 140. The linear semiconductor layers 151 and 154 include a channel portion semiconductor layer 154 forming a channel of the thin film transistor and a data line portion semiconductor layer 151 positioned below the data line 171.

On the linear semiconductor layers 151 and 154, linear resistive contact members and island resistive contact members made of a material such as n + hydrogenated amorphous silicon doped with silicide or n-type impurities at a high concentration are formed. The linear ohmic contact includes a data line contact member 161 positioned below the data line and a source contact member 163 positioned below the source electrode 173, and the island contact member includes a drain electrode 175. And a drain contact member 165 positioned below.

The data line 171 and the drain electrode 175 are formed on the ohmic contacts 161, 163, and 165 and the gate insulating layer 140. The data line 171 extends long and crosses the gate line 121 to define a pixel, and the data line 171 has a branch shape and extends to an upper portion of the ohmic contact 163. The drain electrode 175 is separated from the source electrode 173 and positioned above the ohmic contact 165 opposite to the source electrode 173 with respect to the gate electrode 123. One end portion 179 of the data line 171 is extended in width to connect to an external circuit.

Here, the data line 171 is formed such that the repeatedly bent portion and the vertically extending portion appear with a length of the pixel. At this time, the curved portion of the data line 171 consists of two straight portions, one of the two straight portions forms 45 degrees with respect to the gate line 121, and the other portion is formed on the gate line 121. To -45 degrees. The source electrode 173 is connected to a vertically extending portion of the data line 171, and the portion crosses the gate line 121 and the storage electrode line 131.                     

At this time, the ratio of the lengths of the bent portion and the vertically extending portion of the data line 171 is between 1: 1 and 9: 1 (that is, the ratio of the bent portion of the data line 171 is between 50% and 90%). Is preferable.

Therefore, the pixel formed by the intersection of the gate line 121 and the data line 171 is formed in a band shape.

The drain electrode 175 is formed in the vertical direction along the curved shape of the pixel and overlaps the sustain electrode 133. As such, the drain electrode 175 overlaps the storage electrode 133 with only the gate insulating layer 140 interposed therebetween to form the storage capacitor.

A passivation layer 180 made of an organic insulating layer is formed on the data line 171 and the drain electrode 175. The passivation layer 180 is formed by exposing and developing the photosensitive organic material. If necessary, the passivation layer 180 may be formed by applying a photosensitive organic material and performing a photolithography process, but the forming process is more complicated than forming the passivation layer 180 using the photosensitive organic material. Meanwhile, the passivation layer 180 may cover the exposed semiconductor layer 154 and further include an insulating layer made of an inorganic insulating material such as silicon nitride.

In the passivation layer 180, a contact hole 181 exposing the drain electrode and a contact hole 183 exposing the end portion 179 of which the width of the data line is extended are formed. In addition, the contact hole 182 exposing the end portion 179 where the width of the gate line is extended is formed through the gate insulating layer 140 together with the passivation layer 180.

At this time, the sidewalls of these contact holes 181, 182, 183 have a gentle inclination between 30 degrees and 85 degrees with respect to the substrate surface, or have a stepped profile.

In addition, these contact holes (181, 182, 183) may be formed in various shapes having an angle or circular, the area is not more than 2mm x 60㎛, preferably 0.5mm x 15㎛ or more.

The pixel electrode 190 is formed on the passivation layer 180 through the contact hole 181 to be connected to the drain electrode 175 and have a band shape that is bent along the shape of the pixel. At this time, the pixel electrode 190 is formed so wide that the edge overlaps the data line, thereby ensuring the maximum aperture ratio.

In addition, contact auxiliary members 95 and 97 are formed on the passivation layer 180 and are connected to the end portion 125 of the gate line and the end portion 179 of the data line through the contact holes 182 and 183, respectively. The pixel electrode 190 and the contact assistants 95 and 97 are made of indium tin oxide (ITO) or indium zinc oxide (IZO).

In the thin film transistor array panel according to the exemplary embodiment of the present invention, the storage capacitor overlaps each other, and the storage electrode 133 and the drain electrode 175 are bent along the sides of the pixel, thereby designing a display panel for a large-sized liquid crystal display device. In this case, the size of the pixel can be easily adjusted in a state where the holding capacitance is secured. Accordingly, the areas of the electrodes 133 and 175 can be easily changed, and even if the area of the electrodes 133 and 175 is wider than a predetermined level, the problem of whether the luminance is lowered or the response speed is reduced can be solved, and the aperture ratio can be prevented from being lowered.

Next, the common electrode display panel will be described with reference to FIGS. 2, 4, and 5.

On the lower surface of the upper substrate 210 made of a transparent insulating material such as glass, a black matrix 220 for preventing light leakage and red, green, and blue color filters 230 arranged in sequence on the pixels are formed. The overcoat layer 250 made of an organic material is formed on the color filter 230. On the overcoat layer 250, a common electrode 270 made of a transparent conductive material such as ITO or IZO and having a cutout 271 is formed. At this time, the cutout 271 has a shape in which the pixel is bent along the curved shape.

At this time, the cutout 271 acts as a domain regulating means, and the width thereof is preferably between 9 µm and 12 µm. In the case of forming the organic protrusions instead of the cutouts 271 by the domain regulating means, it is preferable to set the width between 5 μm and 10 μm.

The black matrix 220 includes a linear portion corresponding to the curved portion of the data line 171, a vertically extending portion of the data line 171, and a triangular portion corresponding to the thin film transistor portion.

The color filter 230 is formed vertically long along the pixel column defined by the black matrix 220, and is periodically bent along the shape of the pixel.

The cutout 271 of the common electrode 270 is also bent to form a shape that bisects the curved pixel from side to side. Both ends of the cutout 271 are bent once more so that one end is parallel to the gate line 121 and the other end is parallel to the vertically extending portion of the data line 171.                     

When the thin film transistor array panel 100 and the common electrode panel 200 having the above structure are combined and the liquid crystal layer 300 is formed therebetween, a basic panel of the liquid crystal display according to the first exemplary embodiment of the present invention is formed.

The liquid crystal molecules 310 included in the liquid crystal layer 300 have their directors on the lower substrate 110 and the upper substrate 210 when no electric field is applied between the pixel electrode 190 and the common electrode 270. It is oriented perpendicular to and has negative dielectric anisotropy. The lower substrate 110 and the upper substrate 210 are aligned such that the pixel electrode 190 accurately overlaps the color filter 230. In this way, the pixel is divided into a plurality of domains by the cutout 271. At this time, the pixels are divided into left and right sides by the cutouts 271, but the pixels are divided into four types of domains in which the alignment directions of the liquid crystals are different from each other in the vertical direction.

At this time, the distance between the two long sides of the domain, that is, the width of the domain is preferably between 10㎛ 30㎛.

The number of domains included in one pixel is four if the size of the pixel is less than 100 µm X 300 µm, and four or eight if the size of the pixel is 100 µm X 300 µm or more.

The liquid crystal display is formed by disposing elements such as polarizing plates 12 and 22, a backlight, and a compensating plate on both sides of the basic panel. In this case, the polarizing plates 12 and 22 are disposed on both sides of the basic panel, respectively, and the transmission axis thereof is disposed so that one of them is parallel to the gate line 121 and the other is perpendicular to the gate line 121.

When the liquid crystal display device is formed as described above, when an electric field is applied to the liquid crystal, the liquid crystal in each domain is inclined in a direction perpendicular to the long side of the domain. However, since the direction is perpendicular to the data line 171, the direction coincides with the direction in which the liquid crystal is inclined by the lateral electric field formed between two adjacent pixel electrodes 190 with the data line 171 therebetween. As a result, the lateral electric field assists the liquid crystal alignment of each domain.

Since the liquid crystal display generally uses inversion driving methods such as point inversion driving, thermal inversion driving, and two-point inversion driving, which apply voltages having opposite polarities to pixel electrodes positioned on both sides of the data line 171, the lateral electric field is Almost always occurs and the direction is the direction that helps the liquid crystal alignment of the domain.

In addition, since the transmission axis of the polarizing plate is disposed in a direction perpendicular to or parallel to the gate line 121, the polarizing plate can be manufactured at low cost, and the alignment direction of the liquid crystal is 45 degrees with the transmission axis of the polarizing plate in all domains, thereby obtaining the highest luminance. Can be.

However, since the length of the wiring increases because the data line 171 is bent, the length of the wiring increases by about 20% when the bent portion of the data line 171 occupies 50%. When the length of the data line 171 increases, the resistance and the load of the wiring increase, thereby increasing the signal distortion. However, in the ultra-high opening ratio structure, the width of the data line 171 can be formed sufficiently wide, and since the thick organic protective film 180 is used, the load of the wiring is also small enough so that the signal distortion problem caused by the increase in the length of the data line 171 can be ignored. Can be.

Meanwhile, each of the thin film transistor array panel 100 and the common electrode display panel 200 includes alignment layers 11 and 12 to align the liquid crystal molecules 310. In this case, the alignment layers 11 and 12 may have characteristics for vertically orienting the liquid crystal molecules 310, and may not be.

A method of manufacturing a thin film transistor array panel in a liquid crystal display device having such a structure will be described as follows.

First, the first metal layer 201 made of Cr or Mo alloy or the like and the second metal layer 202 made of Al or Ag alloy having low resistance are sequentially stacked on the lower insulating substrate 110 by sputtering, and the like. Dry or wet etching is performed by using a photolithography process to form the gate lines 121, 123, and 125 and the storage electrode wirings 131 and 133.

Next, the gate insulating layer 140, the hydrogenated amorphous silicon layer, and the amorphous silicon layer doped with a high concentration of n-type impurities such as phosphorus (P) are respectively 1,500 kPa to 5,000 kPa, 500 kPa to 2,000 kPa using chemical vapor deposition. , The resistive contact layer and the amorphous silicon layer 151 and 154 having the channel portion connected by successively depositing a thickness of 300 300 to 600 Å and patterning the doped amorphous silicon layer and the amorphous silicon layer in a photolithography process using a mask. To form.

Subsequently, a thickness of 1,500 kPa to 3,000 kPa is obtained by sputtering or the like between the first metal layer 701 made of Cr or Mo alloy and the second metal layer 702 made of Al or Ag alloy having low resistance. After deposition, the data lines 171, 173, and 179 and the drain electrode 175 are formed by patterning by a photolithography process using a mask.

Subsequently, the ohmic contact layer that is not covered by the source electrode 173 and the drain electrode 175 is etched to expose the semiconductor layer 154 between the source electrode 173 and the drain electrode 175, and the ohmic contact members separated on both sides. (163, 165).

Subsequently, a protective film 180 is formed by applying a photosensitive organic insulating material, and exposed and developed through a photomask having a slit portion to form contact holes 181, 182, and 183.

At this time, the slit portion of the photomask is a portion for smoothing the slope of the contact hole sidewalls of the contact holes 181, 182, and 183 or having a stepped profile so as to correspond to the portion to be the sidewall of the contact hole.

When the passivation layer 180 is exposed through the photomask having the slit portion as described above, all the portions to be the contact holes 181, 182, and 183 of the passivation layer 180 are exposed, and the portions to be the sidewalls of the contact portions are partially exposed. Photosensitive means that the polymer is decomposed by light.

Subsequently, when the passivation layer 180 is developed, contact holes 181, 182, and 183 having stepped sidewalls may be formed.

Next, as shown in FIGS. 4 and 5, the second metal layers 202 and 702 of the wiring exposed through the contact holes 181, 182, and 183 are etched and removed, and ITO or IZO is 400 kPa to 500. It is deposited to a thickness and etched to form a pixel electrode 190 and the contact auxiliary members (95, 97).                     

Such a method is a manufacturing method of patterning each layer by a photolithography process using a different mask, but a thin film transistor array panel for a liquid crystal display device according to the present invention can also be manufactured by using different masks with different layers. This will be described in detail with reference to FIGS. 6 to 8.

6 is a layout view of a thin film transistor array panel according to a second exemplary embodiment of the present invention, and FIG. 7 is a cross-sectional view of the liquid crystal display including the thin film transistor array panel of FIG. 6 taken along the line VII-VII ′ of FIG. 6. 8 is a cross-sectional view taken along the lines VIII-VIII 'and VIII'-VIII' 'of FIG. 6.

The thin film transistor array panel for a liquid crystal display according to the second exemplary embodiment is patterned by a photolithography process using a data line and a semiconductor layer, and has the following characteristics as compared with the thin film transistor array panel of the first embodiment. Here, the structure of the common electrode panel 200 is the same and is illustrated in FIG. 7 only.

The contact members 161, 163, and 165 are formed under the data lines 171, 173, and 179 and the drain electrode 175 in a substantially same pattern, and between the source electrode 173 and the drain electrode 175. The amorphous silicon layers 151, 154, and 159 also have substantially the same pattern as the data line and the drain electrode except that the channel portion is connected.

Next, a method of manufacturing a thin film transistor array panel having such a structural feature will be described.

In the method of manufacturing the thin film transistor array panel according to the second exemplary embodiment of the present invention, the data line 171, the drain electrode 175, and the semiconductor layers 151, 154, and 159 are formed by a photolithography process using a single photoresist pattern. Pattern. In this case, the photoresist pattern includes a first portion and a second portion having different thicknesses, wherein the second portion is positioned in the channel region of the thin film transistor, and the first portion is positioned in the data line and drain electrode region. Has a thickness thinner than the first portion. Here, the first and second portions are used as etching masks for patterning the semiconductor layers 151, 154, and 159, and the first portions are used as etching masks for patterning data lines and drain electrodes. As such, there may be various methods of varying the thickness of the photoresist pattern according to the position. For example, a translucent area may be added to the photomask in addition to the transparent area and the light blocking area. There is a way to put it. The translucent region is provided with a slit pattern, a lattice pattern, or a thin film having a medium transmittance or a medium thickness. When using the slit pattern, it is preferable that the width of the slits and the interval between the slits are smaller than the resolution of the exposure machine used for the photographic process. Another example is to use a photoresist film that can be reflowed. That is, a thin portion is formed by forming a reflowable photoresist pattern with a normal mask having only a transparent region and a light shielding region, and then reflowing to allow the photoresist film to flow down into a region where no residue remains.

In the above first and second embodiments, the common electrode has only one pixel dividing means. However, as the liquid crystal display becomes larger, the common electrode may have two or more liquid crystal dividing means, and the color filter may be disposed on the thin film transistor array panel. You can also place it. This will be described in detail with reference to the drawings.                     

FIG. 9 is a layout view illustrating a structure of a liquid crystal display including a thin film transistor array panel according to a third exemplary embodiment. FIG. 10 is a cross-sectional view of the liquid crystal display of FIG. 9 taken along the line X-X ′.

Most structures of the liquid crystal display according to the third exemplary embodiment of the present invention are the same as those of FIGS. 3 and 6.

Unlike the first and second embodiments, in the liquid crystal display according to the third embodiment of the present invention, a pixel includes two subpixels Pa and Pb, and the pixel electrode 190 is formed of the data line 171. It is divided into two parts through the cutout 191 along the shape and disposed in the subpixels Pa and Pb. In addition, two cutouts 271a and 271b are formed along the shape of the data line 171 in the common electrode 270 to separately align the liquid crystal molecules 310 of the two subpixels Pa and Pb.

In addition, the drain electrode 175 and the storage electrode 133 have a curved shape along the shape of the pixel. The storage electrode line 131 is disposed at the edge of the pixel and extends in the horizontal direction.

In this case, the drain electrode 175 and the storage electrode 133 may be disposed in the subpixel Pb positioned on the right side of the subpixels Pa and Pb, and may be disposed in the center of the two subpixels Pa and Pb. It may be. In addition, these 175 and 133 may be disposed in both of the sub-pixels Pa and Pb, and may extend to only the center of the pixel.

Further, red, green, and blue color filters R, G, and B having a contact hole 181 exposing the drain electrode 175 are formed under the passivation layer 180 in the vertical direction. Here, the boundaries of the color filters R, G, and B of red, green, and blue are shown to coincide with each other on the upper part of the data line 171, but overlapped with each other on the upper part of the data line 171 to leak light between the pixel areas. It may have a function of blocking and is not formed in the pad portion where the end portions 125 and 179 of the gate lines and the data lines are disposed.

The liquid crystal display according to the third exemplary embodiment of the present invention also has the same effect as the first and second exemplary embodiments.

Meanwhile, in another embodiment of the present invention, the two subpixels Pa and Pb may be disposed together with the thin film transistors on both sides of the data line 171.

In addition, in the first to third embodiments of the present invention, the data line 171 and the pixel electrode 190 are bent, and the pixel electrode 190 and the common electrode 270 are divided according to the shape of the data line 171. Although the structure having the alignment means has been described, the embodiment of the present invention is not limited to this embodiment, and the data line 171 and the pixel electrode 190 may have an uncurved shape, and the pixel division alignment means The incision can take various forms.

Further, in the first to third embodiments of the present invention, only the liquid crystal display device in the vertical alignment mode that is vertically oriented with respect to the liquid crystal molecules 310 is described. However, the thin film transistor array panel according to the embodiment of the present invention has a positive dielectric constant. It is also applicable to a twisted nematic liquid crystal display device having anisotropy, arranged parallel to the substrate, and oriented continuously spirally from the lower display panel to the upper display panel.                     

Although the above has been described with reference to preferred embodiments of the present invention, those skilled in the art will be able to variously modify and change the present invention without departing from the spirit and scope of the invention as set forth in the claims below. It will be appreciated. In particular, the arrangement of the openings formed in the pixel electrode and the common electrode may have various modifications, and instead of forming the openings, the alignment of liquid crystal molecules along the inclination of the alignment layer with protrusions may be performed.

As described above, the pixel dividing means, the sustain electrode, or the drain electrode are formed in a bent form along the shape of the pixel, so that the area or pixel of the electrode is secured while securing the luminance, response speed, or aperture ratio when the display panel for a large-size liquid crystal display device is designed. The size of the pixel can be easily adjusted while easily changing the spacing or width of the dividing means.

Claims (17)

Insulation board, A gate line formed on the insulating substrate, A data line formed on the insulating substrate and including a straight portion and a bent portion intersecting the gate line by being insulated from the gate line; A thin film transistor connected to the gate line and the data line, A pixel electrode connected to the thin film transistor and bent along the data line; A storage electrode overlapping the drain electrode of the thin film transistor to form a storage capacitor; Including, The curved portion of the data line and the straight portion intersecting the gate line are repeatedly displayed in units of intervals between two neighboring gate lines. And the drain electrode and the sustain electrode respectively extend the pixel electrode and include an extension portion bent in the same manner as the bent portion. In claim 1, The curved portion of the data line includes two straight portions, one of the two straight portions substantially 45 degrees with respect to the gate line, and the other one is substantially -45 degrees with respect to the gate line. Display panel. delete In claim 1, And a source electrode of the thin film transistor is connected to a straight portion of the data line. delete In claim 1, An edge of the pixel electrode overlaps the data line. In claim 1, The pixel electrode is divided into two or more subpixel electrodes, and the pixel electrode is separated into the subpixel electrodes through an incision. delete In claim 4, The thin film transistor array panel of claim, wherein the semiconductor layer of the thin film transistor includes a linear portion overlapping a lower portion of the data line. The method of claim 9, The semiconductor layer except for the channel portion between the source electrode and the drain electrode has the same pattern as the data line and the drain electrode. The thin film transistor array panel of claim 1, A common electrode panel facing the thin film transistor array panel and having a common electrode facing the pixel electrode; Liquid crystal display comprising a. In claim 11, And a color filter formed on the thin film transistor array panel or the common electrode display panel, the color filter including red, green, and blue color filters formed along a column of pixels separated by the data lines. In claim 11, Further comprising a liquid crystal layer formed between the thin film transistor array panel and the common electrode display panel, The liquid crystal contained in the liquid crystal layer has a negative dielectric anisotropy, and the long axis of the liquid crystal is vertically aligned with respect to the two display panels. The method of claim 13, And the common electrode and the pixel electrode have pixel dividing means for dividing and aligning liquid crystal molecules of the liquid crystal layer. The method of claim 14, And the pixel dividing means is a cutout or protrusion. The method of claim 14, And the pixel dividing means is formed in a curved shape along the shape of the data line. The method of claim 16, And the pixel dividing means overlaps the drain electrode and the sustain electrode.

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