KR100977204B1 - Probe card and method of making the same - Google Patents

Abstract

Provided are a probe card and a method of manufacturing a probe card capable of inspecting a high density wafer.

The probe card is located on a printed circuit board, a central region of the printed circuit board, protrudes from the structure body layer and the structure body layer having a first height from the printed circuit board, and from the printed circuit board. A structure layer comprising a structure tip layer having a second height higher than the height, and a first portion located on the printed circuit board, the first portion having a third height lower than the first height from the printed circuit board, the first portion A second portion extending from and positioned on the structure body layer, the second portion having a fourth height from the printed circuit board between the first and second heights and extending from the second portion on the structure tip layer And a third portion having a fifth height higher than the second height from the printed circuit board. It includes a lead layer containing powder.

Probe Cards, Photolithography, Structural Layers

Description

PROBE CARD AND METHOD OF MAKING THE SAME

The present invention relates to a method of manufacturing a probe card and a probe card, and more particularly, to a method of manufacturing a probe card and a probe card using photolithography technology.

In general, semiconductor devices have a fabrication process of forming contact pads for circuit patterns and inspections on a wafer, and an assembly process of assembling wafers having circuit patterns and contact pads into respective semiconductor chips. It is manufactured through.

An inspection process is performed between the fabrication process and the assembly process to inspect the electrical characteristics of the wafer by applying an electrical signal to the contact pads formed on the wafer. This inspection process is performed to inspect a defect of a wafer and to remove a portion of a wafer in which a defect occurs during an assembly process.

In the inspection process, inspection equipment called a tester for applying an electrical signal to a wafer and probe equipment for performing an interface function between the wafer and the tester are mainly used. Among them, the probe card includes a printed circuit board that receives an electrical signal applied from a tester and a plurality of contact tips contacting contact pads formed on the wafer.

Recently, as the demand for highly integrated chips increases, the circuit patterns formed on the wafer by the fabrication process and the contact pads connected with the circuit patterns are highly integrated and finely formed, thereby contacting the probe card in contact with the contact pads. A method of manufacturing a probe card using photolithography technology capable of finely controlling tip size has been developed.

However, in the conventional method of manufacturing a probe card as described above, since the contact tips are attached to the printed circuit board after manufacturing the plurality of contact tips, it is difficult to form minute intervals between the contact tips located adjacent to the printed circuit board. There is a problem.

1 is a cross-sectional view showing a conventional probe card.

As shown in FIG. 1, a conventional probe card 10 includes a printed circuit board 11, an interposer 12, a space transducer 13, and a contact tip 14.

The printed circuit board 11 includes a probe circuit pattern formed for the inspection process, and receives the electrical signal applied from the tester (not shown) and transmits the electrical signal to the contact tip 14 through the interposer 12. Do this.

The interposer 12 is connected to the probe circuit pattern through a pad (not shown) formed on the printed circuit board 11 to electrically connect the printed circuit board 11 and the contact tip 14. Perform.

The space transducer 13 has a smaller spacing (pitch) between the first pads 13a formed on the lower surface than the spacing (pitch) between the second pads 13b formed on the upper surface, thereby performing a function of pitch conversion.

In addition, the space converter 13 is formed of a multi-layer ceramic (MLC) substrate, and transmits an electrical signal received from the printed circuit board 11 to the probe 14 by a conductive layer formed therein. .

Such a multilayer ceramic substrate is manufactured by alternately forming a conductive layer and an insulating layer in an insulating substrate several times.

As described above, the conventional probe card 10 finely adjusts the distance between pads (not shown) of the printed circuit board 11 in contact with the contact tip 14 even when the gap between the contact tips 14 is minutely formed. Since it is difficult to do so, an interposer 12 and a space converter 13 for pitch conversion function were used between the contact tip 14 and the printed circuit board 11. Thereby, there was a problem that the manufacturing time and manufacturing cost of the probe card are increased.

In addition, in the conventional probe card 10, when the spacing between the contact tips 14 is made small, between the adjacent contact tips 14 by an electrical signal applied from the tester (not shown) to the contact tips 14. There was a problem in that an error occurs in the inspection process due to the electromagnetic wave generated interference caused by the electromagnetic wave.

One embodiment of the present invention is to solve the above-described problems, it is an object of the present invention to provide a probe card and a method for manufacturing a probe card that can form a fine gap between the adjacent contact tip located on the printed circuit board It is done.

In addition, an object of the present invention is to provide a probe card and a method of manufacturing the probe card, which can reduce manufacturing time and manufacturing cost.

In addition, when forming a small gap between the adjacent contact tips on the printed circuit board, a method of manufacturing a probe card and a probe card that can suppress interference due to electromagnetic waves generated by the electrical signal applied to the contact tip The purpose is to provide.

As a technical means for achieving the above-described technical problem, a first aspect of the present invention is a probe card, located on a printed circuit board, the central region of the printed circuit board, having a first height from the printed circuit board A structure layer comprising a structure body layer and a structure tip layer protruding from the structure body layer, the structure tip layer having a second height higher than the first height from the printed circuit board, and located on the printed circuit board; A first portion having a third height lower than the first height from the substrate, the first portion extending from the first portion and positioned on the structure body layer, wherein the first portion is between the first height and the second height from the printed circuit board; A second portion having a height of four and extending from the second portion on the structure tip layer And a lead layer including a third portion from the printed circuit board, the third portion having a fifth height higher than the second height.

The structure body layer may further include an insulating resin layer disposed on the first portion of the lead layer and the second portion of the lead layer.

The insulating resin layer may be exposed to the outside.

The insulating resin layer may be formed of at least one of parylene, a fluorine resin, a siloxane polymer, and a polysiloxane polymer.

The structure layer may include silicon, and the structure layer may further include a silicon oxide layer disposed between the structure tip layer and the lead layer.

The lead layer may further include a first conductive layer positioned at least partially on the structure layer and the printed circuit board, and a second conductive layer positioned on the first conductive layer.

The first conductive layer may have a higher chemical affinity with the structure layer than the second conductive layer.

It may further include an elastic layer located between the printed circuit board and the structure layer.

The display device may further include a fixing part positioned on the first portion of the lead layer.

In addition, a second aspect of the present invention provides a method of manufacturing a probe card, comprising: a) providing a printed circuit board, b) a structure layer comprising a structure body layer and a structure tip layer protruding from the structure body layer, And a first portion spaced apart from the structure layer, a second portion extending from the first portion and positioned on the structure body layer, and a third portion extending from the second portion and positioned on the structure tip layer. Providing a contact unit comprising a lead layer, and c) the structure body layer has a first height from the printed circuit board, and the structure tip layer has a second height higher than the first height from the printed circuit board. Wherein the first portion has a third height lower than the first height from the printed circuit board, and wherein the second portion Printing the contact unit such that the contact unit has a fourth height from the printed circuit board, the fourth height being between the first height and the second height, and the third portion has a fifth height higher than the second height from the printed circuit board. Provided is a method of manufacturing a probe card, the method comprising positioning on a circuit board.

The step b) includes preparing a silicon substrate, forming a silicon oxide layer on the silicon substrate, and opening a second region on the silicon oxide layer, the second region surrounding the first region corresponding to the structure tip layer. Forming a photoresist pattern; etching the silicon oxide layer using the first photoresist pattern; etching the silicon substrate to form the structure tip layer; and removing the first photoresist pattern. It may include a step.

The step b) may include forming a first conductive layer on the silicon substrate on which the structure tip layer is formed, forming a second conductive layer on the first conductive layer, and forming the first conductive layer on the second conductive layer. Forming a second photoresist pattern such that a fourth region surrounding a portion, the second portion, and a third region corresponding to the third portion is opened; using the second photoresist pattern, the first conductive layer And etching the second conductive layer to form the lead layer and removing the second photoresist pattern.

The step b) may further include forming an insulating resin layer on the lead layer.

The step b) may further include removing the insulating resin layer located on the third portion so that the third portion of the lead layer is opened.

The step b) may further include removing the silicon substrate corresponding to the first portion of the lead layer to form the structure body layer.

Removal of the silicon substrate may be performed using a wet etching process.

The method may further include forming an elastic layer on the printed circuit board to be positioned between the printed circuit board and the structure layer.

The method may further include forming a fixing part on the first portion of the lead layer.

According to one of the problem solving means of the present invention described above, there is an effect that it is possible to finely form the interval between the contact tips located adjacent to the printed circuit board using a multi-photolithography technique using a photoresist layer.

In addition, it is possible to reduce manufacturing time and manufacturing cost by using various photolithography techniques.

In addition, there is an effect that can form an insulating resin layer to suppress the interference due to electromagnetic waves generated by the electrical signal applied to the contact tip.

DETAILED DESCRIPTION Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings so that those skilled in the art may easily implement the present invention. As those skilled in the art would realize, the described embodiments may be modified in various different ways, all without departing from the spirit or scope of the present invention. In the drawings, parts irrelevant to the description are omitted in order to clearly describe the present invention, and like reference numerals designate like parts throughout the specification.

Throughout the specification, when a member is located “on” another member, this includes not only when one member is in contact with another member but also when another member exists between the two members. In addition, when a part is said to "include" a certain component, it means that it can further include other components, without excluding other components unless otherwise stated.

Hereinafter, a probe card according to an exemplary embodiment of the present invention will be described with reference to FIGS. 2 and 3.

2 is a bottom plan view illustrating a probe card according to an exemplary embodiment of the present invention, and FIG. 3 is a cross-sectional view taken along line III-III of FIG. 2.

As shown in Figure 2 and 3, the probe card 1000 according to an embodiment of the present invention is a printed circuit board 100, elastic layer 200, structure layer 300, lead layer 400, The insulating resin layer 500 and the fixing part 600 are included.

The printed circuit board 100 is formed in a substantially disk shape and includes a probe circuit pattern (not shown) for an inspection process. The printed circuit board 100 may be connected to a computer for an inspection process. The elastic layer 200 is positioned in a substantially central region of the printed circuit board 100.

The elastic layer 200 is positioned on the printed circuit board 100 and is formed in a substantially square pillar shape. The elastic layer 200 includes a structure 210 and an elastic portion 220.

The structural unit 210 is located on the printed circuit board 100 and is a structure made of stainless steel or the like.

The elastic part 220 is made of a material having elasticity such as rubber, and elastically corresponds to the pressure applied to the elastic part 220 during the inspection process.

The structure layer 300 is positioned on the elastic part 220.

The structure layer 300 is made of silicon (Si) and includes a structure body layer 310, a structure tip layer 320, and a silicon oxide layer 330.

The structure body layer 310 is located on the elastic layer 200 and has a first height H1 from the printed circuit board 100.

The structure tip layer 320 protrudes upward from the structure body layer 310 and has a second height H2 higher than the first height H1 from the printed circuit board 100.

The silicon oxide layer 330 is positioned on the structure tip layer 320 and is made of silicon oxide (SiOx).

The lead layer 400 is positioned on the silicon oxide layer 330.

The lead layer 400 extends from the peripheral area of the printed circuit board 100 to the center area and includes a first conductive layer 410 and a second conductive layer 420. The lead layer 400 is connected to a probe circuit pattern (not shown) formed on the printed circuit board 100. More specifically, the connection between the lead layer 400 and the probe circuit pattern (not shown) formed on the printed circuit board 100 may be formed between the lead layer 400 and the printed circuit board 100. (Not shown).

The first conductive layer 410 is positioned on the printed circuit board 100 and the structure layer 300 and is a metal material including titanium (Ti) or chromium (Cr). The first conductive layer 410 has a higher chemical affinity with the printed circuit board 100 and the structure layer 300 than the second conductive layer 420, the second conductive layer 420, the printed circuit board 100, and It serves to facilitate the bonding between the structure layer (300).

Here, chemical affinity means the adhesive force of two materials.

The second conductive layer 420 is positioned on the first conductive layer 410 and is a metal material made of gold (Au), copper (Cu), or the like.

The lead layer 400 also includes a first portion 400a, a second portion 400b, and a third portion 400c.

The first portion 400a is located on the periphery of the printed circuit board 100 and has a third height H3 lower than the first height H1 from the printed circuit board 100.

The second portion 400b is bent and extends from the first portion 400a and is located on the structure body layer 310 of the structure layer 300, the first height H1 and the second from the printed circuit board 100. It has a 4th height H4 between height H2.

The third portion 400c is located on the silicon oxide layer 330 extending from the second portion 400b and positioned on the structure tip layer 320, and the second height H2 from the printed circuit board 100. It has a higher fifth height H5. That is, the third portion 400c of the lead layer 400 forms a step with the first portion 400a and the second portion 400b and is positioned on the uppermost layer of the probe card 1000. As a result, during the inspection step, the third portion 400c of the lead layer 400 comes into contact with the contact pads formed on the inspection target such as the semiconductor wafer.

Insulation is performed on the upper and side surfaces of the lead layer 400 and the surface of the structure layer 300 except for the third portion 400c of the lead layer 400, which contacts the contact pads formed on the inspected object such as a semiconductor wafer during the inspection process. The resin layer 500 is located.

The insulating resin layer 500 is made of a flexible insulating resin made of parylene, a fluorine resin, a siloxane polymer, a polysiloxane polymer, and the like, and is exposed to the outside. The insulating resin layer 500 prevents interference due to electromagnetic waves generated by an electrical signal applied to the lead layer 400 during a short circuit or an inspection process between neighboring lead layers 400.

The fixing part 600 is positioned on the insulating resin layer 500 corresponding to the first portion 400a of the lead layer 400.

The fixing part 600 is positioned on the first portion 400a of the lead layer 400. The fixing part 600 is positioned on the peripheral area of the printed circuit board 100 and extends in a circle along the peripheral area of the printed circuit board 100. The fixing part 600 fixes the lead layer 400 with respect to the printed circuit board 100.

In another embodiment, the fixture 600 is located on the first portion 400a of the lead layer 400, and may be spaced apart from neighboring fixture 600 located on the neighboring lead layer 400. Can be.

Hereinafter, a method of manufacturing a probe card according to an embodiment of the present invention will be described with reference to FIGS. 3 to 17.

4 is a flowchart illustrating a method of manufacturing a probe card according to an exemplary embodiment of the present invention, and FIGS. 5 to 17 are views illustrating a method of manufacturing a probe card according to an exemplary embodiment of the present invention.

First, as shown in FIGS. 4 and 5, a printed circuit board 100 is provided (S100).

As shown in FIG. 5, a printed circuit board 100 having a probe circuit pattern (not shown) is provided.

Next, the elastic layer 200 is formed on the printed circuit board 100 (S200).

As shown in FIG. 5, the structure 210 is formed on the central region of the printed circuit board 100, and the elastic portion 220 is formed on the structure 210 to be elastic on the printed circuit board 100. Form layer 200.

Next, as shown in FIGS. 6 to 16, the contact unit 1100 is provided (S300).

First, as shown in FIG. 6, a silicon substrate 301 made of silicon is prepared.

The silicon substrate 301 may be disc-shaped made of silicon single crystal.

Next, a silicon oxide layer 330 is formed on the silicon substrate 301, and a first photoresist layer 800 is formed on the silicon oxide layer 330.

Specifically, the surface of the silicon substrate 301 is oxidized to form a silicon oxide layer 330, and a resin containing a photoresist material is coated on the silicon oxide layer 330 to form the first photoresist layer 800. Form.

Next, as shown in FIG. 7, the first photoresist layer 800 is exposed and developed to open the second region B surrounding the first region A of the first photoresist layer 800. The first photoresist pattern 850 is formed. Due to the formation of the first photoresist pattern 850, the silicon oxide layer 330 corresponding to the second region B is exposed.

Specifically, after aligning the mask on the first photoresist layer 800, the first photoresist layer 800 is exposed by irradiating ultraviolet rays or the like to the first photoresist layer 800 through the mask, and then the developer The first photoresist layer 800 corresponding to the second region B is developed by using the first photoresist pattern 850.

Next, as shown in FIG. 8, the silicon oxide layer 330 is etched using the first photoresist pattern 850.

Specifically, the silicon oxide layer 330 corresponding to the second region B in which the first photoresist pattern 850 is not positioned is etched using a dry etching process.

Next, as illustrated in FIG. 9, the structure tip layer 320 is formed by etching the silicon substrate 301 using the first photoresist pattern 850 and the silicon oxide layer 330.

Specifically, the silicon substrate 301 corresponding to the second region B in which the first photoresist pattern 850 and the silicon oxide layer 330 is not located is etched using a bosch process. During etching, aligning the additional mask member on an area not related to etching, and etching the silicon substrate 301 smoothes the surface of the surface of the etched silicon substrate 301 and at the same time the silicon substrate 301. Can be etched.

Next, as shown in FIG. 9, the first photoresist pattern 850 is removed from the silicon oxide layer 330.

Specifically, the first photoresist pattern 850 located on the silicon oxide layer 330 is removed using an ashing process. Meanwhile, when dry etching the silicon substrate 301, the first photoresist pattern 850 may also be etched and removed at the same time.

Next, as shown in FIG. 10, the first conductive layer 410 is formed on the silicon substrate 301 on which the structure tip layer 320 is formed, and the second conductive layer 420 is formed on the first conductive layer 410. ) And a second photoresist layer 900 is formed on the second conductive layer 420.

Specifically, the first conductive layer 410 and the second conductive layer 420 are sequentially formed on the silicon substrate 301 etched using the sputtering process, and a resin containing a photoresist material is formed in the second conductive layer ( The second photoresist layer 900 is formed on the substrate 420.

Next, as illustrated in FIG. 11, the second photoresist layer 900 is exposed and developed to open the fourth region D surrounding the third region C of the second photoresist layer 900. The second photoresist pattern 950 is formed. Due to the formation of the second photoresist pattern 950, the second conductive layer 420 corresponding to the fourth region D is exposed.

Specifically, after aligning the mask on the second photoresist layer 900, the second photoresist layer 900 is exposed by irradiating ultraviolet rays or the like to the second photoresist layer 900 through the mask, and then the developer The second photoresist layer 900 corresponding to the fourth region D may be developed to form the second photoresist pattern 950 using.

Next, as shown in FIG. 12, dry etching or wet etching the first conductive layer 410 and the second conductive layer 420 corresponding to the fourth region D using the second photoresist pattern 950. Etching is performed using a process or the like. Due to the etching of the first conductive layer 410 and the second conductive layer 420 corresponding to the fourth region D, the surface of the silicon substrate 301 corresponding to the fourth region D is exposed. In this step, the first conductive layer 410 and the second conductive layer 420 are patterned to each other including the first conductive layer 410 and the second conductive layer 420 as shown in FIG. Adjacent lead layers 400 may be spaced apart from each other.

Next, as shown in FIG. 12, the second photoresist pattern 950 is removed from the second conductive layer 420.

Specifically, the second photoresist pattern 950 positioned on the second conductive layer 420 is removed using an etching process.

Next, as shown in FIG. 13, an insulating resin 501 made of parylene, a fluorine resin, a siloxane polymer, a polysiloxane polymer, or the like is formed on the surface of the lead layer 400 and the silicon substrate 301 exposed to the outside.

Next, as shown in FIG. 14, an insulating resin (which is disposed on an upper surface of the lead layer 400 corresponding to the third portion 400c of the lead layer 400 in contact with the contact pad formed on the object under test) ( Insulating resin layer 500 positioned on the upper and side surfaces of the lead layer 400 and the structure layer 300 exposed to the outside except for the third portion 400c of the lead layer 400 by removing the 501. To form.

Next, as shown in FIG. 15, the silicon substrate 301 corresponding to the first portion 400a of the lead layer 400 is removed using wet etching to form the structure body layer 310.

Specifically, the silicon substrate 301 corresponding to the first portion 400a of the lead layer 400 to be formed later is immersed in a bath 1 containing an etching solution 2 for etching only the silicon substrate 301, and then fixed. After the time elapses, the silicon substrate 301 is lifted from the etching solution 2 to remove the silicon substrate 301 corresponding to the first portion 400a of the lead layer 400.

Due to the above method, as shown in FIG. 16, the contact unit 1100 including the structure layer 300 and the lead layer 400 is formed.

Next, as shown in FIG. 17, the first portion 400a of the lead layer 400 is corresponded on the peripheral area of the printed circuit board 100, and the structure layer 300 is formed on the printed circuit board 100. The contact unit 1100 is aligned on the printed circuit board 100 and the elastic layer 200 in correspondence with the elastic layer 200 located on the center area, and then moves the contact unit 1100 in the first direction. By placing the contact unit 1100 on the printed circuit board 100 (S400).

As a result, as shown in FIG. 3, the structure body layer 310 included in the contact unit 1100 has the first height H1 from the printed circuit board 100, and the structure tip layer 320 is printed. The first portion 400a of the lead layer 400 has the second height H2 from the circuit board 100, and the first portion 400a of the lead layer 400 has the third height H3 from the printed circuit board 100. The second portion 400b has a fourth height H4 from the printed circuit board 100, and the third portion 400c of the lead layer 400 has a fifth height H5 from the printed circuit board 100. Have. That is, the third portion 400c of the lead layer 400 forms a step with the first portion 400a and the second portion 400b and is positioned on the uppermost layer of the probe card 1000.

Next, to form the fixing part 600 on the contact unit 1100 (S500).

The fixing part 600 is formed on the first region A of the lead layer 400. When the fixing part 600 is formed, the fixing part 600 may be formed to extend in a circular shape along the peripheral area of the printed circuit board 100.

As described above, a state in which each of the plurality of lead layers 400 in which the distance between neighboring lead layers 400 is finely controlled using photolithography is connected to the probe circuit pattern (not shown) of the printed circuit board 100. Probe card 1000 is manufactured.

As a result, a probe card having a minute spacing between adjacent lead layers 400 is provided to inspect the highly integrated wafer.

In addition, since the probe card 1000 including the lead layer 400 and the structure layer 300 in contact with the contact pads formed on the inspected object is manufactured using various photolithography techniques, the printed circuit board 100 and the lead layer No additional components such as a space transformer and interposer for pitch conversion between the 400 are needed. Thereby, manufacturing time and manufacturing cost of a probe card can be reduced.

In addition, the upper surface of the lead layer 400 except the upper surface of the third portion 400c of the lead layer 400 in which the insulating resin layer 500, which is a flexible insulating resin, contacts the contact pads formed on the wafer during the inspection process, and Since it is formed on the side surface and the structure layer 300 exposed to the outside, the short circuit between neighboring lead layers 400 or the interference by electromagnetic waves generated by an electrical signal applied to the lead layer 400 is suppressed. .

The foregoing description of the present invention is intended for illustration, and it will be understood by those skilled in the art that the present invention may be easily modified in other specific forms without changing the technical spirit or essential features of the present invention. will be. It is therefore to be understood that the above-described embodiments are illustrative in all aspects and not restrictive. For example, each component described as a single type may be implemented in a distributed manner, and similarly, components described as distributed may be implemented in a combined form.

The scope of the present invention is shown by the following claims rather than the above description, and all changes or modifications derived from the meaning and scope of the claims and their equivalents should be construed as being included in the scope of the present invention. do.

1 is a cross-sectional view showing a conventional probe card,

2 is a bottom plan view showing a probe card according to an embodiment of the present invention;

3 is a cross-sectional view taken along line III-III of FIG. 2,

4 is a flowchart illustrating a method of manufacturing a probe card according to an embodiment of the present invention.

5 to 17 are views for explaining a method of manufacturing a probe card according to an embodiment of the present invention.

Claims (18)

In the probe card 1000, Printed circuit board 100, A structure body layer 310 positioned on a central region of the printed circuit board 100 and having a first height from the printed circuit board 100, and The structure tip layer 320 protruding from the structure body layer 310 and having a second height H2 higher than the first height H1 from the printed circuit board 100. Structure layer 300 comprising a, and A first portion 400a positioned on the printed circuit board 100 to be spaced apart from the structure layer 300 and having a third height H3 lower than the first height H1 from the printed circuit board 100. ), A fourth height extending from the first portion 400a and positioned on the structure body layer 310 and between the first height H1 and the second height H2 from the printed circuit board 100. Second portion 400b having (H4), and A third portion extending from the second portion 400b and positioned on the structure tip layer 320 and having a fifth height H5 higher than the second height H2 from the printed circuit board 100 ( 400c) Lead layer 400 including Probe card comprising a. The method of claim 1, Further comprising an insulating resin layer 500 positioned on the structure body layer 310, the first portion 400a of the lead layer 400, and the second portion 400b of the lead layer 400. Probe card. The method of claim 2, The probe resin card 500 is exposed to the outside. The method of claim 2, The insulating resin layer 500 is a probe card made of at least one of parylene, fluorine resin, siloxane polymer (Siloxane Polymer), polysiloxane polymer (Polysiloxane Polymer). The method of claim 1, The structure layer 300 includes silicon, The structure layer (300) further comprises a silicon oxide layer (330) positioned between the structure tip layer (320) and the lead layer (400). The method of claim 1, The lead layer 400, A first conductive layer 410 at least partially positioned on the structure layer 300 and the printed circuit board 100, and A second conductive layer 420 positioned on the first conductive layer Probe card further comprising. The method of claim 6, The first conductive layer (410) is a probe card having a higher chemical affinity with the structure layer (300) than the second conductive layer (420). The method of claim 1, And a resilient layer (200) positioned between the printed circuit board (100) and the structure layer (300). The method of claim 1, And a fixing part (600) positioned on the first portion (400a) of the lead layer (400). In the method for manufacturing the probe card 1000, a) preparing a printed circuit board 100, b) a structure layer 300 including a structure body layer 310 and a structure tip layer 320 protruding from the structure body layer 310, and a first portion 400a spaced apart from the structure layer 300. ), A second portion 400b extending from the first portion 400a and positioned on the structure body layer 310, and extending from the second portion 400b and positioned on the structure tip layer 320. Providing a contact unit 1100 including a lead layer 400 including a third portion 400c, and c) the structure body layer 310 has a first height H1 from the printed circuit board 100, and the structure tip layer 320 is greater than the first height H1 from the printed circuit board 100. Has a high second height H2, the first portion 400a has a third height H3 lower than the first height H1 from the printed circuit board 100, and the second portion 400b ) Has a fourth height H4 between the first height H1 and the second height H2 from the printed circuit board 100, the third portion 400c being the printed circuit board 100. Positioning the contact unit 1100 on the printed circuit board 100 to have a fifth height H5 higher than the second height H2). Probe card manufacturing method comprising a. The method of claim 10, Step b), Preparing a silicon substrate 301, Forming a silicon oxide layer 330 on the silicon substrate 301, Forming a first photoresist pattern 850 on the silicon oxide layer 330 such that a second region B surrounding the first region A corresponding to the structure tip layer 320 is opened; Etching the silicon oxide layer 330 using the first photoresist pattern 850; Etching the silicon substrate 301 to form the structure tip layer 320, and Removing the first photoresist pattern 850 Probe card manufacturing method comprising a. The method of claim 11, Step b) is Forming a first conductive layer 410 on the silicon substrate 301 on which the structure tip layer 320 is formed, Forming a second conductive layer 420 on the first conductive layer 410, A fourth region on the second conductive layer 420 surrounding the first portion 400a, the second portion 400b, and a third region C corresponding to the third portion 400c ( Forming a second photoresist pattern 950 such that D) is opened; Etching the first conductive layer 410 and the second conductive layer 420 using the second photoresist pattern 950 to form the lead layer 400, and Removing the second photoresist pattern 950 Probe card manufacturing method further comprising. 13. The method of claim 12, Step b), Probe card manufacturing method further comprises the step of forming an insulating resin layer (500) on the lead layer (400). The method of claim 13, Step b), And removing the insulating resin layer (500) located on the third portion (400c) to open the third portion (400c) of the lead layer (400). 13. The method of claim 12, Step b), And removing the silicon substrate (301) corresponding to the first portion (400a) of the lead layer (400) to form the structure body layer (310). The method of claim 15, The removal of the silicon substrate (301) is carried out using a wet etching process. The method of claim 10, And forming an elastic layer (200) on the printed circuit board (100) so as to be positioned between the printed circuit board (100) and the structure layer (300). The method of claim 10, And forming a fixing part (600) on the first portion (400a) of the lead layer (400).

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