KR100968182B1 - 고이동도 벌크 실리콘 pfet - Google Patents

고이동도 벌크 실리콘 pfet Download PDF

Info

Publication number
KR100968182B1
KR100968182B1 KR1020077005933A KR20077005933A KR100968182B1 KR 100968182 B1 KR100968182 B1 KR 100968182B1 KR 1020077005933 A KR1020077005933 A KR 1020077005933A KR 20077005933 A KR20077005933 A KR 20077005933A KR 100968182 B1 KR100968182 B1 KR 100968182B1
Authority
KR
South Korea
Prior art keywords
single crystal
crystal silicon
layer
region
polysilicon
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020077005933A
Other languages
English (en)
Korean (ko)
Other versions
KR20070051901A (ko
Inventor
브랜트 에이 앤더슨
루이스 디 랜제로티
에드워드 제이 노왁
Original Assignee
인터내셔널 비지네스 머신즈 코포레이션
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 인터내셔널 비지네스 머신즈 코포레이션 filed Critical 인터내셔널 비지네스 머신즈 코포레이션
Publication of KR20070051901A publication Critical patent/KR20070051901A/ko
Application granted granted Critical
Publication of KR100968182B1 publication Critical patent/KR100968182B1/ko
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/13Semiconductor regions connected to electrodes carrying current to be rectified, amplified or switched, e.g. source or drain regions
    • H10D62/149Source or drain regions of field-effect devices
    • H10D62/151Source or drain regions of field-effect devices of IGFETs 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D44/00Charge transfer devices
    • H10D44/40Charge-coupled devices [CCD]
    • H10D44/45Charge-coupled devices [CCD] having field effect produced by insulated gate electrodes 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/40FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels
    • H10D30/47FETs having zero-dimensional [0D], one-dimensional [1D] or two-dimensional [2D] charge carrier gas channels having two-dimensional [2D] charge carrier gas channels, e.g. nanoribbon FETs or high electron mobility transistors [HEMT]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/601Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/751Insulated-gate field-effect transistors [IGFET] having composition variations in the channel regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/791Arrangements for exerting mechanical stress on the crystal lattice of the channel regions
    • H10D30/797Arrangements for exerting mechanical stress on the crystal lattice of the channel regions being in source or drain regions, e.g. SiGe source or drain
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/01Manufacture or treatment
    • H10D62/021Forming source or drain recesses by etching e.g. recessing by etching and then refilling
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/113Isolations within a component, i.e. internal isolations
    • H10D62/115Dielectric isolations, e.g. air gaps
    • H10D62/116Dielectric isolations, e.g. air gaps adjoining the input or output regions of field-effect devices, e.g. adjoining source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351Substrate regions of field-effect devices
    • H10D62/357Substrate regions of field-effect devices of FETs
    • H10D62/364Substrate regions of field-effect devices of FETs of IGFETs
    • H10D62/371Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251Source or drain electrodes for field-effect devices
    • H10D64/258Source or drain electrodes for field-effect devices characterised by the relative positions of the source or drain electrodes with respect to the gate electrode
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/23Electrodes carrying the current to be rectified, amplified, oscillated or switched, e.g. sources, drains, anodes or cathodes
    • H10D64/251Source or drain electrodes for field-effect devices
    • H10D64/258Source or drain electrodes for field-effect devices characterised by the relative positions of the source or drain electrodes with respect to the gate electrode
    • H10D64/259Source or drain electrodes being self-aligned with the gate electrode and having bottom surfaces higher than the interface between the channel and the gate dielectric
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0167Manufacturing their channels
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/017Manufacturing their source or drain regions, e.g. silicided source or drain regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/0123Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0188Manufacturing their isolation regions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/82Heterojunctions
    • H10D62/822Heterojunctions comprising only Group IV materials heterojunctions, e.g. Si/Ge heterojunctions
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/01Manufacture or treatment
    • H10D64/021Manufacture or treatment using multiple gate spacer layers, e.g. bilayered sidewall spacers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01Manufacture or treatment
    • H10D84/02Manufacture or treatment characterised by using material-based technologies
    • H10D84/03Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/035Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon carbide [SiC] technology

Landscapes

  • Thin Film Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
KR1020077005933A 2004-09-20 2005-09-19 고이동도 벌크 실리콘 pfet Expired - Fee Related KR100968182B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/711,453 US7078722B2 (en) 2004-09-20 2004-09-20 NFET and PFET devices and methods of fabricating same
US10/771,453 2004-09-20

Publications (2)

Publication Number Publication Date
KR20070051901A KR20070051901A (ko) 2007-05-18
KR100968182B1 true KR100968182B1 (ko) 2010-07-07

Family

ID=36073000

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020077005933A Expired - Fee Related KR100968182B1 (ko) 2004-09-20 2005-09-19 고이동도 벌크 실리콘 pfet

Country Status (7)

Country Link
US (2) US7078722B2 (https=)
EP (1) EP1792346B1 (https=)
JP (1) JP5063352B2 (https=)
KR (1) KR100968182B1 (https=)
CN (1) CN100505301C (https=)
TW (1) TW200625633A (https=)
WO (1) WO2006034189A2 (https=)

Families Citing this family (40)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8450806B2 (en) * 2004-03-31 2013-05-28 International Business Machines Corporation Method for fabricating strained silicon-on-insulator structures and strained silicon-on insulator structures formed thereby
KR100669556B1 (ko) * 2004-12-08 2007-01-15 주식회사 하이닉스반도체 반도체 소자 및 그 제조 방법
KR100607785B1 (ko) * 2004-12-31 2006-08-02 동부일렉트로닉스 주식회사 스플릿 게이트 플래시 이이피롬의 제조방법
US7332443B2 (en) * 2005-03-18 2008-02-19 Infineon Technologies Ag Method for fabricating a semiconductor device
US20060226453A1 (en) * 2005-04-12 2006-10-12 Wang Everett X Methods of forming stress enhanced PMOS structures
US20070045707A1 (en) * 2005-08-31 2007-03-01 Szu-Yu Wang Memory device and manufacturing method thereof
CN100442476C (zh) * 2005-09-29 2008-12-10 中芯国际集成电路制造(上海)有限公司 用于cmos技术的应变感应迁移率增强纳米器件及工艺
JP2007281038A (ja) * 2006-04-03 2007-10-25 Toshiba Corp 半導体装置
US7482656B2 (en) * 2006-06-01 2009-01-27 International Business Machines Corporation Method and structure to form self-aligned selective-SOI
US7557000B2 (en) * 2006-11-20 2009-07-07 Semiconductor Manufacturing International (Shanghai) Corporation Etching method and structure using a hard mask for strained silicon MOS transistors
US7829407B2 (en) 2006-11-20 2010-11-09 International Business Machines Corporation Method of fabricating a stressed MOSFET by bending SOI region
CN101226899A (zh) * 2007-01-19 2008-07-23 中芯国际集成电路制造(上海)有限公司 在硅凹陷中后续外延生长应变硅mos晶片管的方法和结构
WO2008146638A1 (ja) * 2007-05-25 2008-12-04 Tokyo Electron Limited 薄膜およびその薄膜を用いた半導体装置の製造方法
CN101364545B (zh) 2007-08-10 2010-12-22 中芯国际集成电路制造(上海)有限公司 应变硅晶体管的锗硅和多晶硅栅极结构
US8101500B2 (en) * 2007-09-27 2012-01-24 Fairchild Semiconductor Corporation Semiconductor device with (110)-oriented silicon
US8329564B2 (en) 2007-10-26 2012-12-11 International Business Machines Corporation Method for fabricating super-steep retrograde well MOSFET on SOI or bulk silicon substrate, and device fabricated in accordance with the method
US7541629B1 (en) * 2008-04-21 2009-06-02 International Business Machines Corporation Embedded insulating band for controlling short-channel effect and leakage reduction for DSB process
US8048723B2 (en) 2008-12-05 2011-11-01 Taiwan Semiconductor Manufacturing Company, Ltd. Germanium FinFETs having dielectric punch-through stoppers
US8106459B2 (en) 2008-05-06 2012-01-31 Taiwan Semiconductor Manufacturing Company, Ltd. FinFETs having dielectric punch-through stoppers
KR20090126849A (ko) * 2008-06-05 2009-12-09 주식회사 동부하이텍 반도체 소자 및 이를 위한 sti 형성 방법
US8263462B2 (en) 2008-12-31 2012-09-11 Taiwan Semiconductor Manufacturing Company, Ltd. Dielectric punch-through stoppers for forming FinFETs having dual fin heights
US8293616B2 (en) * 2009-02-24 2012-10-23 Taiwan Semiconductor Manufacturing Company, Ltd. Methods of fabrication of semiconductor devices with low capacitance
CN102024761A (zh) * 2009-09-18 2011-04-20 中芯国际集成电路制造(上海)有限公司 用于形成半导体集成电路器件的方法
TWI517355B (zh) * 2010-02-16 2016-01-11 凡 歐貝克 具有半導體裝置和結構之系統
US8940589B2 (en) * 2010-04-05 2015-01-27 Taiwan Semiconductor Manufacturing Company, Ltd. Well implant through dummy gate oxide in gate-last process
CN102237396B (zh) * 2010-04-27 2014-04-09 中国科学院微电子研究所 半导体器件及其制造方法
US9263339B2 (en) 2010-05-20 2016-02-16 Taiwan Semiconductor Manufacturing Company, Ltd. Selective etching in the formation of epitaxy regions in MOS devices
US8828850B2 (en) 2010-05-20 2014-09-09 Taiwan Semiconductor Manufacturing Company, Ltd. Reducing variation by using combination epitaxy growth
US8383474B2 (en) * 2010-05-28 2013-02-26 International Business Machines Corporation Thin channel device and fabrication method with a reverse embedded stressor
US8835994B2 (en) * 2010-06-01 2014-09-16 International Business Machines Corporation Reduced corner leakage in SOI structure and method
CN101924138B (zh) * 2010-06-25 2013-02-06 中国科学院上海微系统与信息技术研究所 防止浮体及自加热效应的mos器件结构及其制备方法
CN104282570B (zh) * 2013-07-08 2017-04-05 中芯国际集成电路制造(上海)有限公司 半导体器件的制备方法
CN104425280B (zh) * 2013-09-09 2018-08-14 中芯国际集成电路制造(上海)有限公司 半导体器件结构及其形成方法
US9837538B2 (en) * 2016-03-25 2017-12-05 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device and manufacturing method thereof
CN107946367B (zh) * 2017-11-20 2021-04-27 京东方科技集团股份有限公司 一种薄膜晶体管的制作方法及薄膜晶体管
CN108037131B (zh) * 2017-12-21 2020-10-16 上海华力微电子有限公司 一种对插塞缺陷进行检测的方法
US11049873B2 (en) * 2018-09-24 2021-06-29 Sunrise Memory Corporation Epitaxial monocrystalline channel for storage transistors in 3-dimensional memory structures and methods for formation thereof
US11094822B1 (en) * 2020-01-24 2021-08-17 Globalfoundries U.S. Inc. Source/drain regions for transistor devices and methods of forming same
US12142686B2 (en) 2021-05-26 2024-11-12 Globalfoundries U.S. Inc. Field effect transistor
US11764225B2 (en) 2021-06-10 2023-09-19 Globalfoundries U.S. Inc. Field effect transistor with shallow trench isolation features within source/drain regions

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010045604A1 (en) * 2000-05-25 2001-11-29 Hitachi, Ltd. Semiconductor device and manufacturing method

Family Cites Families (36)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2817285B2 (ja) * 1989-11-29 1998-10-30 日本電気株式会社 電界効果型トランジスタ
US5461243A (en) 1993-10-29 1995-10-24 International Business Machines Corporation Substrate for tensilely strained semiconductor
JP2778553B2 (ja) * 1995-09-29 1998-07-23 日本電気株式会社 半導体装置およびその製造方法
JPH09283766A (ja) * 1996-04-18 1997-10-31 Matsushita Electric Ind Co Ltd 半導体装置及びその製造方法
KR100226794B1 (ko) * 1996-06-10 1999-10-15 김영환 모스펫 제조방법
US6399970B2 (en) 1996-09-17 2002-06-04 Matsushita Electric Industrial Co., Ltd. FET having a Si/SiGeC heterojunction channel
US5906951A (en) 1997-04-30 1999-05-25 International Business Machines Corporation Strained Si/SiGe layers on insulator
JP3423859B2 (ja) * 1997-06-20 2003-07-07 三洋電機株式会社 電界効果型半導体装置の製造方法
US5963817A (en) * 1997-10-16 1999-10-05 International Business Machines Corporation Bulk and strained silicon on insulator using local selective oxidation
US6143593A (en) 1998-09-29 2000-11-07 Conexant Systems, Inc. Elevated channel MOSFET
FR2791180B1 (fr) * 1999-03-19 2001-06-15 France Telecom Dispositif semi-conducteur a courant de fuite reduit et son procede de fabrication
EP1272889A2 (en) * 1999-10-14 2003-01-08 Stratos Product Development LLC Virtual imaging system
JP2001203348A (ja) * 2000-01-18 2001-07-27 Sharp Corp 半導体装置及びその製造方法
JP3851752B2 (ja) 2000-03-27 2006-11-29 株式会社東芝 半導体装置の製造方法
US6509586B2 (en) 2000-03-31 2003-01-21 Fujitsu Limited Semiconductor device, method for fabricating the semiconductor device and semiconductor integrated circuit
WO2002033759A1 (en) 2000-10-19 2002-04-25 Matsushita Electric Industrial Co., Ltd. P-channel field-effect transistor
FR2818012B1 (fr) * 2000-12-12 2003-02-21 St Microelectronics Sa Dispositif semi-conducteur integre de memoire
US6844227B2 (en) 2000-12-26 2005-01-18 Matsushita Electric Industrial Co., Ltd. Semiconductor devices and method for manufacturing the same
US6563152B2 (en) * 2000-12-29 2003-05-13 Intel Corporation Technique to obtain high mobility channels in MOS transistors by forming a strain layer on an underside of a channel
JP2002237590A (ja) 2001-02-09 2002-08-23 Univ Tohoku Mos型電界効果トランジスタ
US6646322B2 (en) 2001-03-02 2003-11-11 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
US6677192B1 (en) 2001-03-02 2004-01-13 Amberwave Systems Corporation Method of fabricating a relaxed silicon germanium platform having planarizing for high speed CMOS electronics and high speed analog circuits
US6593641B1 (en) 2001-03-02 2003-07-15 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
US6723661B2 (en) 2001-03-02 2004-04-20 Amberwave Systems Corporation Relaxed silicon germanium platform for high speed CMOS electronics and high speed analog circuits
US6972245B2 (en) 2002-05-15 2005-12-06 The Regents Of The University Of California Method for co-fabricating strained and relaxed crystalline and poly-crystalline structures
US6833556B2 (en) 2002-08-12 2004-12-21 Acorn Technologies, Inc. Insulated gate field effect transistor having passivated schottky barriers to the channel
JP2004118563A (ja) 2002-09-26 2004-04-15 Fuji Photo Film Co Ltd 文字画像処理方法および装置並びにプログラム
US6818952B2 (en) 2002-10-01 2004-11-16 International Business Machines Corporation Damascene gate multi-mesa MOSFET
DE10246718A1 (de) * 2002-10-07 2004-04-22 Infineon Technologies Ag Feldeffekttransistor mit lokaler Source-/Drainisolation sowie zugehöriges Herstellungsverfahren
US6707106B1 (en) 2002-10-18 2004-03-16 Advanced Micro Devices, Inc. Semiconductor device with tensile strain silicon introduced by compressive material in a buried oxide layer
US6717216B1 (en) 2002-12-12 2004-04-06 International Business Machines Corporation SOI based field effect transistor having a compressive film in undercut area under the channel and a method of making the device
US6974981B2 (en) 2002-12-12 2005-12-13 International Business Machines Corporation Isolation structures for imposing stress patterns
US6825529B2 (en) 2002-12-12 2004-11-30 International Business Machines Corporation Stress inducing spacers
US6627515B1 (en) * 2002-12-13 2003-09-30 Taiwan Semiconductor Manufacturing Company Method of fabricating a non-floating body device with enhanced performance
US6919258B2 (en) * 2003-10-02 2005-07-19 Freescale Semiconductor, Inc. Semiconductor device incorporating a defect controlled strained channel structure and method of making the same
US7923782B2 (en) * 2004-02-27 2011-04-12 International Business Machines Corporation Hybrid SOI/bulk semiconductor transistors

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20010045604A1 (en) * 2000-05-25 2001-11-29 Hitachi, Ltd. Semiconductor device and manufacturing method

Also Published As

Publication number Publication date
WO2006034189A2 (en) 2006-03-30
CN100505301C (zh) 2009-06-24
CN101023530A (zh) 2007-08-22
US7078722B2 (en) 2006-07-18
EP1792346A4 (en) 2009-09-09
US7374988B2 (en) 2008-05-20
US20060160292A1 (en) 2006-07-20
EP1792346B1 (en) 2012-06-13
KR20070051901A (ko) 2007-05-18
JP5063352B2 (ja) 2012-10-31
US20060060856A1 (en) 2006-03-23
WO2006034189A3 (en) 2006-05-04
JP2008514016A (ja) 2008-05-01
EP1792346A2 (en) 2007-06-06
TW200625633A (en) 2006-07-16

Similar Documents

Publication Publication Date Title
KR100968182B1 (ko) 고이동도 벌크 실리콘 pfet
US8815659B2 (en) Methods of forming a FinFET semiconductor device by performing an epitaxial growth process
US7410859B1 (en) Stressed MOS device and method for its fabrication
US8772117B2 (en) Combination FinFET and planar FET semiconductor device and methods of making such a device
US8003470B2 (en) Strained semiconductor device and method of making the same
US20060131657A1 (en) Semiconductor integrated circuit device and method for the same
US10014406B2 (en) Semiconductor device and method of forming the same
US9269710B2 (en) Semiconductor devices having stressor regions and related fabrication methods
CN101233605A (zh) 用于制造受应力的mos器件的方法
US9852954B2 (en) Methods of forming transistors with retrograde wells in CMOS applications and the resulting device structures
US7670914B2 (en) Methods for fabricating multiple finger transistors
CN101542737B (zh) 自对准碰撞电离场效应晶体管
US9514996B2 (en) Process for fabricating SOI transistors for an increased integration density
CN100533765C (zh) 半导体器件及其制造方法
US20060205138A1 (en) Method to selectively form SiGe P type electrode and polysilicon N type electrode through planarization
JP2012248561A (ja) 半導体装置及びその製造方法

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

A201 Request for examination
PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

E902 Notification of reason for refusal
PE0902 Notice of grounds for rejection

St.27 status event code: A-1-2-D10-D21-exm-PE0902

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U12-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

LAPS Lapse due to unpaid annual fee
PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20130630

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20130630

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000