KR100939593B1 - Method to minimize wet etch undercuts and provide pore sealing of extreme low k less than 2.5 dielectrics - Google Patents

Abstract

A method of treating films on substrates is provided. In one embodiment, the methods include treating a patterned low dielectric constant film after removing the photoresist from the film by depositing a thin layer comprising silicon, carbon, and optionally oxygen and / or nitrogen on the film. Include. The thin layer provides a high-carbon, hydrophobic surface for the patterned low dielectric constant film. The thin layer also protects the low dielectric constant film from subsequent wet clean processes and protects the low dielectric constant film from penetration of precursors to the layers subsequently deposited on the low dielectric constant film.

Description

METHOD TO MINIMIZE WET ETCH UNDERCUTS AND PROVIDE PORE SEALING OF EXTREME LOW K LESS THAN 2.5 DIELECTRICS

Embodiments of the present invention generally relate to the manufacture of integrated circuits. More specifically, embodiments of the present invention relate to a process for depositing thin layers comprising silicon, carbon, and optionally oxygen and / or nitrogen on low dielectric constant layers.

Integrated circuit geometries have been significantly reduced in size since devices were first introduced decades ago. Since then, integrated circuits have generally followed the two-year / half-size rule (often referred to as Moore's Law), which means that every two years, the number of devices on a chip doubles. Today's manufacturing facilities repeatedly produce devices with 0.13 μm and even 0.1 μm feature sizes, and next generation facilities will produce devices with smaller feature sizes.

The continuous reduction in device geometries has led to the need for interlayer dielectric films with lower dielectric constants (k) because capacitive coupling between adjacent metal lines must be reduced to further reduce the size of devices on integrated circuits. Generated. In particular, insulators having low dielectric constants of less than about 4.0 are preferred.

More recently, low dielectric constant organosilicon films with dielectric constants of less than about 3.0 have been developed. Extreme low k (ELK) organosilicon films with dielectric constants of less than 2.5 have also been developed. One method used to develop low dielectric constant and lowest dielectric constant organosilicon films is to deposit films from a gas mixture comprising an organosilicon compound and a compound, such as a hydrocarbon containing thermally labile species or volatile groups, and then depositing The films were post-treatd to remove thermally labile species or volatile groups, such as organic groups, from the deposited films. Removal of thermally labile species or volatile groups from the deposited films creates nanometer-sized voids or voids in the films, which reduces the dielectric constant of the films, since air has a dielectric constant of about 1.

Ashing processes that remove photoresist or bottom anti-reflective coatings (BARC) can deplete carbon from low k films and oxidize the surface of the films. The oxidized surface of low k films is removed during subsequent wet etching processes, resulting in undercuts and critical dimension (CD) loss.

Porosity of low dielectric constant films can result in penetration of precursors used in the deposition of subsequent layers on the films, such as BARC layers or intermetallic barrier layers (TaN, etc.). Diffusion of barrier layer precursors into low porosity dielectric films results in current leakage in the device.

Thus, there is a need for a method of treating low dielectric constant films that minimizes damage to films from wet etching processes and subsequent processing steps, such as the deposition of subsequent layers such as BARC layers and barrier layers.

The present invention generally provides a method of depositing a thin, conformal pore-sealing surface layer on a low dielectric constant film on a substrate of a chamber. The method includes removing the photoresist from the patterned low dielectric constant film, and then depositing a thin conformal layer having a controlled thickness of about 4 GPa to about 100 GPa by patterning the pattern with any aspect ratio or via dimension. Treating the low dielectric constant film, wherein the conformal layer comprises silicon and carbon and optionally oxygen and / or nitrogen on the surface of the patterned low dielectric constant film. In one embodiment, depositing the layer includes reacting octamethylcyclotetrasiloxane in the presence of low levels of RF power. Ashing of the photoresist depletes carbon from the surface of the low dielectric constant film, making the surface hydrophilic. The pore sealing layer surface restores the surface carbon concentration of the low dielectric constant film after ashing, providing a hydrophobic surface to the patterned low dielectric constant film. The wet etch rate of the low dielectric constant film is minimized when the surface is hydrophobic. The layer protects the low dielectric constant film from subsequent wet cleaning processes that can be performed on the substrate and prevents undercuts and CD loss. The hydrophobic surface provided by the thin layer prevents water absorption into the low dielectric constant films.

The low dielectric film surface is oxidized and contains hydroxyl (OH) groups after photoresist ashing. The surface absorbs moisture and greatly increases the dielectric constant. The deposition of a thin layer after photoresist ashing releases the absorbed moisture on the surface and removes the OH groups from the surface of the low dielectric constant film, thus restoring the low dielectric constant. Lamination of the thin layer provides a hydrophobic sealing layer that prevents further moisture absorption.

The thin, conformal layer includes metal films and dielectric films with oxides (such as Cu / CuO or Al / Al ₂ O ₃ ) on the surface, and patterned surfaces containing OH, NH, or NH ₂ groups On the film or any blanket, it may be deposited as a protective layer to prevent moisture absorption and wet chemical etching, or as a pore-sealing layer to prevent penetration of precursors or chemicals. The thin layer can also serve as a pore-sealing layer for metal films or porous dielectric films having OH, NH, or NH ₂ groups at the surface.

In a manner in which the above-cited features of the present invention can be understood in detail, a more detailed description of the invention briefly summarized above can be made with reference to the embodiments, some of which are shown in the accompanying drawings. However, it is to be noted that the appended drawings illustrate only typical embodiments of the invention and are therefore not to be considered limiting of its scope, for the invention may be applicable to other equally effective embodiments.

Embodiments of the present invention provide a method of depositing a thin conformal layer on a patterned substrate comprising silicon, carbon, and optionally oxygen and / or nitrogen. In one aspect, embodiments of the present invention provide a method of protecting a patterned low dielectric constant film after the photoresist used to pattern the low dielectric constant film is removed from the film. In other aspects, embodiments of the present invention provide a method for controlling the critical dimension of a metal line of an interconnect, and a method for controlling the thickness of a deposited layer from about 4 kV to about 100 kV.

In one embodiment, the low dielectric constant film on the substrate is patterned using photoresist and photolithography to form vertical interconnects or horizontal interconnect openings therein. The low dielectric constant film can be a film comprising silicon, carbon, and optionally oxygen and / or nitrogen. Low dielectric constant films may be deposited from gas mixtures comprising organosilicon compounds such as organosilanes or organosiloxanes. The gas mixture may also include an oxidizing gas. In one embodiment, the gas mixture includes organosilicon compounds and porogens, such as hydrocarbons that are removed from the film after the film is deposited to form voids or voids in the film and the dielectric constant of the film is lowered. Porogens can be removed by UV treatment, electron beam treatment, heat treatment, or a combination thereof. Methods of forming porous low dielectric constant films are further described in co-pending US Pat. No. 6,936,551 and co-applying US Pat. No. 7,060,330, which are incorporated herein by reference. Note that low dielectric constant films having other compositions and / or deposited from different gas mixtures can be used in embodiments of the present invention.

It is also noted that films other than low dielectric constant films may be used in the embodiments, such as any films containing OH, NH, or NH ₂ groups at the surface. In general, films that can be used are oxygen-rich or nitrogen-rich surfaces that allow selective deposition of thin films comprising silicon, carbon, and optionally oxygen and / or nitrogen thereon. Has As defined herein, the high-oxygen surface has a Si: O (silicon: oxygen) ratio of about 1: 1 to about 1: 3. As defined herein, the high-nitrogen surface has a Si: N (silicon: nitrogen) ratio of about 1: 1 to about 1: 2.

Although the films can be deposited on high-oxygen or high-nitrogen surfaces, the films typically do not grow on high-carbon surfaces, so deposition of films on high-oxygen or high-nitrogen surfaces is selective. It may be described as deposition processes.

Octamethylcyclotetrasiloxane (OMCTS) is an example of a precursor that can be used to deposit the thin layers described herein. In addition to octamethylcyclotetrasiloxane, precursors having the general formula R _x -Si- (OR ') _y , such as dimethyldimethoxysilane (CH ₃ ) ₂ -Si- (O-CH ₃ ) ₂ , provide suitable process windows. And may be used to deposit thin and conformal layers having R = H, CH ₃ , CH ₂ CH ₃ , or other alkyl groups, respectively, and R '= CH ₃ , CH ₂ CH ₃ or other alkyl groups, x Is 0 to 4, y is 0 to 4, and x + y is 4. Other precursors that may be used include 1,3-dimethyldisiloxane (CH ₃ -SiH ₂ -O-SiH ₂ -CH ₃ ), 1,1,3,3-tetramethyldisiloxane ((CH ₃ ) ₂ -SiH -O-SiH- (CH ₃ ) ₂ ), hexamethyldisiloxane ((CH ₃ ) ₃ -Si-O-Si- (CH ₃ ) ₃ ), etc., the structure (R _X -Si-O-Si-R _Y ) _{organodisiloxanes} having _Z. Other precursors that may be used include cyclic organosiloxanes (R _X -Si-O) _Y , where y is greater than 2, x is 1 to 2, and R _X = CH ₃ , CH ₂ CH ₃ Or other alkyl group. Cyclic organosilicon compounds that can be used can include a ring structure having three or more silicon atoms, and the ring structure can further include one or more oxygen atoms. Commercially available cyclic organosilicon compounds include rings having alternating silicon and oxygen atoms with one or two alkyl groups bonded to silicon atoms. For example, the cyclic organosilicon compounds may comprise one or more of the following compounds:

Hexamethylcyclotrisiloxane (-Si (CH ₃ ) ₂ -O-) ₃ -cyclic,

1,3,5,7-tetramethylcyclotetrasiloxane (TMCTS) (-SiH (CH ₃ ) -O-) ₄ -cyclic,

Octamethylcyclotetrasiloxane (OMCTS) (-Si (CH ₃ ) ₂ -O-) ₄ -cyclic, and

1,3,5,7,9-pentamethylcyclopentasiloxane (-SiH (CH ₃ ) -0-) ₅ -cyclic.

The thin layer comprises silicon, carbon, and optionally oxygen. In other embodiments, the precursor may be a silicon and nitrogen-containing precursor used to deposit a thin, conformal layer comprising silicon, nitrogen, and optionally carbon. Precursors can include linear silazanes and cyclic silazanes. Linear silazanes may comprise a structure R—Si—NH—Si—R ′, wherein R = CH ₃ , CH ₂ CH ₃ , or another alkyl group, and R ′ = H, CH ₃ , CH ₂ CH ₃ Or other alkyl group. Cyclic silazines can include a (R _X -Si-NH) _Y structure, where y is greater than 2, x is 1 to 2, and R _X = CH ₃ , CH ₂ CH ₃ , or other alkyl Group. Compounds that are cyclic silases may include a ring structure having three or more silicon atoms, and the ring structure may further include one or more nitrogen atoms. Commercially available cyclic silases compounds include rings with alternating silicon and nitrogen atoms with one or two alkyl groups bonded to silicon atoms. For example, compounds that are cyclic silases can include:

1,2,3,4,5,6,7,8-octamethylcyclotetrasilase,

1,2,3,4,5,6-hexamethylcyclotrisilase,

1,1,3,3,5,5-hexamethylcyclotrisilase, and

1,1,3,3,5,5,7,7-octamethylcyclotetrasilase.

1A shows an example of a low dielectric constant film 102 on a substrate 100. 1B shows patterned photoresist 104 on low dielectric constant film 102.

The photoresist is then removed from the low dielectric film by, for example, stripping or ashing. 1C shows the low dielectric constant film 102 after patterning by the photoresist 104 and removing the photoresist to form the interconnect 106. Next, a thin, conformal layer 108 comprising silicon, carbon, and optionally oxygen and / or nitrogen, ie, a layer having a thickness of about 4 GPa to about 100 GPa, is patterned low dielectric as shown in FIG. 1D. It is deposited on the surface of the constant film. The layer may be deposited by reacting a gas mixture, such as a gas mixture comprising silicon, oxygen, and carbon, in the presence of RF power. Silicon, oxygen, and carbon may be provided by organosilicon compounds such as octamethylcyclotetrasiloxane. The organosilicon compound is typically introduced into the chamber via a carrier gas. Preferably, the carrier gas is helium. However, other inert gases such as argon or nitrogen can be used.

After the layer is deposited, the substrate can be wet cleaned, for example, via a 100: 1 HF solution. Then, as shown in FIG. 1E, a layer 110, such as a PVD barrier layer or an ALD barrier layer, for example, such as an ALD aluminum nitride (TaN) layer, may be deposited on the layer. Optionally, as shown in FIG. 1F, a layer, such as a bottom anti-reflective coating (BARC) layer 120, may be deposited on layer 108 and fill interconnect 106.

The layer comprising silicon, carbon, and optionally oxygen and / or nitrogen may be deposited by reacting a gas mixture comprising an organosilicon compound in the presence of RF power in a chemical vapor deposition chamber or a plasma enhanced chemical vapor deposition chamber. Examples of chambers that can be used to deposit a layer include a PRODUCER® chamber and a DxZ® chamber with two isolated processing regions, both available from Applied Materials, Inc. of Santa Clara, California. The processing conditions provided in the present invention are provided in a 300 mm PRODUCER® chamber with two isolated processing areas. Thus, the flow rates provided per substrate and each substrate processing region are half of the flow rates into the chamber.

During deposition of the layer on the substrate in the chamber, the substrate is typically maintained at a temperature of about 150 ° C to about 400 ° C. For 300 mm substrates, RF power is provided at a power level of about 100W or less, such as about 30W to about 75W. In general, RF power may be provided at about 0.109 W / cm ² or less, such as about 0.033 W / cm ² to about 0.082 W / cm ² . RF power may be provided to the showerhead, ie, the substrate support of the gas distribution assembly and / or chamber. RF power is provided at a high frequency of about 13 to 14 MHz, preferably about 13.56 MHz. RF power may be periodic or pulsed. RF power may be continuous or discontinuous. The spacing between the showerhead and the substrate support is greater than about 200 mils, such as about 200 mils to about 400 mils. The pressure in the chamber is at least about 1.5 Torr, such as from about 1.5 Torr to about 8 Torr.

The organosilicon compound may be introduced into the chamber at a flow rate of about 100 sccm to about 1000 sccm. Carrier gas may enter the chamber at a flow rate of about 100 sccm to about 7,000 sccm. The ratio of the flow rate of the organosilicon compound, such as, for example, octamethylcyclotetrasiloxane (OMCTS, sccm) to the chamber, to the flow rate of the carrier gas, for example helium (sccm), is at least about 0.1. The layer may be deposited for a period of time, such as from about 0.1 seconds to about 600 seconds, depending on the aspect ratio of the patterned structure, to deposit the layer to a thickness of about 4 ms to about 100 ms. Typically, layers are deposited for longer periods of time when higher aspect ratios are used to provide a conformal surface.

When a self-saturating organosilicon compound is used as a precursor for depositing a layer, using the aforementioned RF power levels, spacing, pressure, and flow rate ratios, a thickness of only about 4 kPa to about 100 kPa can be obtained. It has been found that a thin, uniform and conformal layer having withdrawn can be deposited reliably. Layers in the 1 mm thickness range in a single 300 mm substrate were obtained using the conditions provided in the present invention. As defined herein, a "self-saturated precursor" is a precursor that deposits one thin layer, such as only one molecular layer of the precursor that ignores the deposition time length on the substrate. . Since different precursors have different molecular sizes and result in different thicknesses for one molecular layer for different precursors, the thickness can be controlled by the choice of precursor. The presence of the thin layer prevents further deposition of additional layers from the precursor under the processing conditions used to deposit the thin layer. In general, self-saturating precursors may include a methyl group selected to inhibit sustained growth of the thin layer. Since the carbon of methyl groups provides a high-carbon film surface that substantially prevents further deposition on top, OMCTS is a preferred self-saturated precursor by including multiple methyl groups resulting in self-saturated deposition of the layer. That is, as soon as the surface of the underlying substrate is covered with OMCTS molecules, the presence of Si—CH ₃ bonds at the surface of the deposited layer prevents further deposition until some methyl groups are removed by some other treatment of the layer. As it provides a high-carbon surface, a conformal first layer can be deposited from the OMCTS. Thus, the deposition of each molecular layer of the OMCTS can be controlled well, improving the step coverage of the final layer.

In addition to octamethylcyclotetrasiloxane, precursors that can be used include diethoxymethylsilane (DEMS), hexamethyldisiloxane (HMDOS), and hexamethyldisilane (HMDS). Other precursors including Si, C, and H may be used in the process, such as trimethylsilane, tetramethylsilane, and the like.

X-ray photoelectron microscopy (XPS) analysis is performed on low dielectric constant films that were not exposed to the ashing process and low dielectric constant films that were not exposed to photoresist ashing. XPS analysis is also performed on low dielectric constant films that have been exposed to photoresist ashing and then treated by depositing a thin layer thereon, the thin layer being deposited from OMCTS in accordance with embodiments of the present invention and deposited on silicon, carbon, and oxygen It includes. XPS analysis shows that depositing a thin layer on ashed low dielectric constant films results in a higher carbon content (atomic% carbon) at the surface of those films compared to low dielectric constant films that are not treated by depositing a thin layer thereon. To show. For example, ashed low dielectric constant films may have about 3 atomic percent carbon, while a thin layer on ashed low dielectric constant films provides about 15 atomic percent carbon at the surface. Thus, in one embodiment, the thin layer is a high-carbon layer. The thin layer may have a carbon content of about 5 atomic% to about 30 atomic%. Ashing depletes the carbon concentration at the surface of the low dielectric constant film, while depositing a thin layer on the ashed low dielectric constant film restores the surface carbon concentration.

The XPS analysis also shows that the low dielectric constant in which the oxygen content is not treated in the thin layer after ashing because the OH groups are replaced by a thin layer containing carbon at the surface of the ashed membranes. It is lower than the oxygen content at the surface of the films. In addition, replacing OH groups with a thin layer containing carbon at the surface of the ashed films lowers the dielectric constant of the ashed films. FIG. 2 shows that depositing a thin layer using OMCTS on low dielectric constant films reduces the post-ashing dielectric constant of films treated in one of three different ashing processes.

Wetting angle for low dielectric constant films pre-ashing and post-ashing (ELK ILD, ie lowest k interlayer dielectric, and ashed ELK ILD in FIG. 3, respectively), and low dielectric constant films post-ashing and thin on top The wetting angle for having an OMCTS layer (ashed ELK ILD by OMCTS deposition in FIG. 3) is measured. The results are shown in FIG. As shown in FIG. 3, depositing a thin OMCTS layer on low dielectric constant films after-ashing increased the wetting angle of the low dielectric constant films. Increased wetting angle indicates that the thin OMCTS layer increased the hydrophobicity of the surfaces of low dielectric constant films. Such an increase in hydrophobicity is desirable because the hydrophobic surface prevents water absorption into low dielectric constant films that can affect membrane performance or at least result in the need for time consuming steps to remove moisture.

In addition, the deposition effect of the thin conformal OMCTS layer on the profile of the interconnects after post ashing wet cleaning was examined. After the films were dipped in 100: 1 HF solution in a wet clean process, trench profiles of regions with high density trenches and low density trenches were examined in low dielectric constant films with and without a thin OMCTS layer thereon. .

4A-4C show trench profiles of regions with high density trenches. 4A shows the trench profile after ashing and after wet clean. 4B and 4C show trench profiles after ashing and after wet cleaning, for low dielectric constant films with and without a thin OMCTS layer thereon, respectively. 4B shows that wet cleaning results in a critical dimension loss of about 30 nm for trenches in low dielectric constant films without a thin OMCTS layer on top. 4C shows that no CD loss is observed when the low dielectric constant film has a thin OMCTS layer deposited over it prior to wet cleaning.

5A-5C show trench profiles of regions with low density trenches. 5A shows the trench profile after ashing and before wet clean. 5B and 5C show trench profiles after ashing and after wet cleaning, for low dielectric constant films with and without a thin OMCTS layer thereon, respectively. 5B shows that wet cleaning results in undercutting greater than about 30 nm for trenches in low dielectric constant films without a thin OMCTS layer thereon. 5C shows that no undercutting was observed when the low dielectric constant film had a thin OMCTS layer deposited thereon prior to the wet clean.

Thus, the thin OMCTS layer provides a high carbon surface and also provides a hydrophobic surface that prevents undercutting and critical dimensional loss of low k films during wet etching processes.

Further, the thin layers provided in accordance with embodiments of the present invention may be formed of a material such as a BARC material for a subsequently deposited BARC layer, or a PVD barrier precursor or ALD TaN precursor for a subsequently deposited barrier layer. It has been found that a material such as ALD barrier precursor acts as a dense pore-sealing layer, which can prevent penetration into porous low k films that can deposit thin layers.

For example, a thin layer can be deposited on a low dielectric constant film after via etching and photoresist ashing in the via first damascene process. Subsequent BARC filling can be performed on a thin layer. The thin layer provides a void-sealing layer that prevents BARC material from penetrating into the dielectric film. The dielectric barrier between the low dielectric constant film and the underlying conductive material such as copper may then be etched to expose the underlying conductive material after trench etching and photoresist removal. After the dielectric barrier etch, a reducing chemical may be used to clean the exposed conductive surface by removal of the dielectric barrier and to remove the oxide from a surface such as copper oxide (CuO). A thin layer is then deposited on the sidewalls of the vias and trenches. The thin layer provides a pore-sealing layer that prevents subsequent barrier layer precursors from penetrating into the low dielectric constant film.

In embodiments in which a BARC layer is deposited on a thin layer after wet cleaning of the substrate, the thin layer is a helium (or other inert gas) plasma that is post-treated to adjust the carbon concentration and the wetting angle of the thin layer at the surface of the thin layer. Can be. The wetting angle can be reduced below about 70 degrees to improve the wetting and deposition of the BARC layer. 6 shows that the wetting angle is reduced by increasing the plasma treatment time. Mild processing conditions, that is, RF power of about 30 W to about 100 W, and He flow rates of about 100 sccm to about 10,000 sccm, are used so that the plasma treatment does not impair the thin layer pore-sealing properties.

In addition, where surface wetting or contact angles need to be adjusted, the thin layer can be post-treated with helium plasma prior to deposition of layers other than BARC layers thereon, such as ALD barrier layers. The thin layer can be plasma post-treated with different gases, such as O ₂ , CO ₂ , N ₂ O, NH ₃ , H ₂ , helium, nitrogen, argon, or a combination thereof. Plasma post-treatment can alter the surface properties and characteristics of the layer, such as surface tension and surface contact angle.

In another embodiment, a method of controlling the critical dimension of a metal line at an interconnect is provided. The method includes depositing a thin layer on a patterned low dielectric constant film, as described in the embodiments above. The patterned low dielectric constant film may comprise a high-oxygen or high-nitrogen surface prior to the deposition of a thin layer thereon. After the layer is deposited, the flow of the precursor used to deposit the layer, such as OMCTS, is terminated, and then any residual precursor is purged from the chamber by introducing only carrier gas, such as He carrier gas, into the chamber. The chamber may be purged or pumped, or purged and pumped.

After the chamber has been purged and / or pumped, in one embodiment, an oxygen plasma treatment is performed on the chamber to treat the layer deposited on the substrate from the precursor and initiate the next cycle of deposition, such as OMCTS deposition. In other embodiments, if a nitrogen-doped oxide or SiN layer is desired, NH ₃ plasma treatment with or without addition of H ₂ can be used. The oxygen plasma may be provided by any oxygen-containing gas capable of producing oxygen radicals that oxidize the surface of the layer. For example, the gas may comprise O ₂ , CO ₂ , N ₂ O, or a combination thereof. Oxygen-containing gas may enter the chamber at a constant flow rate. The oxygen-containing gas may flow into the chamber for a time period such as about 0.1 seconds to about 60 seconds depending on the via / trench pattern profile. The oxygen plasma may be provided by applying RF power of about 50 W to about 1000 W to the chamber at a frequency of 13.56 MHz. Mixed frequency RF power may be used. The lower layer to minimize the damage or impact of the plasma treatment on (such as low dielectric constant film), about 0.033W / cm ² to about 0.082 W / cm ² for the approximately 30W to the high-frequency low-level, such as about 100W RF Power is preferred.

The plasma treatment may be terminated by terminating the flow of the oxygen-containing gas into the chamber. Optionally, the thickness of the deposited layer is subsequently measured. The flow of precursor to the chamber is then resumed to deposit additional amounts of thin layers. After the chamber is cleaned, the oxygen plasma treatment as described above is also performed. Multiple cycles of deposition, purification, and plasma processing may be performed until a layer of desired thickness is obtained. By controlling the thickness of the layer deposited on the interconnects, the thickness of metal lines subsequently deposited on the interconnects can be controlled.

In another embodiment, a method of controlling the thickness of a layer from about 4 kPa to about 100 kPa on a substrate is provided. The substrate, which may include a high-oxygen or high-nitrogen surface, is exposed to a silicon-containing precursor in the presence of a plasma to deposit a layer on the substrate, and then in a group consisting of O ₂ , CO _2, and N ₂ O The layer is processed via a plasma from the selected oxygen-containing gas or through a plasma from NH ₃ with or without H ₂ . The exposure of the substrate to the silicon-containing precursor to deposit the layer and the treatment of the layer through the plasma are repeated until a layer of the desired thickness is obtained.

In a further embodiment, a method of forming a dense dielectric spacer comprising an oxide or nitride is provided. The method comprises exposing a patterned substrate comprising a gate, which may include a high-oxygen or high-nitrogen surface, to a silicon-containing precursor in the presence of a plasma to deposit a layer on the gate, and then O Treating the layer with a plasma from an oxygen-containing gas or a nitrogen-containing gas selected from the group consisting of ₂ , CO ₂ , N ₂ O, nitrogen-containing gas, and NH ₃ with or without H ₂ . do. Plasma treatments and silicon-containing precursors provided for the method of controlling the critical dimension of the metal line of the interconnect can be used both in forming dense dielectric spacers and in controlling the thickness of the layer from about 4 kV to about 100 kV. It may be.

While the foregoing detailed description is directed to embodiments of the invention, other and further embodiments of the invention may be devised without departing from its basic scope, the scope of which is determined by the claims that follow. .

1A-1E illustrate conceptual cross-sectional views of a substrate structure at different stages of a process sequence in accordance with one embodiment of the present invention.

2 is a graph showing the dielectric constant k of low dielectric constant films before and after ashing of low dielectric constant films having a thin OMCTS layer deposited thereon after ashing according to an embodiment of the present invention.

3 is a graph showing wetting angles of low dielectric constant films before and after ashing of low dielectric constant films having a thin OMCTS layer mounted thereon after ashing according to an embodiment of the present invention.

4A is a sketch of a trench profile (dense array) before and after wet etching according to the prior art.

4B is a sketch of a trench profile (dense array) after wet cleaning and ashing according to the prior art.

4C is a sketch of a trench profile (dense array) after wet cleaning and ashing according to one embodiment of the present invention.

5A is a sketch of a trench profile (iso structure / open area) before and after wet cleaning according to the prior art.

5B is a sketch of a trench profile (iso structure / open area) after wet cleaning and ashing according to the prior art.

5C is a sketch of a trench profile (iso structure / open area) after wet cleaning and ashing according to one embodiment of the present invention.

FIG. 6 is a graph showing the wetting angle of a thin OMCTS layer in accordance with one embodiment of the present invention over the time length of helium plasma post-treatment of the layer.

Claims (22)

As a substrate processing method, Depositing a first dielectric layer comprising at least a porous material of silicon, oxygen, and carbon; Depositing and patterning a resist material on the first dielectric layer; Etching the first dielectric layer; Removing the resist material from the first dielectric layer; And Depositing a second dielectric layer comprising at least a non-porous material of silicon, oxygen, and carbon on the first dielectric layer Substrate processing method comprising a. The method of claim 1, The second dielectric layer is deposited through reaction with a precursor in the presence of RF power, the precursor, Precursors having the general formula R _x -Si- (OR ') _y , wherein R = H, CH ₃ , CH ₂ CH ₃ , or another alkyl group, and R' = CH ₃ , CH ₂ CH ₃ Or another alkyl group, x is 0-4, y is 0-4 and x + y = 4; Organodisiloxanes having a (R _X -Si-O-Si-R _Y ) _z structure, where R _X = CH ₃ , CH ₂ CH ₃ , or another alkyl group, and R _Y = H, CH ₃ , CH ₂ CH ₃ , or another alkyl group; Cyclic organosiloxanes comprising a (R _X -Si-O) _Y structure, wherein R _X = CH ₃ , CH ₂ CH ₃ , or another alkyl group; Cyclic organosilicon compounds comprising a ring structure having three or more silicon atoms, the ring structure optionally comprising one or more oxygen atoms; And Cyclic organosilicon compounds comprising rings with alternating silicon and oxygen atoms having one or two alkyl groups bonded to silicon atoms The substrate processing method selected from the group consisting of. The method of claim 2, Wherein said precursor comprises an alkyl group selected to inhibit sustained growth of said second dielectric layer. The method of claim 1, Wherein the second dielectric layer has a greater carbon content than the first dielectric layer, and the second dielectric layer provides a carbon-saturated surface layer on the first dielectric layer. The method of claim 1, And wet cleaning the substrate after the second dielectric layer is deposited. The method of claim 1, And the second dielectric layer is deposited by a plasma enhanced chemical vapor deposition process by applying RF power at a power level of 0.033 W / cm 2 to 0.109 W / cm 2. The method of claim 1, And the pressure in the chamber is at least 1.5 Torr. The method of claim 1, And a spacing between the showerhead in the chamber and the substrate support in the chamber is at least 200 mils. The method of claim 1, Plasma post-treating the second dielectric layer using a gas selected from the group consisting of O ₂ , CO ₂ , N ₂ O, NH ₃ , H ₂ , helium, argon, and nitrogen. It includes a substrate processing method. The method of claim 1, Plasma post-treating the second dielectric layer, wherein the plasma post-treatment alters surface properties of the second dielectric layer, wherein the surface properties are selected from the group consisting of surface tension and surface contact angle, Substrate processing method. The method of claim 1, Depositing a bottom anti-reflective coating (BARC) on the second dielectric layer. The method of claim 1, Depositing a barrier layer on the second dielectric layer by atomic layer deposition or physical vapor deposition. The method of claim 1, And the second dielectric layer provides a dense layer that prevents BARC material or ALD or PVD barrier layer precursors from penetrating into the second dielectric layer. The method of claim 1, Wherein the first dielectric layer comprises a hydrophilic surface after removing the resist material from the first dielectric layer, and the second dielectric layer comprises a hydrophobic surface. The method of claim 1, And the second dielectric layer has a thickness of 4 kPa to 100 kPa. The method of claim 14, Wherein the first dielectric layer comprises a high-oxygen-rich surface after removing the resist material from the first dielectric layer, and the second dielectric layer comprises a high carbon-rich material. Way. The method of claim 2, The precursor, Hexamethylcyclotrisiloxane, 1,3,5,7-tetramethylcyclotetrasiloxane, octamethylcyclotetrasiloxane, 1,3,5,7,9-pentamethylcyclopentasiloxane, diethoxymethylsilane, hexamethyldi Siloxane, and hexamethyldisilane, trimethylsilane, tetramethylsilane, and combinations thereof. The method of claim 1, Plasma post-treating the second dielectric layer using a gas selected from the group consisting of O ₂ , CO ₂ , N ₂ O, NH ₃ , H ₂ , helium, argon, and nitrogen. It includes a substrate processing method. The method of claim 1, And the second dielectric layer is deposited by a plasma enhanced chemical vapor deposition process by application of RF power at a power level of 30W to 100W. The method of claim 19, And the RF power is pulsed. The method of claim 1, After deposition of the second dielectric layer, wet cleaning the substrate by exposing the second dielectric layer to a wet cleaning chemical comprising hydrofluoric acid (HF). The method of claim 21, Depositing a barrier layer or BARC layer on the second dielectric layer after wet cleaning of the second dielectric layer.

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